1 /* 2 * Copyright (C) 2014 Soeren Moch <smoch@web.de> 3 * 4 * Configuration settings for the TBS2910 MatrixARM board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __TBS2910_CONFIG_H 10 #define __TBS2910_CONFIG_H 11 12 #include "mx6_common.h" 13 #include <asm/arch/imx-regs.h> 14 #include <asm/imx-common/gpio.h> 15 16 /* General configuration */ 17 #define CONFIG_MX6 18 #define CONFIG_DISPLAY_CPUINFO 19 #define CONFIG_DISPLAY_BOARDINFO_LATE 20 #define CONFIG_SYS_THUMB_BUILD 21 22 #define CONFIG_MACH_TYPE 3980 23 24 #define CONFIG_CMDLINE_TAG 25 #define CONFIG_SETUP_MEMORY_TAGS 26 #define CONFIG_INITRD_TAG 27 #define CONFIG_REVISION_TAG 28 #define CONFIG_SYS_GENERIC_BOARD 29 30 #define CONFIG_BOARD_EARLY_INIT_F 31 #define CONFIG_MXC_GPIO 32 #define CONFIG_CMD_GPIO 33 34 #define CONFIG_SYS_LONGHELP 35 #define CONFIG_SYS_HUSH_PARSER 36 #define CONFIG_SYS_PROMPT "Matrix U-Boot> " 37 #define CONFIG_BOOTDELAY 3 38 #define CONFIG_AUTO_COMPLETE 39 #define CONFIG_CMDLINE_EDITING 40 #define CONFIG_SYS_MAXARGS 16 41 #define CONFIG_SYS_CBSIZE 1024 42 #define CONFIG_SYS_HZ 1000 43 44 /* Physical Memory Map */ 45 #define CONFIG_NR_DRAM_BANKS 1 46 #define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR 47 48 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 49 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 50 #define CONFIG_SYS_INIT_SP_OFFSET \ 51 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 52 #define CONFIG_SYS_INIT_SP_ADDR \ 53 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 54 55 #define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024) 56 57 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 58 #define CONFIG_SYS_MEMTEST_END \ 59 (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024) 60 61 #define CONFIG_SYS_TEXT_BASE 0x80000000 62 #define CONFIG_SYS_BOOTMAPSZ 0x6C000000 63 #define CONFIG_SYS_LOAD_ADDR 0x10800000 64 65 /* Serial console */ 66 #define CONFIG_MXC_UART 67 #define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ 68 #define CONFIG_BAUDRATE 115200 69 70 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 71 #define CONFIG_CONSOLE_MUX 72 #define CONFIG_CONS_INDEX 1 73 74 /* *** Command definition *** */ 75 #include <config_cmd_default.h> 76 77 #undef CONFIG_CMD_IMLS 78 79 #define CONFIG_CMD_BMODE 80 #define CONFIG_CMD_SETEXPR 81 #define CONFIG_CMD_MEMTEST 82 #define CONFIG_CMD_TIME 83 84 /* Filesystems / image support */ 85 #define CONFIG_CMD_EXT4 86 #define CONFIG_CMD_FAT 87 #define CONFIG_DOS_PARTITION 88 #define CONFIG_EFI_PARTITION 89 #define CONFIG_CMD_FS_GENERIC 90 91 #define CONFIG_OF_LIBFDT 92 #define CONFIG_CMD_BOOTZ 93 #define CONFIG_SUPPORT_RAW_INITRD 94 #define CONFIG_FIT 95 96 /* MMC */ 97 #define CONFIG_FSL_ESDHC 98 #define CONFIG_FSL_USDHC 99 #define CONFIG_SYS_FSL_USDHC_NUM 3 100 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 101 102 #define CONFIG_MMC 103 #define CONFIG_CMD_MMC 104 #define CONFIG_GENERIC_MMC 105 #define CONFIG_SUPPORT_EMMC_BOOT 106 #define CONFIG_BOUNCE_BUFFER 107 108 /* Ethernet */ 109 #define CONFIG_FEC_MXC 110 #define CONFIG_CMD_PING 111 #define CONFIG_CMD_DHCP 112 #define CONFIG_CMD_MII 113 #define CONFIG_CMD_NET 114 #define CONFIG_FEC_MXC 115 #define CONFIG_MII 116 #define IMX_FEC_BASE ENET_BASE_ADDR 117 #define CONFIG_FEC_XCV_TYPE RGMII 118 #define CONFIG_ETHPRIME "FEC" 119 #define CONFIG_FEC_MXC_PHYADDR 4 120 #define CONFIG_PHYLIB 121 #define CONFIG_PHY_ATHEROS 122 123 /* Framebuffer */ 124 #define CONFIG_VIDEO 125 #ifdef CONFIG_VIDEO 126 #define CONFIG_VIDEO_IPUV3 127 #define CONFIG_IPUV3_CLK 260000000 128 #define CONFIG_CFB_CONSOLE 129 #define CONFIG_CFB_CONSOLE_ANSI 130 #define CONFIG_VIDEO_SW_CURSOR 131 #define CONFIG_VGA_AS_SINGLE_DEVICE 132 #define CONFIG_VIDEO_BMP_RLE8 133 #define CONFIG_IMX_HDMI 134 #define CONFIG_IMX_VIDEO_SKIP 135 #define CONFIG_CMD_HDMIDETECT 136 #endif 137 138 /* PCI */ 139 #define CONFIG_CMD_PCI 140 #ifdef CONFIG_CMD_PCI 141 #define CONFIG_PCI 142 #define CONFIG_PCI_PNP 143 #define CONFIG_PCI_SCAN_SHOW 144 #define CONFIG_PCIE_IMX 145 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 146 #endif 147 148 /* SATA */ 149 #define CONFIG_CMD_SATA 150 #ifdef CONFIG_CMD_SATA 151 #define CONFIG_DWC_AHSATA 152 #define CONFIG_SYS_SATA_MAX_DEVICE 1 153 #define CONFIG_DWC_AHSATA_PORT_ID 0 154 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 155 #define CONFIG_LBA48 156 #define CONFIG_LIBATA 157 #endif 158 159 /* USB */ 160 #define CONFIG_CMD_USB 161 #ifdef CONFIG_CMD_USB 162 #define CONFIG_USB_EHCI 163 #define CONFIG_USB_EHCI_MX6 164 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 165 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 166 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 167 #define CONFIG_USB_STORAGE 168 #define CONFIG_CMD_USB_MASS_STORAGE 169 #ifdef CONFIG_CMD_USB_MASS_STORAGE 170 #define CONFIG_CI_UDC 171 #define CONFIG_USBD_HS 172 #define CONFIG_USB_GADGET 173 #define CONFIG_USB_GADGET_MASS_STORAGE 174 #define CONFIG_USB_GADGET_DUALSPEED 175 #define CONFIG_USB_GADGET_VBUS_DRAW 0 176 #define CONFIG_USBDOWNLOAD_GADGET 177 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 178 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 179 #define CONFIG_G_DNL_MANUFACTURER "TBS" 180 #endif /* CONFIG_CMD_USB_MASS_STORAGE */ 181 #define CONFIG_USB_KEYBOARD 182 #ifdef CONFIG_USB_KEYBOARD 183 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 184 #define CONFIG_SYS_STDIO_DEREGISTER 185 #define CONFIG_PREBOOT \ 186 "if hdmidet; then " \ 187 "usb start; " \ 188 "run set_con_usb_hdmi; " \ 189 "else " \ 190 "run set_con_serial; " \ 191 "fi;" 192 #endif /* CONFIG_USB_KEYBOARD */ 193 #endif /* CONFIG_CMD_USB */ 194 195 /* RTC */ 196 #define CONFIG_CMD_DATE 197 #ifdef CONFIG_CMD_DATE 198 #define CONFIG_CMD_I2C 199 #define CONFIG_RTC_DS1307 200 #define CONFIG_SYS_RTC_BUS_NUM 2 201 #endif 202 203 /* I2C */ 204 #define CONFIG_CMD_I2C 205 #ifdef CONFIG_CMD_I2C 206 #define CONFIG_SYS_I2C 207 #define CONFIG_SYS_I2C_MXC 208 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 209 #define CONFIG_SYS_I2C_SPEED 100000 210 #define CONFIG_I2C_EDID 211 #endif 212 213 /* Fuses */ 214 #define CONFIG_CMD_FUSE 215 #ifdef CONFIG_CMD_FUSE 216 #define CONFIG_MXC_OCOTP 217 #endif 218 219 #ifndef CONFIG_SYS_DCACHE_OFF 220 #define CONFIG_CMD_CACHE 221 #endif 222 223 /* Flash and environment organization */ 224 #define CONFIG_SYS_NO_FLASH 225 226 #define CONFIG_ENV_IS_IN_MMC 227 #define CONFIG_SYS_MMC_ENV_DEV 2 228 #define CONFIG_SYS_MMC_ENV_PART 1 229 #define CONFIG_ENV_SIZE (8 * 1024) 230 #define CONFIG_ENV_OFFSET (384 * 1024) 231 #define CONFIG_ENV_OVERWRITE 232 233 #define CONFIG_EXTRA_ENV_SETTINGS \ 234 "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \ 235 "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \ 236 "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \ 237 "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \ 238 "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \ 239 "${bootargs_mmc3}\0" \ 240 "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \ 241 "rdinit=/sbin/init enable_wait_mode=off\0" \ 242 "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \ 243 "mmc read 0x10800000 0x800 0x4000; bootm\0" \ 244 "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \ 245 "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \ 246 "run bootargs_upd; " \ 247 "bootm 0x10800000 0x10d00000\0" \ 248 "console=ttymxc0\0" \ 249 "fan=gpio set 92\0" \ 250 "set_con_serial=setenv stdin serial; " \ 251 "setenv stdout serial; " \ 252 "setenv stderr serial;\0" \ 253 "set_con_usb_hdmi=setenv stdin serial,usbkbd; " \ 254 "setenv stdout serial,vga; " \ 255 "setenv stderr serial,vga;\0" 256 257 #define CONFIG_BOOTCOMMAND \ 258 "mmc rescan; " \ 259 "if run bootcmd_up1; then " \ 260 "run bootcmd_up2; " \ 261 "else " \ 262 "run bootcmd_mmc; " \ 263 "fi" 264 265 #endif /* __TBS2910_CONFIG_H * */ 266