1 /* 2 * Copyright (C) 2014 Soeren Moch <smoch@web.de> 3 * 4 * Configuration settings for the TBS2910 MatrixARM board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __TBS2910_CONFIG_H 10 #define __TBS2910_CONFIG_H 11 12 #include "mx6_common.h" 13 14 /* General configuration */ 15 #define CONFIG_SYS_THUMB_BUILD 16 17 #define CONFIG_MACH_TYPE 3980 18 19 #define CONFIG_CMDLINE_TAG 20 #define CONFIG_SETUP_MEMORY_TAGS 21 #define CONFIG_INITRD_TAG 22 #define CONFIG_REVISION_TAG 23 24 #define CONFIG_BOARD_EARLY_INIT_F 25 #define CONFIG_MXC_GPIO 26 #define CONFIG_CMD_GPIO 27 28 #define CONFIG_SYS_LONGHELP 29 #define CONFIG_SYS_HUSH_PARSER 30 #define CONFIG_SYS_PROMPT "Matrix U-Boot> " 31 #define CONFIG_BOOTDELAY 3 32 #define CONFIG_AUTO_COMPLETE 33 #define CONFIG_CMDLINE_EDITING 34 #define CONFIG_SYS_MAXARGS 16 35 #define CONFIG_SYS_CBSIZE 1024 36 #define CONFIG_SYS_HZ 1000 37 38 /* Physical Memory Map */ 39 #define CONFIG_NR_DRAM_BANKS 1 40 #define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR 41 42 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 43 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 44 #define CONFIG_SYS_INIT_SP_OFFSET \ 45 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 46 #define CONFIG_SYS_INIT_SP_ADDR \ 47 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 48 49 #define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024) 50 51 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 52 #define CONFIG_SYS_MEMTEST_END \ 53 (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024) 54 55 #define CONFIG_SYS_TEXT_BASE 0x80000000 56 #define CONFIG_SYS_BOOTMAPSZ 0x6C000000 57 #define CONFIG_SYS_LOAD_ADDR 0x10800000 58 59 /* Serial console */ 60 #define CONFIG_MXC_UART 61 #define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ 62 #define CONFIG_BAUDRATE 115200 63 64 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 65 #define CONFIG_CONSOLE_MUX 66 #define CONFIG_CONS_INDEX 1 67 68 /* *** Command definition *** */ 69 #define CONFIG_CMD_BMODE 70 #define CONFIG_CMD_SETEXPR 71 #define CONFIG_CMD_MEMTEST 72 #define CONFIG_CMD_TIME 73 74 /* Filesystems / image support */ 75 #define CONFIG_CMD_EXT4 76 #define CONFIG_CMD_FAT 77 #define CONFIG_DOS_PARTITION 78 #define CONFIG_EFI_PARTITION 79 #define CONFIG_CMD_FS_GENERIC 80 81 #define CONFIG_OF_LIBFDT 82 #define CONFIG_CMD_BOOTZ 83 #define CONFIG_SUPPORT_RAW_INITRD 84 #define CONFIG_FIT 85 86 /* MMC */ 87 #define CONFIG_FSL_ESDHC 88 #define CONFIG_FSL_USDHC 89 #define CONFIG_SYS_FSL_USDHC_NUM 3 90 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 91 92 #define CONFIG_MMC 93 #define CONFIG_CMD_MMC 94 #define CONFIG_GENERIC_MMC 95 #define CONFIG_SUPPORT_EMMC_BOOT 96 #define CONFIG_BOUNCE_BUFFER 97 98 /* Ethernet */ 99 #define CONFIG_FEC_MXC 100 #define CONFIG_CMD_PING 101 #define CONFIG_CMD_DHCP 102 #define CONFIG_CMD_MII 103 #define CONFIG_CMD_NET 104 #define CONFIG_FEC_MXC 105 #define CONFIG_MII 106 #define IMX_FEC_BASE ENET_BASE_ADDR 107 #define CONFIG_FEC_XCV_TYPE RGMII 108 #define CONFIG_ETHPRIME "FEC" 109 #define CONFIG_FEC_MXC_PHYADDR 4 110 #define CONFIG_PHYLIB 111 #define CONFIG_PHY_ATHEROS 112 113 /* Framebuffer */ 114 #define CONFIG_VIDEO 115 #ifdef CONFIG_VIDEO 116 #define CONFIG_VIDEO_IPUV3 117 #define CONFIG_IPUV3_CLK 260000000 118 #define CONFIG_CFB_CONSOLE 119 #define CONFIG_CFB_CONSOLE_ANSI 120 #define CONFIG_VIDEO_SW_CURSOR 121 #define CONFIG_VGA_AS_SINGLE_DEVICE 122 #define CONFIG_VIDEO_BMP_RLE8 123 #define CONFIG_IMX_HDMI 124 #define CONFIG_IMX_VIDEO_SKIP 125 #define CONFIG_CMD_HDMIDETECT 126 #endif 127 128 /* PCI */ 129 #define CONFIG_CMD_PCI 130 #ifdef CONFIG_CMD_PCI 131 #define CONFIG_PCI 132 #define CONFIG_PCI_PNP 133 #define CONFIG_PCI_SCAN_SHOW 134 #define CONFIG_PCIE_IMX 135 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 136 #endif 137 138 /* SATA */ 139 #define CONFIG_CMD_SATA 140 #ifdef CONFIG_CMD_SATA 141 #define CONFIG_DWC_AHSATA 142 #define CONFIG_SYS_SATA_MAX_DEVICE 1 143 #define CONFIG_DWC_AHSATA_PORT_ID 0 144 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 145 #define CONFIG_LBA48 146 #define CONFIG_LIBATA 147 #endif 148 149 /* USB */ 150 #define CONFIG_CMD_USB 151 #ifdef CONFIG_CMD_USB 152 #define CONFIG_USB_EHCI 153 #define CONFIG_USB_EHCI_MX6 154 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 155 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 156 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 157 #define CONFIG_USB_STORAGE 158 #define CONFIG_CMD_USB_MASS_STORAGE 159 #ifdef CONFIG_CMD_USB_MASS_STORAGE 160 #define CONFIG_CI_UDC 161 #define CONFIG_USBD_HS 162 #define CONFIG_USB_GADGET 163 #define CONFIG_USB_GADGET_MASS_STORAGE 164 #define CONFIG_USB_GADGET_DUALSPEED 165 #define CONFIG_USB_GADGET_VBUS_DRAW 0 166 #define CONFIG_USBDOWNLOAD_GADGET 167 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 168 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 169 #define CONFIG_G_DNL_MANUFACTURER "TBS" 170 #endif /* CONFIG_CMD_USB_MASS_STORAGE */ 171 #define CONFIG_USB_KEYBOARD 172 #ifdef CONFIG_USB_KEYBOARD 173 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 174 #define CONFIG_SYS_STDIO_DEREGISTER 175 #define CONFIG_PREBOOT \ 176 "if hdmidet; then " \ 177 "usb start; " \ 178 "run set_con_usb_hdmi; " \ 179 "else " \ 180 "run set_con_serial; " \ 181 "fi;" 182 #endif /* CONFIG_USB_KEYBOARD */ 183 #endif /* CONFIG_CMD_USB */ 184 185 /* RTC */ 186 #define CONFIG_CMD_DATE 187 #ifdef CONFIG_CMD_DATE 188 #define CONFIG_CMD_I2C 189 #define CONFIG_RTC_DS1307 190 #define CONFIG_SYS_RTC_BUS_NUM 2 191 #endif 192 193 /* I2C */ 194 #define CONFIG_CMD_I2C 195 #ifdef CONFIG_CMD_I2C 196 #define CONFIG_SYS_I2C 197 #define CONFIG_SYS_I2C_MXC 198 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 199 #define CONFIG_SYS_I2C_SPEED 100000 200 #define CONFIG_I2C_EDID 201 #endif 202 203 /* Fuses */ 204 #define CONFIG_CMD_FUSE 205 #ifdef CONFIG_CMD_FUSE 206 #define CONFIG_MXC_OCOTP 207 #endif 208 209 #ifndef CONFIG_SYS_DCACHE_OFF 210 #define CONFIG_CMD_CACHE 211 #endif 212 213 /* Environment organization */ 214 #define CONFIG_ENV_IS_IN_MMC 215 #define CONFIG_SYS_MMC_ENV_DEV 2 216 #define CONFIG_SYS_MMC_ENV_PART 1 217 #define CONFIG_ENV_SIZE (8 * 1024) 218 #define CONFIG_ENV_OFFSET (384 * 1024) 219 #define CONFIG_ENV_OVERWRITE 220 221 #define CONFIG_EXTRA_ENV_SETTINGS \ 222 "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \ 223 "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \ 224 "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \ 225 "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \ 226 "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \ 227 "${bootargs_mmc3}\0" \ 228 "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \ 229 "rdinit=/sbin/init enable_wait_mode=off\0" \ 230 "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \ 231 "mmc read 0x10800000 0x800 0x4000; bootm\0" \ 232 "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \ 233 "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \ 234 "run bootargs_upd; " \ 235 "bootm 0x10800000 0x10d00000\0" \ 236 "console=ttymxc0\0" \ 237 "fan=gpio set 92\0" \ 238 "set_con_serial=setenv stdin serial; " \ 239 "setenv stdout serial; " \ 240 "setenv stderr serial;\0" \ 241 "set_con_usb_hdmi=setenv stdin serial,usbkbd; " \ 242 "setenv stdout serial,vga; " \ 243 "setenv stderr serial,vga;\0" 244 245 #define CONFIG_BOOTCOMMAND \ 246 "mmc rescan; " \ 247 "if run bootcmd_up1; then " \ 248 "run bootcmd_up2; " \ 249 "else " \ 250 "run bootcmd_mmc; " \ 251 "fi" 252 253 #endif /* __TBS2910_CONFIG_H * */ 254