1 /* 2 * Copyright (C) 2014 Soeren Moch <smoch@web.de> 3 * 4 * Configuration settings for the TBS2910 MatrixARM board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __TBS2910_CONFIG_H 10 #define __TBS2910_CONFIG_H 11 12 #include "mx6_common.h" 13 14 /* General configuration */ 15 #define CONFIG_SYS_THUMB_BUILD 16 17 #define CONFIG_MACH_TYPE 3980 18 19 #define CONFIG_BOARD_EARLY_INIT_F 20 21 #define CONFIG_SYS_PROMPT "Matrix U-Boot> " 22 #define CONFIG_SYS_HZ 1000 23 24 /* Physical Memory Map */ 25 #define CONFIG_NR_DRAM_BANKS 1 26 #define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR 27 28 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 29 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 30 #define CONFIG_SYS_INIT_SP_OFFSET \ 31 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 32 #define CONFIG_SYS_INIT_SP_ADDR \ 33 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 34 35 #define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024) 36 37 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 38 #define CONFIG_SYS_MEMTEST_END \ 39 (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024) 40 41 #define CONFIG_SYS_BOOTMAPSZ 0x6C000000 42 43 /* Serial console */ 44 #define CONFIG_MXC_UART 45 #define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ 46 #define CONFIG_BAUDRATE 115200 47 48 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 49 #define CONFIG_CONSOLE_MUX 50 #define CONFIG_CONS_INDEX 1 51 52 /* *** Command definition *** */ 53 #define CONFIG_CMD_BMODE 54 #define CONFIG_CMD_SETEXPR 55 #define CONFIG_CMD_MEMTEST 56 #define CONFIG_CMD_TIME 57 58 /* Filesystems / image support */ 59 #define CONFIG_CMD_EXT4 60 #define CONFIG_CMD_FAT 61 #define CONFIG_DOS_PARTITION 62 #define CONFIG_EFI_PARTITION 63 #define CONFIG_CMD_FS_GENERIC 64 65 #define CONFIG_OF_LIBFDT 66 #define CONFIG_CMD_BOOTZ 67 #define CONFIG_SUPPORT_RAW_INITRD 68 #define CONFIG_FIT 69 70 /* MMC */ 71 #define CONFIG_FSL_ESDHC 72 #define CONFIG_FSL_USDHC 73 #define CONFIG_SYS_FSL_USDHC_NUM 3 74 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR 75 76 #define CONFIG_MMC 77 #define CONFIG_CMD_MMC 78 #define CONFIG_GENERIC_MMC 79 #define CONFIG_SUPPORT_EMMC_BOOT 80 #define CONFIG_BOUNCE_BUFFER 81 82 /* Ethernet */ 83 #define CONFIG_FEC_MXC 84 #define CONFIG_CMD_PING 85 #define CONFIG_CMD_DHCP 86 #define CONFIG_CMD_MII 87 #define CONFIG_CMD_NET 88 #define CONFIG_FEC_MXC 89 #define CONFIG_MII 90 #define IMX_FEC_BASE ENET_BASE_ADDR 91 #define CONFIG_FEC_XCV_TYPE RGMII 92 #define CONFIG_ETHPRIME "FEC" 93 #define CONFIG_FEC_MXC_PHYADDR 4 94 #define CONFIG_PHYLIB 95 #define CONFIG_PHY_ATHEROS 96 97 /* Framebuffer */ 98 #define CONFIG_VIDEO 99 #ifdef CONFIG_VIDEO 100 #define CONFIG_VIDEO_IPUV3 101 #define CONFIG_IPUV3_CLK 260000000 102 #define CONFIG_CFB_CONSOLE 103 #define CONFIG_CFB_CONSOLE_ANSI 104 #define CONFIG_VIDEO_SW_CURSOR 105 #define CONFIG_VGA_AS_SINGLE_DEVICE 106 #define CONFIG_VIDEO_BMP_RLE8 107 #define CONFIG_IMX_HDMI 108 #define CONFIG_IMX_VIDEO_SKIP 109 #define CONFIG_CMD_HDMIDETECT 110 #endif 111 112 /* PCI */ 113 #define CONFIG_CMD_PCI 114 #ifdef CONFIG_CMD_PCI 115 #define CONFIG_PCI 116 #define CONFIG_PCI_PNP 117 #define CONFIG_PCI_SCAN_SHOW 118 #define CONFIG_PCIE_IMX 119 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 120 #endif 121 122 /* SATA */ 123 #define CONFIG_CMD_SATA 124 #ifdef CONFIG_CMD_SATA 125 #define CONFIG_DWC_AHSATA 126 #define CONFIG_SYS_SATA_MAX_DEVICE 1 127 #define CONFIG_DWC_AHSATA_PORT_ID 0 128 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 129 #define CONFIG_LBA48 130 #define CONFIG_LIBATA 131 #endif 132 133 /* USB */ 134 #define CONFIG_CMD_USB 135 #ifdef CONFIG_CMD_USB 136 #define CONFIG_USB_EHCI 137 #define CONFIG_USB_EHCI_MX6 138 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 139 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 140 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 141 #define CONFIG_USB_STORAGE 142 #define CONFIG_CMD_USB_MASS_STORAGE 143 #ifdef CONFIG_CMD_USB_MASS_STORAGE 144 #define CONFIG_CI_UDC 145 #define CONFIG_USBD_HS 146 #define CONFIG_USB_GADGET 147 #define CONFIG_USB_GADGET_MASS_STORAGE 148 #define CONFIG_USB_GADGET_DUALSPEED 149 #define CONFIG_USB_GADGET_VBUS_DRAW 0 150 #define CONFIG_USBDOWNLOAD_GADGET 151 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 152 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 153 #define CONFIG_G_DNL_MANUFACTURER "TBS" 154 #endif /* CONFIG_CMD_USB_MASS_STORAGE */ 155 #define CONFIG_USB_KEYBOARD 156 #ifdef CONFIG_USB_KEYBOARD 157 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 158 #define CONFIG_SYS_STDIO_DEREGISTER 159 #define CONFIG_PREBOOT \ 160 "if hdmidet; then " \ 161 "usb start; " \ 162 "run set_con_usb_hdmi; " \ 163 "else " \ 164 "run set_con_serial; " \ 165 "fi;" 166 #endif /* CONFIG_USB_KEYBOARD */ 167 #endif /* CONFIG_CMD_USB */ 168 169 /* RTC */ 170 #define CONFIG_CMD_DATE 171 #ifdef CONFIG_CMD_DATE 172 #define CONFIG_CMD_I2C 173 #define CONFIG_RTC_DS1307 174 #define CONFIG_SYS_RTC_BUS_NUM 2 175 #endif 176 177 /* I2C */ 178 #define CONFIG_CMD_I2C 179 #ifdef CONFIG_CMD_I2C 180 #define CONFIG_SYS_I2C 181 #define CONFIG_SYS_I2C_MXC 182 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 183 #define CONFIG_SYS_I2C_SPEED 100000 184 #define CONFIG_I2C_EDID 185 #endif 186 187 /* Fuses */ 188 #define CONFIG_CMD_FUSE 189 #ifdef CONFIG_CMD_FUSE 190 #define CONFIG_MXC_OCOTP 191 #endif 192 193 #ifndef CONFIG_SYS_DCACHE_OFF 194 #define CONFIG_CMD_CACHE 195 #endif 196 197 /* Environment organization */ 198 #define CONFIG_ENV_IS_IN_MMC 199 #define CONFIG_SYS_MMC_ENV_DEV 2 200 #define CONFIG_SYS_MMC_ENV_PART 1 201 #define CONFIG_ENV_SIZE (8 * 1024) 202 #define CONFIG_ENV_OFFSET (384 * 1024) 203 #define CONFIG_ENV_OVERWRITE 204 205 #define CONFIG_EXTRA_ENV_SETTINGS \ 206 "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \ 207 "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \ 208 "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \ 209 "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \ 210 "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \ 211 "${bootargs_mmc3}\0" \ 212 "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \ 213 "rdinit=/sbin/init enable_wait_mode=off\0" \ 214 "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \ 215 "mmc read 0x10800000 0x800 0x4000; bootm\0" \ 216 "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \ 217 "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \ 218 "run bootargs_upd; " \ 219 "bootm 0x10800000 0x10d00000\0" \ 220 "console=ttymxc0\0" \ 221 "fan=gpio set 92\0" \ 222 "set_con_serial=setenv stdin serial; " \ 223 "setenv stdout serial; " \ 224 "setenv stderr serial;\0" \ 225 "set_con_usb_hdmi=setenv stdin serial,usbkbd; " \ 226 "setenv stdout serial,vga; " \ 227 "setenv stderr serial,vga;\0" 228 229 #define CONFIG_BOOTCOMMAND \ 230 "mmc rescan; " \ 231 "if run bootcmd_up1; then " \ 232 "run bootcmd_up2; " \ 233 "else " \ 234 "run bootcmd_mmc; " \ 235 "fi" 236 237 #endif /* __TBS2910_CONFIG_H * */ 238