1 /* 2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards 3 * (C) Copyright 2013 Siemens AG 4 * 5 * Based on: 6 * U-Boot file: include/configs/at91sam9260ek.h 7 * 8 * (C) Copyright 2007-2008 9 * Stelian Pop <stelian@popies.net> 10 * Lead Tech Design <www.leadtechdesign.com> 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 #include <linux/sizes.h> 24 25 #if defined(CONFIG_SPL_BUILD) 26 #define CONFIG_SYS_THUMB_BUILD 27 #define CONFIG_SYS_ICACHE_OFF 28 #define CONFIG_SYS_DCACHE_OFF 29 #endif 30 /* 31 * Warning: changing CONFIG_SYS_TEXT_BASE requires 32 * adapting the initial boot program. 33 * Since the linker has to swallow that define, we must use a pure 34 * hex number here! 35 */ 36 37 #define CONFIG_SYS_TEXT_BASE 0x21000000 38 39 /* ARM asynchronous clock */ 40 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 41 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ 42 43 /* Misc CPU related */ 44 #define CONFIG_ARCH_CPU_INIT 45 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 46 #define CONFIG_SETUP_MEMORY_TAGS 47 #define CONFIG_INITRD_TAG 48 #define CONFIG_SKIP_LOWLEVEL_INIT 49 #define CONFIG_BOARD_EARLY_INIT_F 50 #define CONFIG_DISPLAY_CPUINFO 51 52 #define CONFIG_CMD_BOOTZ 53 54 /* general purpose I/O */ 55 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 56 #define CONFIG_AT91_GPIO 57 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 58 59 /* serial console */ 60 #define CONFIG_ATMEL_USART 61 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 62 #define CONFIG_USART_ID ATMEL_ID_SYS 63 #define CONFIG_BAUDRATE 115200 64 65 #define CONFIG_BOOTDELAY 3 66 67 /* 68 * Command line configuration. 69 */ 70 #define CONFIG_CMD_NAND 71 72 /* 73 * SDRAM: 1 bank, min 32, max 128 MB 74 * Initialized before u-boot gets started. 75 */ 76 #define CONFIG_NR_DRAM_BANKS 1 77 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 78 #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) 79 80 /* 81 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 82 * leaving the correct space for initial global data structure above 83 * that address while providing maximum stack area below. 84 */ 85 #define CONFIG_SYS_INIT_SP_ADDR \ 86 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 87 88 /* NAND flash */ 89 #ifdef CONFIG_CMD_NAND 90 #define CONFIG_NAND_ATMEL 91 #define CONFIG_SYS_MAX_NAND_DEVICE 1 92 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 93 #define CONFIG_SYS_NAND_DBW_8 94 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 95 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 96 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 97 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 98 #endif 99 100 /* NOR flash - no real flash on this board */ 101 #define CONFIG_SYS_NO_FLASH 1 102 103 /* Ethernet */ 104 #define CONFIG_MACB 105 #define CONFIG_RMII 106 #define CONFIG_AT91_WANTS_COMMON_PHY 107 108 #define CONFIG_AT91SAM9_WATCHDOG 109 #define CONFIG_AT91_HW_WDT_TIMEOUT 15 110 #if !defined(CONFIG_SPL_BUILD) 111 /* Enable the watchdog */ 112 #define CONFIG_HW_WATCHDOG 113 #endif 114 115 /* USB */ 116 #if defined(CONFIG_BOARD_TAURUS) 117 #define CONFIG_USB_ATMEL 118 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 119 #define CONFIG_USB_OHCI_NEW 120 #define CONFIG_SYS_USB_OHCI_CPU_INIT 121 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 122 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 123 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 124 #define CONFIG_USB_STORAGE 125 126 /* USB DFU support */ 127 #define CONFIG_CMD_MTDPARTS 128 #define CONFIG_MTD_DEVICE 129 #define CONFIG_MTD_PARTITIONS 130 131 #define CONFIG_USB_GADGET_AT91 132 133 /* DFU class support */ 134 #define CONFIG_CMD_DFU 135 #define CONFIG_USB_FUNCTION_DFU 136 #define CONFIG_DFU_NAND 137 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) 138 #define DFU_MANIFEST_POLL_TIMEOUT 25000 139 140 #define CONFIG_SYS_CACHELINE_SIZE SZ_8K 141 #endif 142 143 /* SPI EEPROM */ 144 #define CONFIG_SPI 145 #define CONFIG_ATMEL_SPI 146 #define TAURUS_SPI_MASK (1 << 4) 147 #define TAURUS_SPI_CS_PIN AT91_PIN_PA3 148 149 #if defined(CONFIG_SPL_BUILD) 150 /* SPL related */ 151 #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ 152 #define CONFIG_SPL_SPI_SUPPORT 153 #define CONFIG_SPL_SPI_FLASH_SUPPORT 154 #define CONFIG_SPL_SPI_LOAD 155 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 156 157 #define CONFIG_SF_DEFAULT_BUS 0 158 #define CONFIG_SF_DEFAULT_SPEED 1000000 159 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 160 #endif 161 162 /* load address */ 163 #define CONFIG_SYS_LOAD_ADDR 0x22000000 164 165 /* bootstrap in spi flash , u-boot + env + linux in nandflash */ 166 #define CONFIG_ENV_IS_IN_NAND 167 #define CONFIG_ENV_OFFSET 0x100000 168 #define CONFIG_ENV_OFFSET_REDUND 0x180000 169 #define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */ 170 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" 171 172 #if defined(CONFIG_BOARD_TAURUS) 173 #define CONFIG_BOOTARGS_TAURUS \ 174 "console=ttyS0,115200 earlyprintk " \ 175 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 176 "256k(env),256k(env_redundant),256k(spare)," \ 177 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 178 "root=/dev/mtdblock7 rw rootfstype=jffs2" 179 #endif 180 181 #if defined(CONFIG_BOARD_AXM) 182 #define CONFIG_BOOTARGS_AXM \ 183 "\0" \ 184 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \ 185 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \ 186 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \ 187 "baudrate=115200\0" \ 188 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \ 189 "boot_retries=0\0" \ 190 "bootcmd=run flash_self\0" \ 191 "bootdelay=3\0" \ 192 "ethact=macb0\0" \ 193 "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\ 194 "bootm ${kernel_ram};reset\0" \ 195 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \ 196 "bootm ${kernel_ram};reset\0" \ 197 "flash_self_test=run nand_kernel;run setbootargs addtest; " \ 198 "upgrade_available;bootm ${kernel_ram};reset\0" \ 199 "hostname=systemone\0" \ 200 "kernel_Off=0x00200000\0" \ 201 "kernel_Off_fallback=0x03800000\0" \ 202 "kernel_ram=0x21500000\0" \ 203 "kernel_size=0x00400000\0" \ 204 "kernel_size_fallback=0x00400000\0" \ 205 "loads_echo=1\0" \ 206 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \ 207 "${kernel_size}\0" \ 208 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \ 209 "run nfsargs;run addip;upgrade_available;bootm " \ 210 "${kernel_ram};reset\0" \ 211 "netdev=eth0\0" \ 212 "nfsargs=run root_path;setenv bootargs ${bootargs} " \ 213 "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \ 214 "at91sam9_wdt.wdt_timeout=16\0" \ 215 "partitionset_active=A\0" \ 216 "preboot=echo;echo Type 'run flash_self' to use kernel and root "\ 217 "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \ 218 "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\ 219 "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\ 220 "project_dir=systemone\0" \ 221 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\ 222 "rootfs=/dev/mtdblock5\0" \ 223 "rootfs_fallback=/dev/mtdblock7\0" \ 224 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\ 225 "root=${rootfs} rootfstype=jffs2 panic=7 " \ 226 "at91sam9_wdt.wdt_timeout=16\0" \ 227 "stderr=serial\0" \ 228 "stdin=serial\0" \ 229 "stdout=serial\0" \ 230 "upgrade_available=0\0" 231 #endif 232 233 #if defined(CONFIG_BOARD_TAURUS) 234 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS 235 #endif 236 237 #if defined(CONFIG_BOARD_AXM) 238 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM 239 #endif 240 241 #define CONFIG_SYS_CBSIZE 256 242 #define CONFIG_SYS_MAXARGS 16 243 #define CONFIG_SYS_PBSIZE \ 244 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 245 #define CONFIG_SYS_LONGHELP 246 #define CONFIG_CMDLINE_EDITING 247 #define CONFIG_AUTO_COMPLETE 248 249 /* 250 * Size of malloc() pool 251 */ 252 #define CONFIG_SYS_MALLOC_LEN \ 253 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000) 254 255 /* Defines for SPL */ 256 #define CONFIG_SPL_FRAMEWORK 257 #define CONFIG_SPL_TEXT_BASE 0x0 258 #define CONFIG_SPL_MAX_SIZE (31 * SZ_512) 259 #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K) 260 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ 261 CONFIG_SYS_MALLOC_LEN) 262 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 263 264 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE 265 #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512) 266 267 #define CONFIG_SPL_LIBCOMMON_SUPPORT 268 #define CONFIG_SPL_LIBGENERIC_SUPPORT 269 #define CONFIG_SPL_SERIAL_SUPPORT 270 271 #define CONFIG_SPL_BOARD_INIT 272 #define CONFIG_SPL_GPIO_SUPPORT 273 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) 274 #define CONFIG_SPL_NAND_SUPPORT 275 #define CONFIG_SYS_USE_NANDFLASH 1 276 #define CONFIG_SPL_NAND_DRIVERS 277 #define CONFIG_SPL_NAND_BASE 278 #define CONFIG_SPL_NAND_ECC 279 #define CONFIG_SPL_NAND_RAW_ONLY 280 #define CONFIG_SPL_NAND_SOFTECC 281 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 282 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K 283 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 284 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 285 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 286 287 #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M) 288 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K 289 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) 290 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 291 CONFIG_SYS_NAND_PAGE_SIZE) 292 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 293 #define CONFIG_SYS_NAND_ECCSIZE 256 294 #define CONFIG_SYS_NAND_ECCBYTES 3 295 #define CONFIG_SYS_NAND_OOBSIZE 64 296 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 297 48, 49, 50, 51, 52, 53, 54, 55, \ 298 56, 57, 58, 59, 60, 61, 62, 63, } 299 300 #define CONFIG_SPL_ATMEL_SIZE 301 #define CONFIG_SYS_MASTER_CLOCK 132096000 302 #define AT91_PLL_LOCK_TIMEOUT 1000000 303 #define CONFIG_SYS_AT91_PLLA 0x202A3F01 304 #define CONFIG_SYS_MCKR 0x1300 305 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) 306 #define CONFIG_SYS_AT91_PLLB 0x10193F05 307 308 #endif 309