1 /* 2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards 3 * (C) Copyright 2013 Siemens AG 4 * 5 * Based on: 6 * U-Boot file: include/configs/at91sam9260ek.h 7 * 8 * (C) Copyright 2007-2008 9 * Stelian Pop <stelian@popies.net> 10 * Lead Tech Design <www.leadtechdesign.com> 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 #include <linux/sizes.h> 24 25 26 #if defined(CONFIG_SPL_BUILD) 27 #define CONFIG_SYS_THUMB_BUILD 28 #define CONFIG_SYS_ICACHE_OFF 29 #define CONFIG_SYS_DCACHE_OFF 30 #endif 31 /* 32 * Warning: changing CONFIG_SYS_TEXT_BASE requires 33 * adapting the initial boot program. 34 * Since the linker has to swallow that define, we must use a pure 35 * hex number here! 36 */ 37 38 39 #define CONFIG_SYS_TEXT_BASE 0x21000000 40 41 /* ARM asynchronous clock */ 42 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 43 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ 44 45 /* Misc CPU related */ 46 #define CONFIG_ARCH_CPU_INIT 47 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 48 #define CONFIG_SETUP_MEMORY_TAGS 49 #define CONFIG_INITRD_TAG 50 #define CONFIG_SKIP_LOWLEVEL_INIT 51 #define CONFIG_BOARD_EARLY_INIT_F 52 #define CONFIG_DISPLAY_CPUINFO 53 54 #define CONFIG_CMD_BOOTZ 55 56 /* general purpose I/O */ 57 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 58 #define CONFIG_AT91_GPIO 59 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 60 61 /* serial console */ 62 #define CONFIG_ATMEL_USART 63 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 64 #define CONFIG_USART_ID ATMEL_ID_SYS 65 #define CONFIG_BAUDRATE 115200 66 67 #define CONFIG_BOOTDELAY 3 68 69 /* 70 * Command line configuration. 71 */ 72 #define CONFIG_CMD_PING 73 #define CONFIG_CMD_DHCP 74 #define CONFIG_CMD_NAND 75 76 /* 77 * SDRAM: 1 bank, min 32, max 128 MB 78 * Initialized before u-boot gets started. 79 */ 80 #define CONFIG_NR_DRAM_BANKS 1 81 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 82 #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) 83 84 /* 85 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 86 * leaving the correct space for initial global data structure above 87 * that address while providing maximum stack area below. 88 */ 89 #define CONFIG_SYS_INIT_SP_ADDR \ 90 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 91 92 /* NAND flash */ 93 #ifdef CONFIG_CMD_NAND 94 #define CONFIG_NAND_ATMEL 95 #define CONFIG_SYS_MAX_NAND_DEVICE 1 96 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 97 #define CONFIG_SYS_NAND_DBW_8 98 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 99 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 100 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 101 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 102 #endif 103 104 /* NOR flash - no real flash on this board */ 105 #define CONFIG_SYS_NO_FLASH 1 106 107 /* Ethernet */ 108 #define CONFIG_MACB 109 #define CONFIG_RMII 110 #define CONFIG_AT91_WANTS_COMMON_PHY 111 112 #define CONFIG_AT91SAM9_WATCHDOG 113 #define CONFIG_AT91_HW_WDT_TIMEOUT 15 114 #if !defined(CONFIG_SPL_BUILD) 115 /* Enable the watchdog */ 116 #define CONFIG_HW_WATCHDOG 117 #endif 118 119 /* USB */ 120 #if defined(CONFIG_BOARD_TAURUS) 121 #define CONFIG_USB_ATMEL 122 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 123 #define CONFIG_USB_OHCI_NEW 124 #define CONFIG_SYS_USB_OHCI_CPU_INIT 125 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 126 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 127 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 128 #define CONFIG_USB_STORAGE 129 130 /* USB DFU support */ 131 #define CONFIG_CMD_MTDPARTS 132 #define CONFIG_MTD_DEVICE 133 #define CONFIG_MTD_PARTITIONS 134 135 #define CONFIG_USB_GADGET_AT91 136 137 /* DFU class support */ 138 #define CONFIG_CMD_USB 139 #define CONFIG_CMD_DFU 140 #define CONFIG_USB_FUNCTION_DFU 141 #define CONFIG_DFU_NAND 142 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) 143 #define DFU_MANIFEST_POLL_TIMEOUT 25000 144 145 #define CONFIG_SYS_CACHELINE_SIZE SZ_8K 146 #endif 147 148 /* SPI EEPROM */ 149 #define CONFIG_SPI 150 #define CONFIG_CMD_SPI 151 #define CONFIG_CMD_SF 152 #define CONFIG_ATMEL_SPI 153 #define TAURUS_SPI_MASK (1 << 4) 154 #define TAURUS_SPI_CS_PIN AT91_PIN_PA3 155 156 #if defined(CONFIG_SPL_BUILD) 157 /* SPL related */ 158 #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ 159 #define CONFIG_SPL_SPI_SUPPORT 160 #define CONFIG_SPL_SPI_FLASH_SUPPORT 161 #define CONFIG_SPL_SPI_LOAD 162 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 163 164 #define CONFIG_SF_DEFAULT_BUS 0 165 #define CONFIG_SF_DEFAULT_SPEED 1000000 166 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 167 #endif 168 169 /* load address */ 170 #define CONFIG_SYS_LOAD_ADDR 0x22000000 171 172 /* bootstrap in spi flash , u-boot + env + linux in nandflash */ 173 #define CONFIG_ENV_IS_IN_NAND 174 #define CONFIG_ENV_OFFSET 0x100000 175 #define CONFIG_ENV_OFFSET_REDUND 0x180000 176 #define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */ 177 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" 178 179 #if defined(CONFIG_BOARD_TAURUS) 180 #define CONFIG_BOOTARGS_TAURUS \ 181 "console=ttyS0,115200 earlyprintk " \ 182 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 183 "256k(env),256k(env_redundant),256k(spare)," \ 184 "512k(dtb),6M(kernel)ro,-(rootfs) " \ 185 "root=/dev/mtdblock7 rw rootfstype=jffs2" 186 #endif 187 188 #if defined(CONFIG_BOARD_AXM) 189 #define CONFIG_BOOTARGS_AXM \ 190 "\0" \ 191 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \ 192 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \ 193 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \ 194 "baudrate=115200\0" \ 195 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \ 196 "boot_retries=0\0" \ 197 "bootcmd=run flash_self\0" \ 198 "bootdelay=3\0" \ 199 "ethact=macb0\0" \ 200 "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\ 201 "bootm ${kernel_ram};reset\0" \ 202 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \ 203 "bootm ${kernel_ram};reset\0" \ 204 "flash_self_test=run nand_kernel;run setbootargs addtest; " \ 205 "upgrade_available;bootm ${kernel_ram};reset\0" \ 206 "hostname=systemone\0" \ 207 "kernel_Off=0x00200000\0" \ 208 "kernel_Off_fallback=0x03800000\0" \ 209 "kernel_ram=0x21500000\0" \ 210 "kernel_size=0x00400000\0" \ 211 "kernel_size_fallback=0x00400000\0" \ 212 "loads_echo=1\0" \ 213 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \ 214 "${kernel_size}\0" \ 215 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \ 216 "run nfsargs;run addip;upgrade_available;bootm " \ 217 "${kernel_ram};reset\0" \ 218 "netdev=eth0\0" \ 219 "nfsargs=run root_path;setenv bootargs ${bootargs} " \ 220 "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \ 221 "at91sam9_wdt.wdt_timeout=16\0" \ 222 "partitionset_active=A\0" \ 223 "preboot=echo;echo Type 'run flash_self' to use kernel and root "\ 224 "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \ 225 "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\ 226 "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\ 227 "project_dir=systemone\0" \ 228 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\ 229 "rootfs=/dev/mtdblock5\0" \ 230 "rootfs_fallback=/dev/mtdblock7\0" \ 231 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\ 232 "root=${rootfs} rootfstype=jffs2 panic=7 " \ 233 "at91sam9_wdt.wdt_timeout=16\0" \ 234 "stderr=serial\0" \ 235 "stdin=serial\0" \ 236 "stdout=serial\0" \ 237 "upgrade_available=0\0" 238 #endif 239 240 #if defined(CONFIG_BOARD_TAURUS) 241 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS 242 #endif 243 244 #if defined(CONFIG_BOARD_AXM) 245 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM 246 #endif 247 248 #define CONFIG_SYS_CBSIZE 256 249 #define CONFIG_SYS_MAXARGS 16 250 #define CONFIG_SYS_PBSIZE \ 251 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 252 #define CONFIG_SYS_LONGHELP 253 #define CONFIG_CMDLINE_EDITING 254 #define CONFIG_AUTO_COMPLETE 255 256 /* 257 * Size of malloc() pool 258 */ 259 #define CONFIG_SYS_MALLOC_LEN \ 260 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000) 261 262 /* Defines for SPL */ 263 #define CONFIG_SPL_FRAMEWORK 264 #define CONFIG_SPL_TEXT_BASE 0x0 265 #define CONFIG_SPL_MAX_SIZE (31 * SZ_512) 266 #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K) 267 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ 268 CONFIG_SYS_MALLOC_LEN) 269 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 270 271 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE 272 #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512) 273 274 #define CONFIG_SPL_LIBCOMMON_SUPPORT 275 #define CONFIG_SPL_LIBGENERIC_SUPPORT 276 #define CONFIG_SPL_SERIAL_SUPPORT 277 278 #define CONFIG_SPL_BOARD_INIT 279 #define CONFIG_SPL_GPIO_SUPPORT 280 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) 281 #define CONFIG_SPL_NAND_SUPPORT 282 #define CONFIG_SYS_USE_NANDFLASH 1 283 #define CONFIG_SPL_NAND_DRIVERS 284 #define CONFIG_SPL_NAND_BASE 285 #define CONFIG_SPL_NAND_ECC 286 #define CONFIG_SPL_NAND_RAW_ONLY 287 #define CONFIG_SPL_NAND_SOFTECC 288 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 289 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K 290 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 291 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 292 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 293 294 #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M) 295 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K 296 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) 297 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 298 CONFIG_SYS_NAND_PAGE_SIZE) 299 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 300 #define CONFIG_SYS_NAND_ECCSIZE 256 301 #define CONFIG_SYS_NAND_ECCBYTES 3 302 #define CONFIG_SYS_NAND_OOBSIZE 64 303 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 304 48, 49, 50, 51, 52, 53, 54, 55, \ 305 56, 57, 58, 59, 60, 61, 62, 63, } 306 307 308 #define CONFIG_SPL_ATMEL_SIZE 309 #define CONFIG_SYS_MASTER_CLOCK 132096000 310 #define AT91_PLL_LOCK_TIMEOUT 1000000 311 #define CONFIG_SYS_AT91_PLLA 0x202A3F01 312 #define CONFIG_SYS_MCKR 0x1300 313 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) 314 #define CONFIG_SYS_AT91_PLLB 0x10193F05 315 316 #endif 317