xref: /rk3399_rockchip-uboot/include/configs/tam3517-common.h (revision e0820ccc38315d88192c19e98ea9b59d3ec7d4c8)
1f9c6fac4SStefano Babic /*
2f9c6fac4SStefano Babic  * Copyright (C) 2011
3f9c6fac4SStefano Babic  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4f9c6fac4SStefano Babic  *
5f9c6fac4SStefano Babic  * Copyright (C) 2009 TechNexion Ltd.
6f9c6fac4SStefano Babic  *
7f9c6fac4SStefano Babic  * This program is free software; you can redistribute it and/or modify
8f9c6fac4SStefano Babic  * it under the terms of the GNU General Public License as published by
9f9c6fac4SStefano Babic  * the Free Software Foundation; either version 2 of the License, or
10f9c6fac4SStefano Babic  * (at your option) any later version.
11f9c6fac4SStefano Babic  *
12f9c6fac4SStefano Babic  * This program is distributed in the hope that it will be useful,
13f9c6fac4SStefano Babic  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14f9c6fac4SStefano Babic  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15f9c6fac4SStefano Babic  * GNU General Public License for more details.
16f9c6fac4SStefano Babic  *
17f9c6fac4SStefano Babic  * You should have received a copy of the GNU General Public License
18f9c6fac4SStefano Babic  * along with this program; if not, write to the Free Software
19f9c6fac4SStefano Babic  * Foundation, Inc.
20f9c6fac4SStefano Babic  */
21f9c6fac4SStefano Babic 
22f9c6fac4SStefano Babic #ifndef __TAM3517_H
23f9c6fac4SStefano Babic #define __TAM3517_H
24f9c6fac4SStefano Babic 
25f9c6fac4SStefano Babic /*
26f9c6fac4SStefano Babic  * High Level Configuration Options
27f9c6fac4SStefano Babic  */
28f9c6fac4SStefano Babic #define CONFIG_OMAP		/* in a TI OMAP core */
29f9c6fac4SStefano Babic #define CONFIG_OMAP34XX		/* which is a 34XX */
30f9c6fac4SStefano Babic 
31f9c6fac4SStefano Babic #define CONFIG_SYS_TEXT_BASE 0x80008000
32f9c6fac4SStefano Babic 
33f9c6fac4SStefano Babic #define CONFIG_SYS_CACHELINE_SIZE	64
34f9c6fac4SStefano Babic 
35f9c6fac4SStefano Babic #define CONFIG_EMIF4	/* The chip has EMIF4 controller */
36f9c6fac4SStefano Babic 
37f9c6fac4SStefano Babic #include <asm/arch/cpu.h>		/* get chip and board defs */
38f9c6fac4SStefano Babic #include <asm/arch/omap3.h>
39f9c6fac4SStefano Babic 
40f9c6fac4SStefano Babic /*
41f9c6fac4SStefano Babic  * Display CPU and Board information
42f9c6fac4SStefano Babic  */
43f9c6fac4SStefano Babic #define CONFIG_DISPLAY_CPUINFO
44f9c6fac4SStefano Babic #define CONFIG_DISPLAY_BOARDINFO
45f9c6fac4SStefano Babic 
46f9c6fac4SStefano Babic /* Clock Defines */
47f9c6fac4SStefano Babic #define V_OSCK			26000000	/* Clock output from T2 */
48f9c6fac4SStefano Babic #define V_SCLK			(V_OSCK >> 1)
49f9c6fac4SStefano Babic 
50f9c6fac4SStefano Babic #undef CONFIG_USE_IRQ				/* no support for IRQs */
51f9c6fac4SStefano Babic #define CONFIG_MISC_INIT_R
52f9c6fac4SStefano Babic 
53f9c6fac4SStefano Babic #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
54f9c6fac4SStefano Babic #define CONFIG_SETUP_MEMORY_TAGS
55f9c6fac4SStefano Babic #define CONFIG_INITRD_TAG
56f9c6fac4SStefano Babic #define CONFIG_REVISION_TAG
57f9c6fac4SStefano Babic 
58f9c6fac4SStefano Babic /*
59f9c6fac4SStefano Babic  * Size of malloc() pool
60f9c6fac4SStefano Babic  */
61f9c6fac4SStefano Babic #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB sector */
62f9c6fac4SStefano Babic #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10) + \
63f9c6fac4SStefano Babic 					2 * 1024 * 1024)
64f9c6fac4SStefano Babic /*
65f9c6fac4SStefano Babic  * DDR related
66f9c6fac4SStefano Babic  */
67f9c6fac4SStefano Babic #define CONFIG_OMAP3_MICRON_DDR		/* Micron DDR */
68f9c6fac4SStefano Babic #define CONFIG_SYS_CS0_SIZE		(256 * 1024 * 1024)
69f9c6fac4SStefano Babic 
70f9c6fac4SStefano Babic /*
71f9c6fac4SStefano Babic  * Hardware drivers
72f9c6fac4SStefano Babic  */
73f9c6fac4SStefano Babic 
74f9c6fac4SStefano Babic /*
75f9c6fac4SStefano Babic  * NS16550 Configuration
76f9c6fac4SStefano Babic  */
77f9c6fac4SStefano Babic #define CONFIG_SYS_NS16550
78f9c6fac4SStefano Babic #define CONFIG_SYS_NS16550_SERIAL
79f9c6fac4SStefano Babic #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
80f9c6fac4SStefano Babic #define CONFIG_SYS_NS16550_CLK		48000000	/* 48MHz (APLL96/2) */
81f9c6fac4SStefano Babic 
82f9c6fac4SStefano Babic /*
83f9c6fac4SStefano Babic  * select serial console configuration
84f9c6fac4SStefano Babic  */
85f9c6fac4SStefano Babic #define CONFIG_CONS_INDEX		1
86f9c6fac4SStefano Babic #define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
87f9c6fac4SStefano Babic #define CONFIG_SERIAL1			/* UART1 */
88f9c6fac4SStefano Babic 
89f9c6fac4SStefano Babic /* allow to overwrite serial and ethaddr */
90f9c6fac4SStefano Babic #define CONFIG_ENV_OVERWRITE
91f9c6fac4SStefano Babic #define CONFIG_BAUDRATE			115200
92f9c6fac4SStefano Babic #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
93f9c6fac4SStefano Babic 					115200}
94f9c6fac4SStefano Babic #define CONFIG_MMC
95f9c6fac4SStefano Babic #define CONFIG_OMAP_HSMMC
96f9c6fac4SStefano Babic #define CONFIG_GENERIC_MMC
97f9c6fac4SStefano Babic #define CONFIG_DOS_PARTITION
98f9c6fac4SStefano Babic 
99f9c6fac4SStefano Babic /* EHCI */
100f9c6fac4SStefano Babic #define CONFIG_OMAP3_GPIO_5
101f9c6fac4SStefano Babic #define CONFIG_USB_EHCI
102f9c6fac4SStefano Babic #define CONFIG_USB_EHCI_OMAP
1038c589d6fSStefano Babic #define CONFIG_USB_ULPI
1048c589d6fSStefano Babic #define CONFIG_USB_ULPI_VIEWPORT_OMAP
105f9c6fac4SStefano Babic #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	25
106f9c6fac4SStefano Babic #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
107f9c6fac4SStefano Babic #define CONFIG_USB_STORAGE
108f9c6fac4SStefano Babic 
109f9c6fac4SStefano Babic /* #define CONFIG_EHCI_DCACHE */
110f9c6fac4SStefano Babic 
111f9c6fac4SStefano Babic /* commands to include */
112f9c6fac4SStefano Babic #include <config_cmd_default.h>
113f9c6fac4SStefano Babic 
114f9c6fac4SStefano Babic #define CONFIG_CMD_CACHE
115f9c6fac4SStefano Babic #define CONFIG_CMD_DHCP
116f9c6fac4SStefano Babic #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
117f9c6fac4SStefano Babic #define CONFIG_CMD_FAT		/* FAT support			*/
118f9c6fac4SStefano Babic #define CONFIG_CMD_GPIO
119f9c6fac4SStefano Babic #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
120f9c6fac4SStefano Babic #define CONFIG_CMD_MII
121f9c6fac4SStefano Babic #define CONFIG_CMD_MMC		/* MMC support			*/
122f9c6fac4SStefano Babic #define CONFIG_CMD_NET
123f9c6fac4SStefano Babic #define CONFIG_CMD_NFS
124f9c6fac4SStefano Babic #define CONFIG_CMD_NAND		/* NAND support			*/
125f9c6fac4SStefano Babic #define CONFIG_CMD_PING
126f9c6fac4SStefano Babic #define CONFIG_CMD_USB
127f9c6fac4SStefano Babic 
128f9c6fac4SStefano Babic #undef CONFIG_CMD_FLASH		/* only NAND on the SOM */
129f9c6fac4SStefano Babic #undef CONFIG_CMD_IMLS
130f9c6fac4SStefano Babic 
131f9c6fac4SStefano Babic #define CONFIG_SYS_NO_FLASH
132f9c6fac4SStefano Babic #define CONFIG_HARD_I2C
133f9c6fac4SStefano Babic #define CONFIG_SYS_I2C_SPEED		400000
134f9c6fac4SStefano Babic #define CONFIG_SYS_I2C_SLAVE		1
135f9c6fac4SStefano Babic #define CONFIG_SYS_I2C_BUS		0
136f9c6fac4SStefano Babic #define CONFIG_SYS_I2C_BUS_SELECT	1
137f9c6fac4SStefano Babic #define CONFIG_DRIVER_OMAP34XX_I2C
138f9c6fac4SStefano Babic 
139f9c6fac4SStefano Babic 
140f9c6fac4SStefano Babic /*
141f9c6fac4SStefano Babic  * Board NAND Info.
142f9c6fac4SStefano Babic  */
143f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
144f9c6fac4SStefano Babic 							/* to access */
145f9c6fac4SStefano Babic 							/* nand at CS0 */
146f9c6fac4SStefano Babic 
147f9c6fac4SStefano Babic #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of */
148f9c6fac4SStefano Babic 							/* NAND devices */
149f9c6fac4SStefano Babic 
150f9c6fac4SStefano Babic #define CONFIG_AUTO_COMPLETE
151f9c6fac4SStefano Babic 
152f9c6fac4SStefano Babic /*
153f9c6fac4SStefano Babic  * Miscellaneous configurable options
154f9c6fac4SStefano Babic  */
155f9c6fac4SStefano Babic #define CONFIG_SYS_LONGHELP		/* undef to save memory */
156f9c6fac4SStefano Babic #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
157f9c6fac4SStefano Babic #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
158f9c6fac4SStefano Babic #define CONFIG_CMDLINE_EDITING
159f9c6fac4SStefano Babic #define CONFIG_AUTO_COMPLETE
160f9c6fac4SStefano Babic #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
161f9c6fac4SStefano Babic 
162f9c6fac4SStefano Babic /* Print Buffer Size */
163f9c6fac4SStefano Babic #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
164f9c6fac4SStefano Babic 					sizeof(CONFIG_SYS_PROMPT) + 16)
165f9c6fac4SStefano Babic #define CONFIG_SYS_MAXARGS		32	/* max number of command */
166f9c6fac4SStefano Babic 						/* args */
167f9c6fac4SStefano Babic /* Boot Argument Buffer Size */
168f9c6fac4SStefano Babic #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
169f9c6fac4SStefano Babic /* memtest works on */
170f9c6fac4SStefano Babic #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
171f9c6fac4SStefano Babic #define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
172f9c6fac4SStefano Babic 					0x01F00000) /* 31MB */
173f9c6fac4SStefano Babic 
174f9c6fac4SStefano Babic #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
175f9c6fac4SStefano Babic 								/* address */
176f9c6fac4SStefano Babic 
177f9c6fac4SStefano Babic /*
178f9c6fac4SStefano Babic  * AM3517 has 12 GP timers, they can be driven by the system clock
179f9c6fac4SStefano Babic  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
180f9c6fac4SStefano Babic  * This rate is divided by a local divisor.
181f9c6fac4SStefano Babic  */
182f9c6fac4SStefano Babic #define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
183f9c6fac4SStefano Babic #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
184f9c6fac4SStefano Babic #define CONFIG_SYS_HZ			1000
185f9c6fac4SStefano Babic 
186f9c6fac4SStefano Babic /*
187f9c6fac4SStefano Babic  * Stack sizes
188f9c6fac4SStefano Babic  * The stack sizes are set up in start.S using the settings below
189f9c6fac4SStefano Babic  */
190f9c6fac4SStefano Babic #define CONFIG_STACKSIZE	(128 << 10)	/* regular stack 128 KiB */
191f9c6fac4SStefano Babic 
192f9c6fac4SStefano Babic /*
193f9c6fac4SStefano Babic  * Physical Memory Map
194f9c6fac4SStefano Babic  */
195f9c6fac4SStefano Babic #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
196f9c6fac4SStefano Babic #define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
197f9c6fac4SStefano Babic #define PHYS_SDRAM_1_SIZE	(32 << 20)	/* at least 32 MiB */
198f9c6fac4SStefano Babic #define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
199f9c6fac4SStefano Babic 
200f9c6fac4SStefano Babic /*
201f9c6fac4SStefano Babic  * FLASH and environment organization
202f9c6fac4SStefano Babic  */
203f9c6fac4SStefano Babic 
204f9c6fac4SStefano Babic /* **** PISMO SUPPORT *** */
205f9c6fac4SStefano Babic 
206f9c6fac4SStefano Babic /* Configure the PISMO */
207f9c6fac4SStefano Babic #define PISMO1_NAND_SIZE		GPMC_SIZE_128M
208f9c6fac4SStefano Babic 
209f9c6fac4SStefano Babic #define CONFIG_NAND_OMAP_GPMC
210f9c6fac4SStefano Babic #define GPMC_NAND_ECC_LP_x16_LAYOUT
211f9c6fac4SStefano Babic #define CONFIG_ENV_IS_IN_NAND
212f9c6fac4SStefano Babic #define SMNAND_ENV_OFFSET		0x180000 /* environment starts here */
213f9c6fac4SStefano Babic 
214f9c6fac4SStefano Babic /* Redundant Environment */
215f9c6fac4SStefano Babic #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
216f9c6fac4SStefano Babic #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
217f9c6fac4SStefano Babic #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
218f9c6fac4SStefano Babic #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
219f9c6fac4SStefano Babic 						2 * CONFIG_SYS_ENV_SECT_SIZE)
220f9c6fac4SStefano Babic #define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
221f9c6fac4SStefano Babic 
222f9c6fac4SStefano Babic #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
223f9c6fac4SStefano Babic #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
224f9c6fac4SStefano Babic #define CONFIG_SYS_INIT_RAM_SIZE	0x800
225f9c6fac4SStefano Babic #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
226f9c6fac4SStefano Babic 					 CONFIG_SYS_INIT_RAM_SIZE - \
227f9c6fac4SStefano Babic 					 GENERATED_GBL_DATA_SIZE)
228f9c6fac4SStefano Babic 
229f9c6fac4SStefano Babic /*
230f9c6fac4SStefano Babic  * ethernet support, EMAC
231f9c6fac4SStefano Babic  *
232f9c6fac4SStefano Babic  */
233f9c6fac4SStefano Babic #define CONFIG_DRIVER_TI_EMAC
234f9c6fac4SStefano Babic #define CONFIG_DRIVER_TI_EMAC_USE_RMII
235f9c6fac4SStefano Babic #define CONFIG_MII
236f9c6fac4SStefano Babic #define CONFIG_EMAC_MDIO_PHY_NUM	0
237f9c6fac4SStefano Babic #define CONFIG_BOOTP_DEFAULT
238f9c6fac4SStefano Babic #define CONFIG_BOOTP_DNS
239f9c6fac4SStefano Babic #define CONFIG_BOOTP_DNS2
240f9c6fac4SStefano Babic #define CONFIG_BOOTP_SEND_HOSTNAME
241f9c6fac4SStefano Babic #define CONFIG_NET_RETRY_COUNT 10
242f9c6fac4SStefano Babic 
243f9c6fac4SStefano Babic /* Defines for SPL */
244f9c6fac4SStefano Babic #define CONFIG_SPL
245f9c6fac4SStefano Babic #define CONFIG_SPL_CONSOLE
246f9c6fac4SStefano Babic #define CONFIG_SPL_NAND_SIMPLE
247f9c6fac4SStefano Babic #define CONFIG_SPL_NAND_SOFTECC
248f9c6fac4SStefano Babic #define CONFIG_SPL_NAND_WORKSPACE	0x8f07f000 /* below BSS */
249f9c6fac4SStefano Babic 
250f9c6fac4SStefano Babic #define CONFIG_SPL_LIBCOMMON_SUPPORT
251f9c6fac4SStefano Babic #define CONFIG_SPL_LIBDISK_SUPPORT
252f9c6fac4SStefano Babic #define CONFIG_SPL_I2C_SUPPORT
253f9c6fac4SStefano Babic #define CONFIG_SPL_LIBGENERIC_SUPPORT
254f9c6fac4SStefano Babic #define CONFIG_SPL_SERIAL_SUPPORT
255f9c6fac4SStefano Babic #define CONFIG_SPL_POWER_SUPPORT
256f9c6fac4SStefano Babic #define CONFIG_SPL_NAND_SUPPORT
257f9c6fac4SStefano Babic #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
258f9c6fac4SStefano Babic 
259f9c6fac4SStefano Babic #define CONFIG_SPL_TEXT_BASE		0x40200000 /*CONFIG_SYS_SRAM_START*/
260*e0820cccSTom Rini #define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
261f9c6fac4SStefano Babic #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
262f9c6fac4SStefano Babic 
263f9c6fac4SStefano Babic #define CONFIG_SYS_SPL_MALLOC_START	0x8f000000
264f9c6fac4SStefano Babic #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
265f9c6fac4SStefano Babic #define CONFIG_SPL_BSS_START_ADDR	0x8f080000 /* end of RAM */
266f9c6fac4SStefano Babic #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
267f9c6fac4SStefano Babic 
268f9c6fac4SStefano Babic /* NAND boot config */
269f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_PAGE_COUNT	64
270f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_PAGE_SIZE	2048
271f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_OOBSIZE		64
272f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
273f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_5_ADDR_CYCLE
274f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
275f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_ECCPOS		{40, 41, 42, 43, 44, 45, 46, 47,\
276f9c6fac4SStefano Babic 					 48, 49, 50, 51, 52, 53, 54, 55,\
277f9c6fac4SStefano Babic 					 56, 57, 58, 59, 60, 61, 62, 63}
278f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_ECCSIZE		256
279f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_ECCBYTES	3
280f9c6fac4SStefano Babic 
281f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
282f9c6fac4SStefano Babic 
283f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
284f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_U_BOOT_SIZE	0x80000
285f9c6fac4SStefano Babic 
286f9c6fac4SStefano Babic #define CONFIG_OF_LIBFDT
287f9c6fac4SStefano Babic #define CONFIG_FIT
288f9c6fac4SStefano Babic #define CONFIG_CMD_UBI
289f9c6fac4SStefano Babic #define CONFIG_CMD_UBIFS
290f9c6fac4SStefano Babic #define CONFIG_RBTREE
291f9c6fac4SStefano Babic #define CONFIG_LZO
292f9c6fac4SStefano Babic #define CONFIG_MTD_PARTITIONS
293f9c6fac4SStefano Babic #define CONFIG_MTD_DEVICE
294f9c6fac4SStefano Babic #define CONFIG_CMD_MTDPARTS
295f9c6fac4SStefano Babic 
296f9c6fac4SStefano Babic /* Setup MTD for NAND on the SOM */
297f9c6fac4SStefano Babic #define MTDIDS_DEFAULT		"nand0=omap2-nand.0"
298f9c6fac4SStefano Babic #define MTDPARTS_DEFAULT	"mtdparts=omap2-nand.0:512k(MLO)," \
2991fdabeddSStefano Babic 				"1m(u-boot),256k(env1)," \
3001fdabeddSStefano Babic 				"256k(env2),6m(kernel),-(rootfs)"
301f9c6fac4SStefano Babic 
302f9c6fac4SStefano Babic #define xstr(s)	str(s)
303f9c6fac4SStefano Babic #define str(s)	#s
304f9c6fac4SStefano Babic 
305f9c6fac4SStefano Babic #define	CONFIG_TAM3517_SETTINGS						\
306f9c6fac4SStefano Babic 	"netdev=eth0\0"							\
307f9c6fac4SStefano Babic 	"nandargs=setenv bootargs root=${nandroot} "			\
308f9c6fac4SStefano Babic 		"rootfstype=${nandrootfstype}\0"			\
309f9c6fac4SStefano Babic 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
310f9c6fac4SStefano Babic 		"nfsroot=${serverip}:${rootpath}\0"			\
311f9c6fac4SStefano Babic 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
312f9c6fac4SStefano Babic 	"addip_sta=setenv bootargs ${bootargs} "			\
313f9c6fac4SStefano Babic 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
314f9c6fac4SStefano Babic 		":${hostname}:${netdev}:off panic=1\0"			\
315f9c6fac4SStefano Babic 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
316f9c6fac4SStefano Babic 	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
317f9c6fac4SStefano Babic 		"else run addip_sta;fi\0"				\
318f9c6fac4SStefano Babic 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
319f9c6fac4SStefano Babic 	"addtty=setenv bootargs ${bootargs}"				\
320f9c6fac4SStefano Babic 		" console=ttyO0,${baudrate}\0"				\
321f9c6fac4SStefano Babic 	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
322f9c6fac4SStefano Babic 	"loadaddr=82000000\0"						\
323f9c6fac4SStefano Babic 	"kernel_addr_r=82000000\0"					\
324f9c6fac4SStefano Babic 	"hostname=" xstr(CONFIG_HOSTNAME) "\0"				\
325f9c6fac4SStefano Babic 	"bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0"			\
326f9c6fac4SStefano Babic 	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
327f9c6fac4SStefano Babic 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
328f9c6fac4SStefano Babic 	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
329f9c6fac4SStefano Babic 		"bootm ${kernel_addr}\0"				\
330f9c6fac4SStefano Babic 	"nandboot=run nandargs addip addtty addmtd addmisc;"		\
331f9c6fac4SStefano Babic 		"nand read ${kernel_addr_r} kernel\0"			\
332f9c6fac4SStefano Babic 		"bootm ${kernel_addr_r}\0"				\
333f9c6fac4SStefano Babic 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
334f9c6fac4SStefano Babic 		"run nfsargs addip addtty addmtd addmisc;"		\
335f9c6fac4SStefano Babic 		"bootm ${kernel_addr_r}\0"				\
336f9c6fac4SStefano Babic 	"net_self=if run net_self_load;then "				\
337f9c6fac4SStefano Babic 		"run ramargs addip addtty addmtd addmisc;"		\
338f9c6fac4SStefano Babic 		"bootm ${kernel_addr_r} ${ramdisk_addr_r};"		\
339f9c6fac4SStefano Babic 		"else echo Images not loades;fi\0"			\
340f9c6fac4SStefano Babic 	"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.img\0"			\
341f9c6fac4SStefano Babic 	"load=tftp ${loadaddr} ${u-boot}\0"				\
342f9c6fac4SStefano Babic 	"loadmlo=tftp ${loadaddr} ${mlo}\0"				\
343f9c6fac4SStefano Babic 	"mlo=" xstr(CONFIG_HOSTNAME) "/MLO\0"				\
344f9c6fac4SStefano Babic 	"uboot_addr=0x80000\0"						\
345f9c6fac4SStefano Babic 	"update=nandecc sw;nand erase ${uboot_addr} 100000;"		\
346f9c6fac4SStefano Babic 		"nand write ${loadaddr} ${uboot_addr} 80000\0"		\
347f9c6fac4SStefano Babic 	"updatemlo=nandecc hw;nand erase 0 20000;"			\
348f9c6fac4SStefano Babic 		"nand write ${loadaddr} 0 20000\0"			\
349f9c6fac4SStefano Babic 	"upd=if run load;then echo Updating u-boot;if run update;"	\
350f9c6fac4SStefano Babic 		"then echo U-Boot updated;"				\
351f9c6fac4SStefano Babic 			"else echo Error updating u-boot !;"		\
352f9c6fac4SStefano Babic 			"echo Board without bootloader !!;"		\
353f9c6fac4SStefano Babic 		"fi;"							\
354f9c6fac4SStefano Babic 		"else echo U-Boot not downloaded..exiting;fi\0"		\
355f9c6fac4SStefano Babic 
356f9c6fac4SStefano Babic #endif /* __TAM3517_H */
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