1f9c6fac4SStefano Babic /* 2f9c6fac4SStefano Babic * Copyright (C) 2011 3f9c6fac4SStefano Babic * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 4f9c6fac4SStefano Babic * 5f9c6fac4SStefano Babic * Copyright (C) 2009 TechNexion Ltd. 6f9c6fac4SStefano Babic * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 8f9c6fac4SStefano Babic */ 9f9c6fac4SStefano Babic 10f9c6fac4SStefano Babic #ifndef __TAM3517_H 11f9c6fac4SStefano Babic #define __TAM3517_H 12f9c6fac4SStefano Babic 13f9c6fac4SStefano Babic /* 14f9c6fac4SStefano Babic * High Level Configuration Options 15f9c6fac4SStefano Babic */ 16f9c6fac4SStefano Babic 17f9c6fac4SStefano Babic #define CONFIG_SYS_TEXT_BASE 0x80008000 18f9c6fac4SStefano Babic 19f9c6fac4SStefano Babic #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 20f9c6fac4SStefano Babic 21f9c6fac4SStefano Babic #include <asm/arch/cpu.h> /* get chip and board defs */ 22987ec585SNishanth Menon #include <asm/arch/omap.h> 23f9c6fac4SStefano Babic 24f9c6fac4SStefano Babic /* Clock Defines */ 25f9c6fac4SStefano Babic #define V_OSCK 26000000 /* Clock output from T2 */ 26f9c6fac4SStefano Babic #define V_SCLK (V_OSCK >> 1) 27f9c6fac4SStefano Babic 28f9c6fac4SStefano Babic #define CONFIG_MISC_INIT_R 29f9c6fac4SStefano Babic 30f9c6fac4SStefano Babic #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 31f9c6fac4SStefano Babic #define CONFIG_SETUP_MEMORY_TAGS 32f9c6fac4SStefano Babic #define CONFIG_INITRD_TAG 33f9c6fac4SStefano Babic #define CONFIG_REVISION_TAG 34f9c6fac4SStefano Babic 35f9c6fac4SStefano Babic /* 36f9c6fac4SStefano Babic * Size of malloc() pool 37f9c6fac4SStefano Babic */ 38f9c6fac4SStefano Babic #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 39f9c6fac4SStefano Babic #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \ 40f9c6fac4SStefano Babic 2 * 1024 * 1024) 41f9c6fac4SStefano Babic /* 42f9c6fac4SStefano Babic * DDR related 43f9c6fac4SStefano Babic */ 44f9c6fac4SStefano Babic #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 45f9c6fac4SStefano Babic 46f9c6fac4SStefano Babic /* 47f9c6fac4SStefano Babic * Hardware drivers 48f9c6fac4SStefano Babic */ 49f9c6fac4SStefano Babic 50f9c6fac4SStefano Babic /* 51f9c6fac4SStefano Babic * NS16550 Configuration 52f9c6fac4SStefano Babic */ 53f9c6fac4SStefano Babic #define CONFIG_SYS_NS16550_SERIAL 54f9c6fac4SStefano Babic #define CONFIG_SYS_NS16550_REG_SIZE (-4) 55f9c6fac4SStefano Babic #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 56f9c6fac4SStefano Babic 57f9c6fac4SStefano Babic /* 58f9c6fac4SStefano Babic * select serial console configuration 59f9c6fac4SStefano Babic */ 60f9c6fac4SStefano Babic #define CONFIG_CONS_INDEX 1 61f9c6fac4SStefano Babic #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 62f9c6fac4SStefano Babic #define CONFIG_SERIAL1 /* UART1 */ 63f9c6fac4SStefano Babic 64f9c6fac4SStefano Babic /* allow to overwrite serial and ethaddr */ 65f9c6fac4SStefano Babic #define CONFIG_ENV_OVERWRITE 66f9c6fac4SStefano Babic #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 67f9c6fac4SStefano Babic 115200} 68f9c6fac4SStefano Babic /* EHCI */ 69f9c6fac4SStefano Babic #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25 70f9c6fac4SStefano Babic 716789e84eSHeiko Schocher #define CONFIG_SYS_I2C 726789e84eSHeiko Schocher #define CONFIG_SYS_OMAP24_I2C_SPEED 400000 736789e84eSHeiko Schocher #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 748103c6f0SStefano Babic #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */ 758103c6f0SStefano Babic #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 768103c6f0SStefano Babic #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07 77f9c6fac4SStefano Babic 78f9c6fac4SStefano Babic /* 79f9c6fac4SStefano Babic * Board NAND Info. 80f9c6fac4SStefano Babic */ 81f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 82f9c6fac4SStefano Babic /* to access */ 83f9c6fac4SStefano Babic /* nand at CS0 */ 84f9c6fac4SStefano Babic 85f9c6fac4SStefano Babic #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 86f9c6fac4SStefano Babic /* NAND devices */ 87f9c6fac4SStefano Babic 88f9c6fac4SStefano Babic #define CONFIG_AUTO_COMPLETE 89f9c6fac4SStefano Babic 90f9c6fac4SStefano Babic /* 91f9c6fac4SStefano Babic * Miscellaneous configurable options 92f9c6fac4SStefano Babic */ 93f9c6fac4SStefano Babic #define CONFIG_SYS_LONGHELP /* undef to save memory */ 94f9c6fac4SStefano Babic #define CONFIG_CMDLINE_EDITING 95f9c6fac4SStefano Babic #define CONFIG_AUTO_COMPLETE 96f9c6fac4SStefano Babic #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 97f9c6fac4SStefano Babic 98f9c6fac4SStefano Babic #define CONFIG_SYS_MAXARGS 32 /* max number of command */ 99f9c6fac4SStefano Babic /* args */ 100f9c6fac4SStefano Babic /* memtest works on */ 101f9c6fac4SStefano Babic #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 102f9c6fac4SStefano Babic #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 103f9c6fac4SStefano Babic 0x01F00000) /* 31MB */ 104f9c6fac4SStefano Babic 105f9c6fac4SStefano Babic #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 106f9c6fac4SStefano Babic /* address */ 107f9c6fac4SStefano Babic 108f9c6fac4SStefano Babic /* 109f9c6fac4SStefano Babic * AM3517 has 12 GP timers, they can be driven by the system clock 110f9c6fac4SStefano Babic * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 111f9c6fac4SStefano Babic * This rate is divided by a local divisor. 112f9c6fac4SStefano Babic */ 113f9c6fac4SStefano Babic #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 114f9c6fac4SStefano Babic #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 115f9c6fac4SStefano Babic 116f9c6fac4SStefano Babic /* 117f9c6fac4SStefano Babic * Physical Memory Map 118f9c6fac4SStefano Babic */ 119f9c6fac4SStefano Babic #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 120f9c6fac4SStefano Babic #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 121f9c6fac4SStefano Babic #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 122f9c6fac4SStefano Babic 123f9c6fac4SStefano Babic /* 124f9c6fac4SStefano Babic * FLASH and environment organization 125f9c6fac4SStefano Babic */ 126f9c6fac4SStefano Babic 127f9c6fac4SStefano Babic /* **** PISMO SUPPORT *** */ 128f9c6fac4SStefano Babic 129f9c6fac4SStefano Babic /* Redundant Environment */ 130f9c6fac4SStefano Babic #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 131f9c6fac4SStefano Babic #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 132f9c6fac4SStefano Babic #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 133f9c6fac4SStefano Babic #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 134f9c6fac4SStefano Babic 2 * CONFIG_SYS_ENV_SECT_SIZE) 135f9c6fac4SStefano Babic #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 136f9c6fac4SStefano Babic 137f9c6fac4SStefano Babic #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 138f9c6fac4SStefano Babic #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 139f9c6fac4SStefano Babic #define CONFIG_SYS_INIT_RAM_SIZE 0x800 140f9c6fac4SStefano Babic #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 141f9c6fac4SStefano Babic CONFIG_SYS_INIT_RAM_SIZE - \ 142f9c6fac4SStefano Babic GENERATED_GBL_DATA_SIZE) 143f9c6fac4SStefano Babic 144f9c6fac4SStefano Babic /* 145f9c6fac4SStefano Babic * ethernet support, EMAC 146f9c6fac4SStefano Babic * 147f9c6fac4SStefano Babic */ 148f9c6fac4SStefano Babic #define CONFIG_DRIVER_TI_EMAC 149f9c6fac4SStefano Babic #define CONFIG_DRIVER_TI_EMAC_USE_RMII 150f9c6fac4SStefano Babic #define CONFIG_MII 151f9c6fac4SStefano Babic #define CONFIG_BOOTP_DNS 152f9c6fac4SStefano Babic #define CONFIG_BOOTP_DNS2 153f9c6fac4SStefano Babic #define CONFIG_BOOTP_SEND_HOSTNAME 154f9c6fac4SStefano Babic #define CONFIG_NET_RETRY_COUNT 10 155f9c6fac4SStefano Babic 156f9c6fac4SStefano Babic /* Defines for SPL */ 15747f7bcaeSTom Rini #define CONFIG_SPL_FRAMEWORK 158f9c6fac4SStefano Babic #define CONFIG_SPL_CONSOLE 1598ad59c9aSJeroen Hofstee #define CONFIG_SPL_NAND_SOFTECC 160f9c6fac4SStefano Babic #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ 161f9c6fac4SStefano Babic 1626f2f01b9SScott Wood #define CONFIG_SPL_NAND_BASE 1636f2f01b9SScott Wood #define CONFIG_SPL_NAND_DRIVERS 1646f2f01b9SScott Wood #define CONFIG_SPL_NAND_ECC 165f9c6fac4SStefano Babic 166f9c6fac4SStefano Babic #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 167fa2f81b0STom Rini #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 168fa2f81b0STom Rini CONFIG_SPL_TEXT_BASE) 169f51c8a99SStefano Babic #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 170f9c6fac4SStefano Babic 171f9c6fac4SStefano Babic #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 172f9c6fac4SStefano Babic #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 173f9c6fac4SStefano Babic #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 174f9c6fac4SStefano Babic #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 175f9c6fac4SStefano Babic 176f51c8a99SStefano Babic #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 177f51c8a99SStefano Babic #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 178f51c8a99SStefano Babic 179f51c8a99SStefano Babic /* FAT */ 180f51c8a99SStefano Babic #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 181f51c8a99SStefano Babic #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 182f51c8a99SStefano Babic 183f51c8a99SStefano Babic /* RAW SD card / eMMC */ 184f51c8a99SStefano Babic #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ 185f51c8a99SStefano Babic #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ 186f51c8a99SStefano Babic #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ 187f51c8a99SStefano Babic 188f9c6fac4SStefano Babic /* NAND boot config */ 189f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_PAGE_COUNT 64 190f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_PAGE_SIZE 2048 191f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_OOBSIZE 64 192f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 193f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_5_ADDR_CYCLE 194f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 195f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 196f9c6fac4SStefano Babic 48, 49, 50, 51, 52, 53, 54, 55,\ 197f9c6fac4SStefano Babic 56, 57, 58, 59, 60, 61, 62, 63} 198f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_ECCSIZE 256 199f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_ECCBYTES 3 2003f719069Spekon gupta #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 201f9c6fac4SStefano Babic 202f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 203f9c6fac4SStefano Babic 204f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 205f9c6fac4SStefano Babic #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 206f9c6fac4SStefano Babic 207f9c6fac4SStefano Babic /* Setup MTD for NAND on the SOM */ 208f9c6fac4SStefano Babic #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 209f9c6fac4SStefano Babic #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ 2101fdabeddSStefano Babic "1m(u-boot),256k(env1)," \ 2111fdabeddSStefano Babic "256k(env2),6m(kernel),-(rootfs)" 212f9c6fac4SStefano Babic 213f9c6fac4SStefano Babic #define CONFIG_TAM3517_SETTINGS \ 214f9c6fac4SStefano Babic "netdev=eth0\0" \ 215f9c6fac4SStefano Babic "nandargs=setenv bootargs root=${nandroot} " \ 216f9c6fac4SStefano Babic "rootfstype=${nandrootfstype}\0" \ 217f9c6fac4SStefano Babic "nfsargs=setenv bootargs root=/dev/nfs rw " \ 218f9c6fac4SStefano Babic "nfsroot=${serverip}:${rootpath}\0" \ 219f9c6fac4SStefano Babic "ramargs=setenv bootargs root=/dev/ram rw\0" \ 220f9c6fac4SStefano Babic "addip_sta=setenv bootargs ${bootargs} " \ 221f9c6fac4SStefano Babic "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 222f9c6fac4SStefano Babic ":${hostname}:${netdev}:off panic=1\0" \ 223f9c6fac4SStefano Babic "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 224f9c6fac4SStefano Babic "addip=if test -n ${ipdyn};then run addip_dyn;" \ 225f9c6fac4SStefano Babic "else run addip_sta;fi\0" \ 226f9c6fac4SStefano Babic "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 227f9c6fac4SStefano Babic "addtty=setenv bootargs ${bootargs}" \ 228f9c6fac4SStefano Babic " console=ttyO0,${baudrate}\0" \ 229f9c6fac4SStefano Babic "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 230f9c6fac4SStefano Babic "loadaddr=82000000\0" \ 231f9c6fac4SStefano Babic "kernel_addr_r=82000000\0" \ 23293ea89f0SMarek Vasut "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 23393ea89f0SMarek Vasut "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 234f9c6fac4SStefano Babic "flash_self=run ramargs addip addtty addmtd addmisc;" \ 235f9c6fac4SStefano Babic "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 236f9c6fac4SStefano Babic "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 237f9c6fac4SStefano Babic "bootm ${kernel_addr}\0" \ 238f9c6fac4SStefano Babic "nandboot=run nandargs addip addtty addmtd addmisc;" \ 239f9c6fac4SStefano Babic "nand read ${kernel_addr_r} kernel\0" \ 240f9c6fac4SStefano Babic "bootm ${kernel_addr_r}\0" \ 241f9c6fac4SStefano Babic "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 242f9c6fac4SStefano Babic "run nfsargs addip addtty addmtd addmisc;" \ 243f9c6fac4SStefano Babic "bootm ${kernel_addr_r}\0" \ 244f9c6fac4SStefano Babic "net_self=if run net_self_load;then " \ 245f9c6fac4SStefano Babic "run ramargs addip addtty addmtd addmisc;" \ 246f9c6fac4SStefano Babic "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 247f9c6fac4SStefano Babic "else echo Images not loades;fi\0" \ 24893ea89f0SMarek Vasut "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \ 249f9c6fac4SStefano Babic "load=tftp ${loadaddr} ${u-boot}\0" \ 250f9c6fac4SStefano Babic "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 25193ea89f0SMarek Vasut "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \ 252f9c6fac4SStefano Babic "uboot_addr=0x80000\0" \ 253f9c6fac4SStefano Babic "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 254f9c6fac4SStefano Babic "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 255f9c6fac4SStefano Babic "updatemlo=nandecc hw;nand erase 0 20000;" \ 256f9c6fac4SStefano Babic "nand write ${loadaddr} 0 20000\0" \ 257f9c6fac4SStefano Babic "upd=if run load;then echo Updating u-boot;if run update;" \ 258f9c6fac4SStefano Babic "then echo U-Boot updated;" \ 259f9c6fac4SStefano Babic "else echo Error updating u-boot !;" \ 260f9c6fac4SStefano Babic "echo Board without bootloader !!;" \ 261f9c6fac4SStefano Babic "fi;" \ 262f9c6fac4SStefano Babic "else echo U-Boot not downloaded..exiting;fi\0" \ 263f9c6fac4SStefano Babic 2648103c6f0SStefano Babic /* 2658103c6f0SStefano Babic * this is common code for all TAM3517 boards. 2668103c6f0SStefano Babic * MAC address is stored from manufacturer in 2678103c6f0SStefano Babic * I2C EEPROM 2688103c6f0SStefano Babic */ 2698103c6f0SStefano Babic #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) 2708103c6f0SStefano Babic /* 2718103c6f0SStefano Babic * The I2C EEPROM on the TAM3517 contains 2728103c6f0SStefano Babic * mac address and production data 2738103c6f0SStefano Babic */ 2748103c6f0SStefano Babic struct tam3517_module_info { 2758103c6f0SStefano Babic char customer[48]; 2768103c6f0SStefano Babic char product[48]; 2778103c6f0SStefano Babic 2788103c6f0SStefano Babic /* 2798103c6f0SStefano Babic * bit 0~47 : sequence number 2808103c6f0SStefano Babic * bit 48~55 : week of year, from 0. 2818103c6f0SStefano Babic * bit 56~63 : year 2828103c6f0SStefano Babic */ 2838103c6f0SStefano Babic unsigned long long sequence_number; 2848103c6f0SStefano Babic 2858103c6f0SStefano Babic /* 2868103c6f0SStefano Babic * bit 0~7 : revision fixed 2878103c6f0SStefano Babic * bit 8~15 : revision major 2888103c6f0SStefano Babic * bit 16~31 : TNxxx 2898103c6f0SStefano Babic */ 2908103c6f0SStefano Babic unsigned int revision; 2918103c6f0SStefano Babic unsigned char eth_addr[4][8]; 2928103c6f0SStefano Babic unsigned char _rev[100]; 2938103c6f0SStefano Babic }; 2948103c6f0SStefano Babic 29531f5b651SStefano Babic #define TAM3517_READ_EEPROM(info, ret) \ 2968103c6f0SStefano Babic do { \ 2976789e84eSHeiko Schocher i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \ 2988103c6f0SStefano Babic if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \ 29931f5b651SStefano Babic (void *)info, sizeof(*info))) \ 30031f5b651SStefano Babic ret = 1; \ 30131f5b651SStefano Babic else \ 30231f5b651SStefano Babic ret = 0; \ 30331f5b651SStefano Babic } while (0) 30431f5b651SStefano Babic 30531f5b651SStefano Babic #define TAM3517_READ_MAC_FROM_EEPROM(info) \ 30631f5b651SStefano Babic do { \ 30731f5b651SStefano Babic char buf[80], ethname[20]; \ 30831f5b651SStefano Babic int i; \ 3098103c6f0SStefano Babic memset(buf, 0, sizeof(buf)); \ 31031f5b651SStefano Babic for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \ 3118103c6f0SStefano Babic sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \ 31231f5b651SStefano Babic (info)->eth_addr[i][5], \ 31331f5b651SStefano Babic (info)->eth_addr[i][4], \ 31431f5b651SStefano Babic (info)->eth_addr[i][3], \ 31531f5b651SStefano Babic (info)->eth_addr[i][2], \ 31631f5b651SStefano Babic (info)->eth_addr[i][1], \ 31731f5b651SStefano Babic (info)->eth_addr[i][0]); \ 3188103c6f0SStefano Babic \ 3198103c6f0SStefano Babic if (i) \ 3208103c6f0SStefano Babic sprintf(ethname, "eth%daddr", i); \ 3218103c6f0SStefano Babic else \ 322192bc694SBen Whitten strcpy(ethname, "ethaddr"); \ 3238103c6f0SStefano Babic printf("Setting %s from EEPROM with %s\n", ethname, buf);\ 324*382bee57SSimon Glass env_set(ethname, buf); \ 3258103c6f0SStefano Babic } \ 3268103c6f0SStefano Babic } while (0) 32731f5b651SStefano Babic 32831f5b651SStefano Babic /* The following macros are taken from Technexion's documentation */ 32931f5b651SStefano Babic #define TAM3517_sequence_number(info) \ 33031f5b651SStefano Babic ((info)->sequence_number % 0x1000000000000LL) 33131f5b651SStefano Babic #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100) 33231f5b651SStefano Babic #define TAM3517_year(info) ((info)->sequence_number >> 56) 33331f5b651SStefano Babic #define TAM3517_revision_fixed(info) ((info)->revision % 0x100) 33431f5b651SStefano Babic #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100) 33531f5b651SStefano Babic #define TAM3517_revision_tn(info) ((info)->revision >> 16) 33631f5b651SStefano Babic 33731f5b651SStefano Babic #define TAM3517_PRINT_SOM_INFO(info) \ 33831f5b651SStefano Babic do { \ 33931f5b651SStefano Babic printf("Vendor:%s\n", (info)->customer); \ 34031f5b651SStefano Babic printf("SOM: %s\n", (info)->product); \ 34131f5b651SStefano Babic printf("SeqNr: %02llu%02llu%012llu\n", \ 34231f5b651SStefano Babic TAM3517_year(info), \ 34331f5b651SStefano Babic TAM3517_week_of_year(info), \ 34431f5b651SStefano Babic TAM3517_sequence_number(info)); \ 34531f5b651SStefano Babic printf("Rev: TN%u %u.%u\n", \ 34631f5b651SStefano Babic TAM3517_revision_tn(info), \ 34731f5b651SStefano Babic TAM3517_revision_major(info), \ 34831f5b651SStefano Babic TAM3517_revision_fixed(info)); \ 34931f5b651SStefano Babic } while (0) 35031f5b651SStefano Babic 3518103c6f0SStefano Babic #endif 3528103c6f0SStefano Babic 353f9c6fac4SStefano Babic #endif /* __TAM3517_H */ 354