162ddcf05SHeiko Schocher /* 262ddcf05SHeiko Schocher * Copyright (C) 2006 Freescale Semiconductor, Inc. 362ddcf05SHeiko Schocher * Dave Liu <daveliu@freescale.com> 462ddcf05SHeiko Schocher * 562ddcf05SHeiko Schocher * Copyright (C) 2007 Logic Product Development, Inc. 662ddcf05SHeiko Schocher * Peter Barada <peterb@logicpd.com> 762ddcf05SHeiko Schocher * 862ddcf05SHeiko Schocher * Copyright (C) 2007 MontaVista Software, Inc. 962ddcf05SHeiko Schocher * Anton Vorontsov <avorontsov@ru.mvista.com> 1062ddcf05SHeiko Schocher * 1162ddcf05SHeiko Schocher * (C) Copyright 2010 1262ddcf05SHeiko Schocher * Heiko Schocher, DENX Software Engineering, hs@denx.de. 1362ddcf05SHeiko Schocher * 1462ddcf05SHeiko Schocher * This program is free software; you can redistribute it and/or 1562ddcf05SHeiko Schocher * modify it under the terms of the GNU General Public License as 1662ddcf05SHeiko Schocher * published by the Free Software Foundation; either version 2 of 1762ddcf05SHeiko Schocher * the License, or (at your option) any later version. 1862ddcf05SHeiko Schocher */ 1962ddcf05SHeiko Schocher 2062ddcf05SHeiko Schocher #ifndef __CONFIG_H 2162ddcf05SHeiko Schocher #define __CONFIG_H 2262ddcf05SHeiko Schocher 2362ddcf05SHeiko Schocher /* 2462ddcf05SHeiko Schocher * High Level Configuration Options 2562ddcf05SHeiko Schocher */ 2662ddcf05SHeiko Schocher #define CONFIG_SUVD3 /* SUVD3 board specific */ 2762ddcf05SHeiko Schocher #define CONFIG_HOSTNAME suvd3 2862ddcf05SHeiko Schocher #define CONFIG_KM_BOARD_NAME "suvd3" 2962ddcf05SHeiko Schocher 3062ddcf05SHeiko Schocher #define CONFIG_SYS_TEXT_BASE 0xF0000000 3162ddcf05SHeiko Schocher 328ed74341SHeiko Schocher /* include common defines/options for all 8321 Keymile boards */ 33*264eaa0eSValentin Longchamp #include "km/km8321-common.h" 3462ddcf05SHeiko Schocher 3562ddcf05SHeiko Schocher #define CONFIG_SYS_APP1_BASE 0xA0000000 3662ddcf05SHeiko Schocher #define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */ 3762ddcf05SHeiko Schocher #define CONFIG_SYS_APP2_BASE 0xB0000000 3862ddcf05SHeiko Schocher #define CONFIG_SYS_APP2_SIZE 256 /* Megabytes */ 3962ddcf05SHeiko Schocher 4062ddcf05SHeiko Schocher /* EEprom support */ 4162ddcf05SHeiko Schocher #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 4262ddcf05SHeiko Schocher 4362ddcf05SHeiko Schocher /* 4462ddcf05SHeiko Schocher * Init Local Bus Memory Controller: 4562ddcf05SHeiko Schocher * 4662ddcf05SHeiko Schocher * Bank Bus Machine PortSz Size Device 4762ddcf05SHeiko Schocher * ---- --- ------- ------ ----- ------ 4862ddcf05SHeiko Schocher * 2 Local UPMA 16 bit 256MB APP1 4962ddcf05SHeiko Schocher * 3 Local GPCM 16 bit 256MB APP2 5062ddcf05SHeiko Schocher * 5162ddcf05SHeiko Schocher */ 5262ddcf05SHeiko Schocher 5362ddcf05SHeiko Schocher /* 5462ddcf05SHeiko Schocher * APP1 on the local bus CS2 5562ddcf05SHeiko Schocher */ 5662ddcf05SHeiko Schocher #define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE 5762ddcf05SHeiko Schocher #define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB) 5862ddcf05SHeiko Schocher 5962ddcf05SHeiko Schocher #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \ 6062ddcf05SHeiko Schocher BR_PS_16 | \ 6162ddcf05SHeiko Schocher BR_MS_UPMA | \ 6262ddcf05SHeiko Schocher BR_V) 6362ddcf05SHeiko Schocher #define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE)) 6462ddcf05SHeiko Schocher 6562ddcf05SHeiko Schocher #define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \ 6662ddcf05SHeiko Schocher BR_PS_16 | \ 6762ddcf05SHeiko Schocher BR_V) 6862ddcf05SHeiko Schocher 6962ddcf05SHeiko Schocher #define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \ 7062ddcf05SHeiko Schocher OR_GPCM_CSNT | \ 7162ddcf05SHeiko Schocher OR_GPCM_ACS_DIV4 | \ 7262ddcf05SHeiko Schocher OR_GPCM_SCY_3 | \ 7362ddcf05SHeiko Schocher OR_GPCM_TRLX) 7462ddcf05SHeiko Schocher 7562ddcf05SHeiko Schocher #define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \ 7662ddcf05SHeiko Schocher 0x0000c000 | \ 7762ddcf05SHeiko Schocher MxMR_WLFx_2X) 7862ddcf05SHeiko Schocher 7962ddcf05SHeiko Schocher #define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE 8062ddcf05SHeiko Schocher #define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB) 8162ddcf05SHeiko Schocher 8262ddcf05SHeiko Schocher /* 8362ddcf05SHeiko Schocher * MMU Setup 8462ddcf05SHeiko Schocher */ 8562ddcf05SHeiko Schocher 8662ddcf05SHeiko Schocher 8762ddcf05SHeiko Schocher /* APP1: icache cacheable, but dcache-inhibit and guarded */ 8862ddcf05SHeiko Schocher #define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | BATL_PP_10 | \ 8962ddcf05SHeiko Schocher BATL_MEMCOHERENCE) 9062ddcf05SHeiko Schocher #define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE | BATU_BL_256M | \ 9162ddcf05SHeiko Schocher BATU_VS | BATU_VP) 9262ddcf05SHeiko Schocher #define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE | BATL_PP_10 | \ 9362ddcf05SHeiko Schocher BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) 9462ddcf05SHeiko Schocher #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U 9562ddcf05SHeiko Schocher 9662ddcf05SHeiko Schocher #define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | BATL_PP_10 | \ 9762ddcf05SHeiko Schocher BATL_MEMCOHERENCE) 9862ddcf05SHeiko Schocher #define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE | BATU_BL_256M | \ 9962ddcf05SHeiko Schocher BATU_VS | BATU_VP) 10062ddcf05SHeiko Schocher #define CONFIG_SYS_DBAT6L (CONFIG_SYS_APP2_BASE | BATL_PP_10 | \ 10162ddcf05SHeiko Schocher BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) 10262ddcf05SHeiko Schocher #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U 10362ddcf05SHeiko Schocher 10462ddcf05SHeiko Schocher #endif /* __CONFIG_H */ 105