1 /* 2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3 * 4 * (C) Copyright 2007-2011 5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6 * Tom Cubie <tangliang@allwinnertech.com> 7 * 8 * Configuration settings for the Allwinner sunxi series of boards. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef _SUNXI_COMMON_CONFIG_H 14 #define _SUNXI_COMMON_CONFIG_H 15 16 /* 17 * High Level Configuration Options 18 */ 19 #define CONFIG_SUNXI /* sunxi family */ 20 #ifdef CONFIG_SPL_BUILD 21 #ifndef CONFIG_SPL_FEL 22 #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 23 #endif 24 #endif 25 26 #include <asm/arch/cpu.h> /* get chip and board defs */ 27 28 #define CONFIG_SYS_TEXT_BASE 0x4a000000 29 30 /* 31 * Display CPU information 32 */ 33 #define CONFIG_DISPLAY_CPUINFO 34 35 /* Serial & console */ 36 #define CONFIG_SYS_NS16550 37 #define CONFIG_SYS_NS16550_SERIAL 38 /* ns16550 reg in the low bits of cpu reg */ 39 #define CONFIG_SYS_NS16550_REG_SIZE -4 40 #define CONFIG_SYS_NS16550_CLK 24000000 41 #define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 42 #define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 43 #define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 44 #define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 45 46 /* DRAM Base */ 47 #define CONFIG_SYS_SDRAM_BASE 0x40000000 48 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 49 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 50 51 #define CONFIG_SYS_INIT_SP_OFFSET \ 52 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 53 #define CONFIG_SYS_INIT_SP_ADDR \ 54 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 55 56 #define CONFIG_NR_DRAM_BANKS 1 57 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 58 #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 59 60 #ifdef CONFIG_AHCI 61 #define CONFIG_LIBATA 62 #define CONFIG_SCSI_AHCI 63 #define CONFIG_SCSI_AHCI_PLAT 64 #define CONFIG_SUNXI_AHCI 65 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 66 #define CONFIG_SYS_SCSI_MAX_LUN 1 67 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 68 CONFIG_SYS_SCSI_MAX_LUN) 69 #define CONFIG_CMD_SCSI 70 #endif 71 72 #define CONFIG_CMD_MEMORY 73 #define CONFIG_CMD_SETEXPR 74 75 #define CONFIG_SETUP_MEMORY_TAGS 76 #define CONFIG_CMDLINE_TAG 77 #define CONFIG_INITRD_TAG 78 79 /* mmc config */ 80 #define CONFIG_MMC 81 #define CONFIG_GENERIC_MMC 82 #define CONFIG_CMD_MMC 83 #define CONFIG_MMC_SUNXI 84 #define CONFIG_MMC_SUNXI_SLOT 0 85 #define CONFIG_ENV_IS_IN_MMC 86 #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 87 88 /* 4MB of malloc() pool */ 89 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 90 91 /* 92 * Miscellaneous configurable options 93 */ 94 #define CONFIG_CMD_ECHO 95 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 96 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 97 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 98 #define CONFIG_SYS_GENERIC_BOARD 99 100 /* Boot Argument Buffer Size */ 101 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 102 103 #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 104 105 /* standalone support */ 106 #define CONFIG_STANDALONE_LOAD_ADDR 0x42000000 107 108 /* baudrate */ 109 #define CONFIG_BAUDRATE 115200 110 111 /* The stack sizes are set up in start.S using the settings below */ 112 #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 113 114 /* FLASH and environment organization */ 115 116 #define CONFIG_SYS_NO_FLASH 117 118 #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */ 119 #define CONFIG_IDENT_STRING " Allwinner Technology" 120 121 #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 122 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 123 124 #include <config_cmd_default.h> 125 #undef CONFIG_CMD_FPGA 126 127 #define CONFIG_FAT_WRITE /* enable write access */ 128 129 #define CONFIG_SPL_FRAMEWORK 130 #define CONFIG_SPL_LIBCOMMON_SUPPORT 131 #define CONFIG_SPL_SERIAL_SUPPORT 132 #define CONFIG_SPL_LIBGENERIC_SUPPORT 133 134 #ifdef CONFIG_SPL_FEL 135 136 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds" 137 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi" 138 #define CONFIG_SPL_TEXT_BASE 0x2000 139 #define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */ 140 141 #else /* CONFIG_SPL */ 142 143 #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 144 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */ 145 146 #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 147 #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 148 149 #define CONFIG_SPL_LIBDISK_SUPPORT 150 #define CONFIG_SPL_MMC_SUPPORT 151 152 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 153 154 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 155 #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 156 157 #endif /* CONFIG_SPL */ 158 159 /* end of 32 KiB in sram */ 160 #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 161 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 162 #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 163 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 164 165 /* I2C */ 166 #define CONFIG_SPL_I2C_SUPPORT 167 #define CONFIG_SYS_I2C 168 #define CONFIG_SYS_I2C_MVTWSI 169 #define CONFIG_SYS_I2C_SPEED 400000 170 #define CONFIG_SYS_I2C_SLAVE 0x7f 171 #define CONFIG_CMD_I2C 172 173 /* PMU */ 174 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER 175 #define CONFIG_SPL_POWER_SUPPORT 176 #endif 177 178 #ifndef CONFIG_CONS_INDEX 179 #define CONFIG_CONS_INDEX 1 /* UART0 */ 180 #endif 181 182 /* GPIO */ 183 #define CONFIG_SUNXI_GPIO 184 #define CONFIG_SPL_GPIO_SUPPORT 185 #define CONFIG_CMD_GPIO 186 187 /* Ethernet support */ 188 #ifdef CONFIG_SUNXI_EMAC 189 #define CONFIG_MII /* MII PHY management */ 190 #endif 191 192 #ifdef CONFIG_SUNXI_GMAC 193 #define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */ 194 #define CONFIG_DW_AUTONEG 195 #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 196 #define CONFIG_PHY_ADDR 1 197 #define CONFIG_MII /* MII PHY management */ 198 #define CONFIG_PHYLIB 199 #endif 200 201 #ifdef CONFIG_USB_EHCI 202 #define CONFIG_CMD_USB 203 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 204 #define CONFIG_USB_STORAGE 205 #endif 206 207 #if !defined CONFIG_ENV_IS_IN_MMC && \ 208 !defined CONFIG_ENV_IS_IN_NAND && \ 209 !defined CONFIG_ENV_IS_IN_FAT && \ 210 !defined CONFIG_ENV_IS_IN_SPI_FLASH 211 #define CONFIG_ENV_IS_NOWHERE 212 #endif 213 214 #define CONFIG_MISC_INIT_R 215 216 #ifndef CONFIG_SPL_BUILD 217 #include <config_distro_defaults.h> 218 219 /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 220 * 1M script, 1M pxe and the ramdisk at the end */ 221 #define MEM_LAYOUT_ENV_SETTINGS \ 222 "bootm_size=0x10000000\0" \ 223 "kernel_addr_r=0x42000000\0" \ 224 "fdt_addr_r=0x43000000\0" \ 225 "scriptaddr=0x43100000\0" \ 226 "pxefile_addr_r=0x43200000\0" \ 227 "ramdisk_addr_r=0x43300000\0" 228 229 #ifdef CONFIG_AHCI 230 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 231 #else 232 #define BOOT_TARGET_DEVICES_SCSI(func) 233 #endif 234 235 #ifdef CONFIG_USB_EHCI 236 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 237 #else 238 #define BOOT_TARGET_DEVICES_USB(func) 239 #endif 240 241 #define BOOT_TARGET_DEVICES(func) \ 242 func(MMC, mmc, 0) \ 243 BOOT_TARGET_DEVICES_SCSI(func) \ 244 BOOT_TARGET_DEVICES_USB(func) \ 245 func(PXE, pxe, na) \ 246 func(DHCP, dhcp, na) 247 248 #include <config_distro_bootcmd.h> 249 250 #define CONFIG_EXTRA_ENV_SETTINGS \ 251 MEM_LAYOUT_ENV_SETTINGS \ 252 "fdtfile=" CONFIG_FDTFILE "\0" \ 253 "console=ttyS0,115200\0" \ 254 BOOTENV 255 256 #else /* ifndef CONFIG_SPL_BUILD */ 257 #define CONFIG_EXTRA_ENV_SETTINGS 258 #endif 259 260 #endif /* _SUNXI_COMMON_CONFIG_H */ 261