xref: /rk3399_rockchip-uboot/include/configs/sunxi-common.h (revision e4916e850bfb3a148b4167974d59332b72d2d055)
1cba69eeeSIan Campbell /*
2cba69eeeSIan Campbell  * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3cba69eeeSIan Campbell  *
4cba69eeeSIan Campbell  * (C) Copyright 2007-2011
5cba69eeeSIan Campbell  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6cba69eeeSIan Campbell  * Tom Cubie <tangliang@allwinnertech.com>
7cba69eeeSIan Campbell  *
8cba69eeeSIan Campbell  * Configuration settings for the Allwinner sunxi series of boards.
9cba69eeeSIan Campbell  *
10cba69eeeSIan Campbell  * SPDX-License-Identifier:	GPL-2.0+
11cba69eeeSIan Campbell  */
12cba69eeeSIan Campbell 
13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H
14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H
15cba69eeeSIan Campbell 
16daf6d399SHans de Goede #include <asm/arch/cpu.h>
17e049fe28SHans de Goede #include <linux/stringify.h>
18e049fe28SHans de Goede 
1977ef1369SSiarhei Siamashka #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
2077ef1369SSiarhei Siamashka /*
2177ef1369SSiarhei Siamashka  * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
2277ef1369SSiarhei Siamashka  * expense of restricting some features, so the regular machine id values can
2377ef1369SSiarhei Siamashka  * be used.
2477ef1369SSiarhei Siamashka  */
2577ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV	0
2677ef1369SSiarhei Siamashka #else
2777ef1369SSiarhei Siamashka /*
2877ef1369SSiarhei Siamashka  * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
2977ef1369SSiarhei Siamashka  * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
3077ef1369SSiarhei Siamashka  * beyond the machine id check.
3177ef1369SSiarhei Siamashka  */
3277ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV	1
3377ef1369SSiarhei Siamashka #endif
3477ef1369SSiarhei Siamashka 
35cba69eeeSIan Campbell /* Serial & console */
36cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL
37cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */
38cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK		24000000
394fb60552SThomas Chou #ifndef CONFIG_DM_SERIAL
401a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE	-4
41cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
42cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
43cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
44cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
45c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
461a81cf83SSimon Glass #endif
47cba69eeeSIan Campbell 
488a65f69cSPaul Kocialkowski /* CPU */
49*e4916e85SAndre Przywara #define COUNTER_FREQUENCY		24000000
508a65f69cSPaul Kocialkowski 
51e049fe28SHans de Goede /*
52e049fe28SHans de Goede  * The DRAM Base differs between some models. We cannot use macros for the
53e049fe28SHans de Goede  * CONFIG_FOO defines which contain the DRAM base address since they end
54e049fe28SHans de Goede  * up unexpanded in include/autoconf.mk .
55e049fe28SHans de Goede  *
56e049fe28SHans de Goede  * So we have to have this #ifdef #else #endif block for these.
57e049fe28SHans de Goede  */
58e049fe28SHans de Goede #ifdef CONFIG_MACH_SUN9I
59e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x2##x
60e049fe28SHans de Goede #define CONFIG_SYS_SDRAM_BASE		0x20000000
61e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR		0x22000000 /* default load address */
62e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE		0x2a000000
63ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
64ff42d107SHans de Goede  * since it needs to fit in with the other values. By also #defining it
65ff42d107SHans de Goede  * we get warnings if the Kconfig value mismatches. */
66ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR		0x2fe00000
67e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR	0x2ff80000
68e049fe28SHans de Goede #else
69e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x4##x
70cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE		0x40000000
71e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
72e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE		0x4a000000
73ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
74ff42d107SHans de Goede  * since it needs to fit in with the other values. By also #defining it
75ff42d107SHans de Goede  * we get warnings if the Kconfig value mismatches. */
76ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR		0x4fe00000
77e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
78e049fe28SHans de Goede #endif
79e049fe28SHans de Goede 
80e049fe28SHans de Goede #define CONFIG_SPL_BSS_MAX_SIZE		0x00080000 /* 512 KiB */
81e049fe28SHans de Goede 
82d96ebc46SSiarhei Siamashka #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
8377fe9887SHans de Goede /*
8477fe9887SHans de Goede  * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
8577fe9887SHans de Goede  * slightly bigger. Note that it is possible to map the first 32 KiB of the
8677fe9887SHans de Goede  * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
8777fe9887SHans de Goede  * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
8877fe9887SHans de Goede  * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
8977fe9887SHans de Goede  */
9077fe9887SHans de Goede #define CONFIG_SYS_INIT_RAM_ADDR	0x10000
91eb504fa1SAndre Przywara #define CONFIG_SYS_INIT_RAM_SIZE	0x08000	/* FIXME: 40 KiB ? */
9277fe9887SHans de Goede #else
93cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR	0x0
94cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
9577fe9887SHans de Goede #endif
96cba69eeeSIan Campbell 
97cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \
98cba69eeeSIan Campbell 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
99cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \
100cba69eeeSIan Campbell 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
101cba69eeeSIan Campbell 
102cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS		1
103cba69eeeSIan Campbell #define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
104cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */
105cba69eeeSIan Campbell 
106a6e50a88SIan Campbell #ifdef CONFIG_AHCI
107a6e50a88SIan Campbell #define CONFIG_LIBATA
108a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI
109a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT
110a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI
1110751b138SBernhard Nortmann #define CONFIG_SYS_64BIT_LBA
112a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
113a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN		1
114a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
115a6e50a88SIan Campbell 					 CONFIG_SYS_SCSI_MAX_LUN)
116c649e3c9SSimon Glass #define CONFIG_SCSI
117a6e50a88SIan Campbell #endif
118a6e50a88SIan Campbell 
119cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS
120cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG
121cba69eeeSIan Campbell #define CONFIG_INITRD_TAG
1229f852211SPaul Kocialkowski #define CONFIG_SERIAL_TAG
123cba69eeeSIan Campbell 
124e5268616SHans de Goede #ifdef CONFIG_NAND_SUNXI
125a0dfa88bSBoris Brezillon #define CONFIG_SYS_NAND_MAX_ECCPOS 1664
1264ccae81cSBoris Brezillon #define CONFIG_SYS_NAND_ONFI_DETECTION
1274ccae81cSBoris Brezillon #define CONFIG_SYS_MAX_NAND_DEVICE 8
128960caebaSPiotr Zierhoffer #endif
129960caebaSPiotr Zierhoffer 
13019e99fb4SSiarhei Siamashka #ifdef CONFIG_SPL_SPI_SUNXI
13119e99fb4SSiarhei Siamashka #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
13219e99fb4SSiarhei Siamashka #endif
13319e99fb4SSiarhei Siamashka 
134e24ea55cSIan Campbell /* mmc config */
13544c79879SMaxime Ripard #ifdef CONFIG_MMC
136e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT		0
137e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC
138e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
139ae042bebSEmmanuel Vadot #define CONFIG_SYS_MMC_MAX_DEVICE	4
140ff2b47f6SChen-Yu Tsai #endif
141e24ea55cSIan Campbell 
1425c965ed9SHans de Goede /* 64MB of malloc() pool */
1435c965ed9SHans de Goede #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (64 << 20))
144cba69eeeSIan Campbell 
145cba69eeeSIan Campbell /*
146cba69eeeSIan Campbell  * Miscellaneous configurable options
147cba69eeeSIan Campbell  */
14806beadb0SIan Campbell #define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
14906beadb0SIan Campbell #define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
150cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
151cba69eeeSIan Campbell 
152cba69eeeSIan Campbell /* Boot Argument Buffer Size */
153cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
154cba69eeeSIan Campbell 
155cba69eeeSIan Campbell /* standalone support */
156e049fe28SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR	CONFIG_SYS_LOAD_ADDR
157cba69eeeSIan Campbell 
158cba69eeeSIan Campbell /* baudrate */
159cba69eeeSIan Campbell 
160cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */
161cba69eeeSIan Campbell #define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */
162cba69eeeSIan Campbell 
163cba69eeeSIan Campbell /* FLASH and environment organization */
164cba69eeeSIan Campbell 
165fa5e1020SBoris Brezillon #define CONFIG_SYS_MONITOR_LEN		(768 << 10)	/* 768 KiB */
166cba69eeeSIan Campbell 
167e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET		(544 << 10) /* (8 + 24 + 512) KiB */
168cba69eeeSIan Campbell #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
169cba69eeeSIan Campbell 
170cba69eeeSIan Campbell #define CONFIG_FAT_WRITE	/* enable write access */
171cba69eeeSIan Campbell 
172cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK
173cba69eeeSIan Campbell 
174eb77f5c9SAndre Przywara #ifndef CONFIG_ARM64		/* AArch64 FEL support is not ready yet */
175942cb0b6SSimon Glass #define CONFIG_SPL_BOARD_LOAD_IMAGE
176eb77f5c9SAndre Przywara #endif
177942cb0b6SSimon Glass 
178d96ebc46SSiarhei Siamashka #if defined(CONFIG_MACH_SUN9I)
179b19236fdSSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE		0x10040		/* sram start+header */
180b19236fdSSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE		0x5fc0		/* ? KiB on sun9i */
181d96ebc46SSiarhei Siamashka #elif defined(CONFIG_MACH_SUN50I)
182b19236fdSSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE		0x10040		/* sram start+header */
183b19236fdSSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE		0x7fc0		/* 32 KiB on sun50i */
184d96ebc46SSiarhei Siamashka #else
185b19236fdSSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE		0x40		/* sram start+header */
186b19236fdSSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE		0x5fc0		/* 24KB on sun4i/sun7i */
187d96ebc46SSiarhei Siamashka #endif
18850827a59SIan Campbell 
189d96ebc46SSiarhei Siamashka #ifndef CONFIG_ARM64
19050827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
191d96ebc46SSiarhei Siamashka #endif
19250827a59SIan Campbell 
19350827a59SIan Campbell #define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */
19450827a59SIan Campbell 
195d96ebc46SSiarhei Siamashka #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
196eb504fa1SAndre Przywara /* FIXME: 40 KiB instead of 32 KiB ? */
197eb504fa1SAndre Przywara #define LOW_LEVEL_SRAM_STACK		0x00018000
198d96ebc46SSiarhei Siamashka #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
199d96ebc46SSiarhei Siamashka #else
200cba69eeeSIan Campbell /* end of 32 KiB in sram */
201cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK		0x00008000 /* End of sram */
202cba69eeeSIan Campbell #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
203d96ebc46SSiarhei Siamashka #endif
204cba69eeeSIan Campbell 
2056620377eSHans de Goede /* I2C */
2060d8382aeSJelle van der Waa #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
2070d8382aeSJelle van der Waa     defined CONFIG_SY8106A_POWER
208ad40610bSHans de Goede #endif
209ad40610bSHans de Goede 
2106c739c5dSPaul Kocialkowski #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
2116c739c5dSPaul Kocialkowski     defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
2129d082687SJelle van der Waa     defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
2138b2db32aSHans de Goede #define CONFIG_SYS_I2C
2146620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI
2156620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED		400000
2166620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE		0x7f
2178b2db32aSHans de Goede #endif
21855410089SHans de Goede 
21955410089SHans de Goede #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
22055410089SHans de Goede #define CONFIG_SYS_I2C_SOFT
22155410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SPEED	50000
22255410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SLAVE	0x00
22355410089SHans de Goede /* We use pin names in Kconfig and sunxi_name_to_gpio() */
22455410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SDA	soft_i2c_gpio_sda
22555410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SCL	soft_i2c_gpio_scl
22655410089SHans de Goede #ifndef __ASSEMBLY__
22755410089SHans de Goede extern int soft_i2c_gpio_sda;
22855410089SHans de Goede extern int soft_i2c_gpio_scl;
22955410089SHans de Goede #endif
2301fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS	0 /* The lcd panel soft i2c is bus 0 */
2311fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM		1 /* And the axp209 i2c bus is bus 1 */
2321fc42018SHans de Goede #else
2331fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM		0 /* The axp209 i2c bus is bus 0 */
2341fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS	-1 /* NA, but necessary to compile */
23555410089SHans de Goede #endif
23655410089SHans de Goede 
23714bc66bdSHenrik Nordstrom /* PMU */
23895ab8feeSvishnupatekar #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
2390d8382aeSJelle van der Waa     defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
2400d8382aeSJelle van der Waa     defined CONFIG_SY8106A_POWER
24114bc66bdSHenrik Nordstrom #endif
24214bc66bdSHenrik Nordstrom 
243f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX
244cba69eeeSIan Campbell #define CONFIG_CONS_INDEX              1       /* UART0 */
245f84269c5SHans de Goede #endif
246cba69eeeSIan Campbell 
247a5da3c83SHans de Goede #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
248f3133962SHans de Goede #if CONFIG_CONS_INDEX == 1
249f3133962SHans de Goede #ifdef CONFIG_MACH_SUN9I
250f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc/serial@07000000:115200"
251f3133962SHans de Goede #else
252f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28000:115200"
253f3133962SHans de Goede #endif
254f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
255f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
2565cd83b11SLaurent Itti #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
2575cd83b11SLaurent Itti #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
258f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
259f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc@01c00000/serial@01f02800:115200"
260f3133962SHans de Goede #else
261f3133962SHans de Goede #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
262f3133962SHans de Goede #endif
263a5da3c83SHans de Goede #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
264f3133962SHans de Goede 
265abce2c62SIan Campbell /* GPIO */
266abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO
267abce2c62SIan Campbell 
2687f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO
2697f2c521fSLuc Verhaegen /*
2705633a296SHans de Goede  * The amount of RAM to keep free at the top of RAM when relocating u-boot,
2715633a296SHans de Goede  * to use as framebuffer. This must be a multiple of 4096.
2727f2c521fSLuc Verhaegen  */
2735c965ed9SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
2747f2c521fSLuc Verhaegen 
2752d7a084bSLuc Verhaegen /* Do we want to initialize a simple FB? */
2762d7a084bSLuc Verhaegen #define CONFIG_VIDEO_DT_SIMPLEFB
2772d7a084bSLuc Verhaegen 
2787f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SUNXI
2797f2c521fSLuc Verhaegen 
2807f2c521fSLuc Verhaegen #define CONFIG_VIDEO_LOGO
281be8ec633SHans de Goede #define CONFIG_VIDEO_STD_TIMINGS
28275481607SHans de Goede #define CONFIG_I2C_EDID
28358332f89SHans de Goede #define VIDEO_LINE_LEN (pGD->plnSizeX)
2847f2c521fSLuc Verhaegen 
2857f2c521fSLuc Verhaegen /* allow both serial and cfb console. */
2867f2c521fSLuc Verhaegen /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
2877f2c521fSLuc Verhaegen 
2887f2c521fSLuc Verhaegen #endif /* CONFIG_VIDEO */
2897f2c521fSLuc Verhaegen 
290c26fb9dbSHans de Goede /* Ethernet support */
291c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC
2928145dea4SHans de Goede #define CONFIG_PHY_ADDR		1
293c26fb9dbSHans de Goede #define CONFIG_MII			/* MII PHY management		*/
2948145dea4SHans de Goede #define CONFIG_PHYLIB
295c26fb9dbSHans de Goede #endif
296c26fb9dbSHans de Goede 
2975835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC
2985835823dSIan Campbell #define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
2995835823dSIan Campbell #define CONFIG_PHY_ADDR		1
3005835823dSIan Campbell #define CONFIG_MII			/* MII PHY management		*/
3011eae8f66SHans de Goede #define CONFIG_PHY_REALTEK
3025835823dSIan Campbell #endif
3035835823dSIan Campbell 
3042582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_EHCI_HCD
3056a72e804SHans de Goede #define CONFIG_USB_OHCI_NEW
3066a72e804SHans de Goede #define CONFIG_USB_OHCI_SUNXI
3076a72e804SHans de Goede #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
3083584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
3091a800f7aSHans de Goede #endif
3101a800f7aSHans de Goede 
3111a800f7aSHans de Goede #ifdef CONFIG_USB_MUSB_SUNXI
31295de1e2fSPaul Kocialkowski #define CONFIG_USB_MUSB_PIO_ONLY
3131a800f7aSHans de Goede #endif
3141a800f7aSHans de Goede 
315b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_MUSB_GADGET
316aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_FASTBOOT
317aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_MASS_STORAGE
318b21144ebSPaul Kocialkowski #endif
319b21144ebSPaul Kocialkowski 
320b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_FASTBOOT
321b21144ebSPaul Kocialkowski #define CONFIG_CMD_FASTBOOT
322b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
323b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_SIZE	0x2000000
324bac83fb0SMaxime Ripard #define CONFIG_ANDROID_BOOT_IMAGE
325b21144ebSPaul Kocialkowski 
326b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH
32744c79879SMaxime Ripard 
32844c79879SMaxime Ripard #ifdef CONFIG_MMC
329b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH_MMC_DEV	0
330b21144ebSPaul Kocialkowski #endif
33144c79879SMaxime Ripard #endif
332b21144ebSPaul Kocialkowski 
333b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
334b21144ebSPaul Kocialkowski #endif
335b21144ebSPaul Kocialkowski 
33686b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD
33786b49093SHans de Goede #define CONFIG_PREBOOT
338eab9433aSHans de Goede #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
33986b49093SHans de Goede #endif
34086b49093SHans de Goede 
341cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \
342cba69eeeSIan Campbell     !defined CONFIG_ENV_IS_IN_NAND && \
343cba69eeeSIan Campbell     !defined CONFIG_ENV_IS_IN_FAT && \
344cba69eeeSIan Campbell     !defined CONFIG_ENV_IS_IN_SPI_FLASH
345cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE
346cba69eeeSIan Campbell #endif
347cba69eeeSIan Campbell 
348b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R
349b41d7d05SJonathan Liu 
350cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD
351cba69eeeSIan Campbell #include <config_distro_defaults.h>
3522ec3a612SHans de Goede 
353671f9ad8SAndre Przywara #ifdef CONFIG_ARM64
354671f9ad8SAndre Przywara /*
355671f9ad8SAndre Przywara  * Boards seem to come with at least 512MB of DRAM.
356671f9ad8SAndre Przywara  * The kernel should go at 512K, which is the default text offset (that will
357671f9ad8SAndre Przywara  * be adjusted at runtime if needed).
358671f9ad8SAndre Przywara  * There is no compression for arm64 kernels (yet), so leave some space
359671f9ad8SAndre Przywara  * for really big kernels, say 256MB for now.
360671f9ad8SAndre Przywara  * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
361671f9ad8SAndre Przywara  * Align the initrd to a 2MB page.
362671f9ad8SAndre Przywara  */
363671f9ad8SAndre Przywara #define KERNEL_ADDR_R	__stringify(SDRAM_OFFSET(0080000))
364671f9ad8SAndre Przywara #define FDT_ADDR_R	__stringify(SDRAM_OFFSET(FA00000))
365671f9ad8SAndre Przywara #define SCRIPT_ADDR_R	__stringify(SDRAM_OFFSET(FC00000))
366671f9ad8SAndre Przywara #define PXEFILE_ADDR_R	__stringify(SDRAM_OFFSET(FD00000))
367671f9ad8SAndre Przywara #define RAMDISK_ADDR_R	__stringify(SDRAM_OFFSET(FE00000))
368671f9ad8SAndre Przywara 
369671f9ad8SAndre Przywara #else
3708c95c556SHans de Goede /*
3715c965ed9SHans de Goede  * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
3728c95c556SHans de Goede  * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
3738c95c556SHans de Goede  * 1M script, 1M pxe and the ramdisk at the end.
3748c95c556SHans de Goede  */
3752a909c5fSSiarhei Siamashka 
3762a909c5fSSiarhei Siamashka #define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(2000000))
3772a909c5fSSiarhei Siamashka #define FDT_ADDR_R     __stringify(SDRAM_OFFSET(3000000))
3782a909c5fSSiarhei Siamashka #define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(3100000))
3792a909c5fSSiarhei Siamashka #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
3802a909c5fSSiarhei Siamashka #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
381671f9ad8SAndre Przywara #endif
3822a909c5fSSiarhei Siamashka 
383846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \
3845c965ed9SHans de Goede 	"bootm_size=0xa000000\0" \
3852a909c5fSSiarhei Siamashka 	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
3862a909c5fSSiarhei Siamashka 	"fdt_addr_r=" FDT_ADDR_R "\0" \
3872a909c5fSSiarhei Siamashka 	"scriptaddr=" SCRIPT_ADDR_R "\0" \
3882a909c5fSSiarhei Siamashka 	"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
3892a909c5fSSiarhei Siamashka 	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
3902a909c5fSSiarhei Siamashka 
3912a909c5fSSiarhei Siamashka #define DFU_ALT_INFO_RAM \
3922a909c5fSSiarhei Siamashka 	"dfu_alt_info_ram=" \
3932a909c5fSSiarhei Siamashka 	"kernel ram " KERNEL_ADDR_R " 0x1000000;" \
3942a909c5fSSiarhei Siamashka 	"fdt ram " FDT_ADDR_R " 0x100000;" \
3952a909c5fSSiarhei Siamashka 	"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
396846e3254SHans de Goede 
39741f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC
39841f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
3995a37a400SKarsten Merker #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
4005a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
4015a37a400SKarsten Merker #else
4025a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
4035a37a400SKarsten Merker #endif
40441f8e9f5SChen-Yu Tsai #else
40541f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func)
4065a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
40741f8e9f5SChen-Yu Tsai #endif
40841f8e9f5SChen-Yu Tsai 
4092ec3a612SHans de Goede #ifdef CONFIG_AHCI
4102ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
4112ec3a612SHans de Goede #else
4122ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func)
4132ec3a612SHans de Goede #endif
4142ec3a612SHans de Goede 
4152582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_STORAGE
416859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
417859b3f14SChen-Yu Tsai #else
418859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func)
419859b3f14SChen-Yu Tsai #endif
420859b3f14SChen-Yu Tsai 
421f3b589c0SBernhard Nortmann /* FEL boot support, auto-execute boot.scr if a script address was provided */
422f3b589c0SBernhard Nortmann #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
423f3b589c0SBernhard Nortmann 	"bootcmd_fel=" \
424f3b589c0SBernhard Nortmann 		"if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
425f3b589c0SBernhard Nortmann 			"echo '(FEL boot)'; " \
426f3b589c0SBernhard Nortmann 			"source ${fel_scriptaddr}; " \
427f3b589c0SBernhard Nortmann 		"fi\0"
428f3b589c0SBernhard Nortmann #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
429f3b589c0SBernhard Nortmann 	"fel "
430f3b589c0SBernhard Nortmann 
4312ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \
432f3b589c0SBernhard Nortmann 	func(FEL, fel, na) \
43341f8e9f5SChen-Yu Tsai 	BOOT_TARGET_DEVICES_MMC(func) \
4345a37a400SKarsten Merker 	BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
4352ec3a612SHans de Goede 	BOOT_TARGET_DEVICES_SCSI(func) \
436859b3f14SChen-Yu Tsai 	BOOT_TARGET_DEVICES_USB(func) \
4372ec3a612SHans de Goede 	func(PXE, pxe, na) \
4382ec3a612SHans de Goede 	func(DHCP, dhcp, na)
4392ec3a612SHans de Goede 
4403b824025SHans de Goede #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
4413b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT \
4423b824025SHans de Goede 	"bootcmd_sunxi_compat=" \
4433b824025SHans de Goede 		"setenv root /dev/mmcblk0p3 rootwait; " \
4443b824025SHans de Goede 		"if ext2load mmc 0 0x44000000 uEnv.txt; then " \
4453b824025SHans de Goede 			"echo Loaded environment from uEnv.txt; " \
4463b824025SHans de Goede 			"env import -t 0x44000000 ${filesize}; " \
4473b824025SHans de Goede 		"fi; " \
4483b824025SHans de Goede 		"setenv bootargs console=${console} root=${root} ${extraargs}; " \
4493b824025SHans de Goede 		"ext2load mmc 0 0x43000000 script.bin && " \
4503b824025SHans de Goede 		"ext2load mmc 0 0x48000000 uImage && " \
4513b824025SHans de Goede 		"bootm 0x48000000\0"
4523b824025SHans de Goede #else
4533b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT
4543b824025SHans de Goede #endif
4553b824025SHans de Goede 
4562ec3a612SHans de Goede #include <config_distro_bootcmd.h>
4572ec3a612SHans de Goede 
45886b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD
45986b49093SHans de Goede #define CONSOLE_STDIN_SETTINGS \
46086b49093SHans de Goede 	"preboot=usb start\0" \
46186b49093SHans de Goede 	"stdin=serial,usbkbd\0"
46286b49093SHans de Goede #else
4637f2c521fSLuc Verhaegen #define CONSOLE_STDIN_SETTINGS \
4647f2c521fSLuc Verhaegen 	"stdin=serial\0"
46586b49093SHans de Goede #endif
4667f2c521fSLuc Verhaegen 
4677f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO
4687f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \
4697f2c521fSLuc Verhaegen 	"stdout=serial,vga\0" \
4707f2c521fSLuc Verhaegen 	"stderr=serial,vga\0"
4717f2c521fSLuc Verhaegen #else
4727f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \
4737f2c521fSLuc Verhaegen 	"stdout=serial\0" \
4747f2c521fSLuc Verhaegen 	"stderr=serial\0"
4757f2c521fSLuc Verhaegen #endif
4767f2c521fSLuc Verhaegen 
4777f2c521fSLuc Verhaegen #define CONSOLE_ENV_SETTINGS \
4787f2c521fSLuc Verhaegen 	CONSOLE_STDIN_SETTINGS \
4797f2c521fSLuc Verhaegen 	CONSOLE_STDOUT_SETTINGS
4807f2c521fSLuc Verhaegen 
4812ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \
4827f2c521fSLuc Verhaegen 	CONSOLE_ENV_SETTINGS \
483846e3254SHans de Goede 	MEM_LAYOUT_ENV_SETTINGS \
4842a909c5fSSiarhei Siamashka 	DFU_ALT_INFO_RAM \
48525acd33fSHans de Goede 	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
486846e3254SHans de Goede 	"console=ttyS0,115200\0" \
4873b824025SHans de Goede 	BOOTCMD_SUNXI_COMPAT \
4882ec3a612SHans de Goede 	BOOTENV
4892ec3a612SHans de Goede 
4902ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */
4912ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS
492cba69eeeSIan Campbell #endif
493cba69eeeSIan Campbell 
494cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */
495