1cba69eeeSIan Campbell /* 2cba69eeeSIan Campbell * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3cba69eeeSIan Campbell * 4cba69eeeSIan Campbell * (C) Copyright 2007-2011 5cba69eeeSIan Campbell * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6cba69eeeSIan Campbell * Tom Cubie <tangliang@allwinnertech.com> 7cba69eeeSIan Campbell * 8cba69eeeSIan Campbell * Configuration settings for the Allwinner sunxi series of boards. 9cba69eeeSIan Campbell * 10cba69eeeSIan Campbell * SPDX-License-Identifier: GPL-2.0+ 11cba69eeeSIan Campbell */ 12cba69eeeSIan Campbell 13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H 14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H 15cba69eeeSIan Campbell 16*e049fe28SHans de Goede #include <linux/stringify.h> 17*e049fe28SHans de Goede 1877ef1369SSiarhei Siamashka #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 1977ef1369SSiarhei Siamashka /* 2077ef1369SSiarhei Siamashka * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the 2177ef1369SSiarhei Siamashka * expense of restricting some features, so the regular machine id values can 2277ef1369SSiarhei Siamashka * be used. 2377ef1369SSiarhei Siamashka */ 2477ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 0 2577ef1369SSiarhei Siamashka #else 2677ef1369SSiarhei Siamashka /* 2777ef1369SSiarhei Siamashka * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. 2877ef1369SSiarhei Siamashka * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass 2977ef1369SSiarhei Siamashka * beyond the machine id check. 3077ef1369SSiarhei Siamashka */ 3177ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 1 3277ef1369SSiarhei Siamashka #endif 3377ef1369SSiarhei Siamashka 34cba69eeeSIan Campbell /* 35cba69eeeSIan Campbell * High Level Configuration Options 36cba69eeeSIan Campbell */ 37cba69eeeSIan Campbell #define CONFIG_SUNXI /* sunxi family */ 3850827a59SIan Campbell #ifdef CONFIG_SPL_BUILD 3950827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 4050827a59SIan Campbell #endif 41cba69eeeSIan Campbell 42cba69eeeSIan Campbell #include <asm/arch/cpu.h> /* get chip and board defs */ 43cba69eeeSIan Campbell 44b6006bafSHans de Goede #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL) 451a81cf83SSimon Glass # define CONFIG_DW_SERIAL 4657f878efSSimon Glass #endif 4757f878efSSimon Glass 48cba69eeeSIan Campbell /* 49cba69eeeSIan Campbell * Display CPU information 50cba69eeeSIan Campbell */ 51cba69eeeSIan Campbell #define CONFIG_DISPLAY_CPUINFO 52cba69eeeSIan Campbell 534e7c892dSIan Campbell #define CONFIG_SYS_PROMPT "sunxi# " 544e7c892dSIan Campbell 55cba69eeeSIan Campbell /* Serial & console */ 56cba69eeeSIan Campbell #define CONFIG_SYS_NS16550 57cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL 58cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */ 59cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK 24000000 601a81cf83SSimon Glass #ifndef CONFIG_DM_SERIAL 611a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE -4 62cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 63cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 64cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 65cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 66c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 671a81cf83SSimon Glass #endif 68cba69eeeSIan Campbell 698a65f69cSPaul Kocialkowski /* CPU */ 708a65f69cSPaul Kocialkowski #define CONFIG_SYS_CACHELINE_SIZE 64 718a65f69cSPaul Kocialkowski 72*e049fe28SHans de Goede /* 73*e049fe28SHans de Goede * The DRAM Base differs between some models. We cannot use macros for the 74*e049fe28SHans de Goede * CONFIG_FOO defines which contain the DRAM base address since they end 75*e049fe28SHans de Goede * up unexpanded in include/autoconf.mk . 76*e049fe28SHans de Goede * 77*e049fe28SHans de Goede * So we have to have this #ifdef #else #endif block for these. 78*e049fe28SHans de Goede */ 79*e049fe28SHans de Goede #ifdef CONFIG_MACH_SUN9I 80*e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x2##x 81*e049fe28SHans de Goede #define CONFIG_SYS_SDRAM_BASE 0x20000000 82*e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ 83*e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE 0x2a000000 84*e049fe28SHans de Goede #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 85*e049fe28SHans de Goede #define CONFIG_SYS_SPL_MALLOC_START 0x2ff00000 86*e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 87*e049fe28SHans de Goede #else 88*e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x4##x 89cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE 0x40000000 90*e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 91*e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE 0x4a000000 92*e049fe28SHans de Goede #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 93*e049fe28SHans de Goede #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 94*e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 95*e049fe28SHans de Goede #endif 96*e049fe28SHans de Goede 97*e049fe28SHans de Goede #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ 98*e049fe28SHans de Goede #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 99*e049fe28SHans de Goede 100cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR 0x0 101cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 102cba69eeeSIan Campbell 103cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \ 104cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 105cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \ 106cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 107cba69eeeSIan Campbell 108cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS 1 109cba69eeeSIan Campbell #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 110cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 111cba69eeeSIan Campbell 112a6e50a88SIan Campbell #ifdef CONFIG_AHCI 113a6e50a88SIan Campbell #define CONFIG_LIBATA 114a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI 115a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT 116a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI 117a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 118a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN 1 119a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 120a6e50a88SIan Campbell CONFIG_SYS_SCSI_MAX_LUN) 121a6e50a88SIan Campbell #define CONFIG_CMD_SCSI 122a6e50a88SIan Campbell #endif 123a6e50a88SIan Campbell 124cba69eeeSIan Campbell #define CONFIG_CMD_MEMORY 125cba69eeeSIan Campbell #define CONFIG_CMD_SETEXPR 126cba69eeeSIan Campbell 127cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS 128cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG 129cba69eeeSIan Campbell #define CONFIG_INITRD_TAG 1309f852211SPaul Kocialkowski #define CONFIG_SERIAL_TAG 131cba69eeeSIan Campbell 132e24ea55cSIan Campbell /* mmc config */ 133ff2b47f6SChen-Yu Tsai #if !defined(CONFIG_UART0_PORT_F) 134e24ea55cSIan Campbell #define CONFIG_MMC 135e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC 136e24ea55cSIan Campbell #define CONFIG_CMD_MMC 137e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI 138e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT 0 139e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC 140e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 141ff2b47f6SChen-Yu Tsai #endif 142e24ea55cSIan Campbell 143cba69eeeSIan Campbell /* 4MB of malloc() pool */ 144cba69eeeSIan Campbell #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 145cba69eeeSIan Campbell 146cba69eeeSIan Campbell /* 147cba69eeeSIan Campbell * Miscellaneous configurable options 148cba69eeeSIan Campbell */ 149cba69eeeSIan Campbell #define CONFIG_CMD_ECHO 15006beadb0SIan Campbell #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 15106beadb0SIan Campbell #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 152cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 153cba69eeeSIan Campbell #define CONFIG_SYS_GENERIC_BOARD 154cba69eeeSIan Campbell 155cba69eeeSIan Campbell /* Boot Argument Buffer Size */ 156cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 157cba69eeeSIan Campbell 158cba69eeeSIan Campbell /* standalone support */ 159*e049fe28SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR 160cba69eeeSIan Campbell 161cba69eeeSIan Campbell /* baudrate */ 162cba69eeeSIan Campbell #define CONFIG_BAUDRATE 115200 163cba69eeeSIan Campbell 164cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */ 165cba69eeeSIan Campbell #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 166cba69eeeSIan Campbell 167cba69eeeSIan Campbell /* FLASH and environment organization */ 168cba69eeeSIan Campbell 169cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH 170cba69eeeSIan Campbell 171cba69eeeSIan Campbell #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */ 172cba69eeeSIan Campbell #define CONFIG_IDENT_STRING " Allwinner Technology" 173cba69eeeSIan Campbell 174e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 175cba69eeeSIan Campbell #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 176cba69eeeSIan Campbell 177cba69eeeSIan Campbell #include <config_cmd_default.h> 178b9fb3b94SHans de Goede #undef CONFIG_CMD_FPGA 179cba69eeeSIan Campbell 180cba69eeeSIan Campbell #define CONFIG_FAT_WRITE /* enable write access */ 181cba69eeeSIan Campbell 182cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK 183cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT 184cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT 185cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT 186cba69eeeSIan Campbell 187942cb0b6SSimon Glass #define CONFIG_SPL_BOARD_LOAD_IMAGE 188942cb0b6SSimon Glass 18950827a59SIan Campbell #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 19050827a59SIan Campbell #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 19150827a59SIan Campbell 19250827a59SIan Campbell #define CONFIG_SPL_LIBDISK_SUPPORT 193f0ce28e9SSiarhei Siamashka 194f0ce28e9SSiarhei Siamashka #if !defined(CONFIG_UART0_PORT_F) 19550827a59SIan Campbell #define CONFIG_SPL_MMC_SUPPORT 196f0ce28e9SSiarhei Siamashka #endif 19750827a59SIan Campbell 19850827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 19950827a59SIan Campbell 20050827a59SIan Campbell #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 20150827a59SIan Campbell #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 20250827a59SIan Campbell 203cba69eeeSIan Campbell /* end of 32 KiB in sram */ 204cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 205cba69eeeSIan Campbell #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 206cba69eeeSIan Campbell 2076620377eSHans de Goede /* I2C */ 208ad40610bSHans de Goede #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER 2096620377eSHans de Goede #define CONFIG_SPL_I2C_SUPPORT 210ad40610bSHans de Goede #endif 211ad40610bSHans de Goede 2126c739c5dSPaul Kocialkowski #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ 2136c739c5dSPaul Kocialkowski defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ 2146c739c5dSPaul Kocialkowski defined CONFIG_I2C4_ENABLE 2158b2db32aSHans de Goede #define CONFIG_SYS_I2C 2166620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI 2176620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED 400000 2186620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE 0x7f 2198b2db32aSHans de Goede #define CONFIG_CMD_I2C 2208b2db32aSHans de Goede #endif 22155410089SHans de Goede 22255410089SHans de Goede #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) 22355410089SHans de Goede #define CONFIG_SYS_I2C_SOFT 22455410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SPEED 50000 22555410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 22655410089SHans de Goede /* We use pin names in Kconfig and sunxi_name_to_gpio() */ 22755410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda 22855410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl 22955410089SHans de Goede #ifndef __ASSEMBLY__ 23055410089SHans de Goede extern int soft_i2c_gpio_sda; 23155410089SHans de Goede extern int soft_i2c_gpio_scl; 23255410089SHans de Goede #endif 2331fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ 2341fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ 2351fc42018SHans de Goede #else 2361fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ 2371fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ 23855410089SHans de Goede #endif 23955410089SHans de Goede 24014bc66bdSHenrik Nordstrom /* PMU */ 24114bc66bdSHenrik Nordstrom #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER 24214bc66bdSHenrik Nordstrom #define CONFIG_SPL_POWER_SUPPORT 24314bc66bdSHenrik Nordstrom #endif 24414bc66bdSHenrik Nordstrom 245f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX 246cba69eeeSIan Campbell #define CONFIG_CONS_INDEX 1 /* UART0 */ 247f84269c5SHans de Goede #endif 248cba69eeeSIan Campbell 249f3133962SHans de Goede #if CONFIG_CONS_INDEX == 1 250f3133962SHans de Goede #ifdef CONFIG_MACH_SUN9I 251f3133962SHans de Goede #define OF_STDOUT_PATH "/soc/serial@07000000:115200" 252f3133962SHans de Goede #else 253f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" 254f3133962SHans de Goede #endif 255f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) 256f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" 2575cd83b11SLaurent Itti #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) 2585cd83b11SLaurent Itti #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" 259f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) 260f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" 261f3133962SHans de Goede #else 262f3133962SHans de Goede #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. 263f3133962SHans de Goede #endif 264f3133962SHans de Goede 265abce2c62SIan Campbell /* GPIO */ 266abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO 267cd82113aSHans de Goede #define CONFIG_SPL_GPIO_SUPPORT 268abce2c62SIan Campbell #define CONFIG_CMD_GPIO 269abce2c62SIan Campbell 2707f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 2717f2c521fSLuc Verhaegen /* 2725633a296SHans de Goede * The amount of RAM to keep free at the top of RAM when relocating u-boot, 2735633a296SHans de Goede * to use as framebuffer. This must be a multiple of 4096. 2747f2c521fSLuc Verhaegen */ 2755633a296SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20) 2767f2c521fSLuc Verhaegen 2772d7a084bSLuc Verhaegen /* Do we want to initialize a simple FB? */ 2782d7a084bSLuc Verhaegen #define CONFIG_VIDEO_DT_SIMPLEFB 2792d7a084bSLuc Verhaegen 2807f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SUNXI 2817f2c521fSLuc Verhaegen 2827f2c521fSLuc Verhaegen #define CONFIG_CFB_CONSOLE 2837f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SW_CURSOR 2847f2c521fSLuc Verhaegen #define CONFIG_VIDEO_LOGO 285be8ec633SHans de Goede #define CONFIG_VIDEO_STD_TIMINGS 28675481607SHans de Goede #define CONFIG_I2C_EDID 2877f2c521fSLuc Verhaegen 2887f2c521fSLuc Verhaegen /* allow both serial and cfb console. */ 2897f2c521fSLuc Verhaegen #define CONFIG_CONSOLE_MUX 2907f2c521fSLuc Verhaegen /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ 2917f2c521fSLuc Verhaegen #define CONFIG_VGA_AS_SINGLE_DEVICE 2927f2c521fSLuc Verhaegen 2932d7a084bSLuc Verhaegen /* To be able to hook simplefb into dt */ 2942d7a084bSLuc Verhaegen #ifdef CONFIG_VIDEO_DT_SIMPLEFB 2952d7a084bSLuc Verhaegen #define CONFIG_OF_BOARD_SETUP 2962d7a084bSLuc Verhaegen #endif 2972d7a084bSLuc Verhaegen 2987f2c521fSLuc Verhaegen #endif /* CONFIG_VIDEO */ 2997f2c521fSLuc Verhaegen 300c26fb9dbSHans de Goede /* Ethernet support */ 301c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC 3028145dea4SHans de Goede #define CONFIG_PHY_ADDR 1 303c26fb9dbSHans de Goede #define CONFIG_MII /* MII PHY management */ 3048145dea4SHans de Goede #define CONFIG_PHYLIB 305c26fb9dbSHans de Goede #endif 306c26fb9dbSHans de Goede 3075835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC 3085835823dSIan Campbell #define CONFIG_DW_AUTONEG 3095835823dSIan Campbell #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 3105835823dSIan Campbell #define CONFIG_PHY_ADDR 1 3115835823dSIan Campbell #define CONFIG_MII /* MII PHY management */ 3125835823dSIan Campbell #define CONFIG_PHYLIB 3135835823dSIan Campbell #endif 3145835823dSIan Campbell 3153584f30cSRoman Byshko #ifdef CONFIG_USB_EHCI 3166a72e804SHans de Goede #define CONFIG_USB_OHCI_NEW 3176a72e804SHans de Goede #define CONFIG_USB_OHCI_SUNXI 3186a72e804SHans de Goede #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 3193584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 3201a800f7aSHans de Goede #endif 3211a800f7aSHans de Goede 3221a800f7aSHans de Goede #ifdef CONFIG_USB_MUSB_SUNXI 3231a800f7aSHans de Goede #define CONFIG_MUSB_HOST 3241a800f7aSHans de Goede #define CONFIG_MUSB_PIO_ONLY 3251a800f7aSHans de Goede #endif 3261a800f7aSHans de Goede 3271a800f7aSHans de Goede #if defined CONFIG_USB_EHCI || defined CONFIG_USB_MUSB_SUNXI 3281a800f7aSHans de Goede #define CONFIG_CMD_USB 3293584f30cSRoman Byshko #define CONFIG_USB_STORAGE 3303584f30cSRoman Byshko #endif 3313584f30cSRoman Byshko 33286b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 33386b49093SHans de Goede #define CONFIG_CONSOLE_MUX 33486b49093SHans de Goede #define CONFIG_PREBOOT 33586b49093SHans de Goede #define CONFIG_SYS_STDIO_DEREGISTER 336eab9433aSHans de Goede #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 33786b49093SHans de Goede #endif 33886b49093SHans de Goede 339cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \ 340cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_NAND && \ 341cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_FAT && \ 342cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_SPI_FLASH 343cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE 344cba69eeeSIan Campbell #endif 345cba69eeeSIan Campbell 346b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R 3477f2c521fSLuc Verhaegen #define CONFIG_SYS_CONSOLE_IS_IN_ENV 348b41d7d05SJonathan Liu 349cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD 350cba69eeeSIan Campbell #include <config_distro_defaults.h> 3512ec3a612SHans de Goede 352a7925078SSiarhei Siamashka /* Enable pre-console buffer to get complete log on the VGA console */ 353a7925078SSiarhei Siamashka #define CONFIG_PRE_CONSOLE_BUFFER 354a8552c7cSHans de Goede #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ 355a7925078SSiarhei Siamashka 3568c95c556SHans de Goede /* 3578c95c556SHans de Goede * 240M RAM (256M minimum minus space for the framebuffer), 3588c95c556SHans de Goede * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 3598c95c556SHans de Goede * 1M script, 1M pxe and the ramdisk at the end. 3608c95c556SHans de Goede */ 361846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \ 3628c95c556SHans de Goede "bootm_size=0xf000000\0" \ 363*e049fe28SHans de Goede "kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \ 364*e049fe28SHans de Goede "fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \ 365*e049fe28SHans de Goede "scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \ 366*e049fe28SHans de Goede "pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \ 367*e049fe28SHans de Goede "ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0" 368846e3254SHans de Goede 36941f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC 37041f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 37141f8e9f5SChen-Yu Tsai #else 37241f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) 37341f8e9f5SChen-Yu Tsai #endif 37441f8e9f5SChen-Yu Tsai 3752ec3a612SHans de Goede #ifdef CONFIG_AHCI 3762ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 3772ec3a612SHans de Goede #else 3782ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) 3792ec3a612SHans de Goede #endif 3802ec3a612SHans de Goede 381859b3f14SChen-Yu Tsai #ifdef CONFIG_USB_EHCI 382859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 383859b3f14SChen-Yu Tsai #else 384859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) 385859b3f14SChen-Yu Tsai #endif 386859b3f14SChen-Yu Tsai 3872ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \ 38841f8e9f5SChen-Yu Tsai BOOT_TARGET_DEVICES_MMC(func) \ 3892ec3a612SHans de Goede BOOT_TARGET_DEVICES_SCSI(func) \ 390859b3f14SChen-Yu Tsai BOOT_TARGET_DEVICES_USB(func) \ 3912ec3a612SHans de Goede func(PXE, pxe, na) \ 3922ec3a612SHans de Goede func(DHCP, dhcp, na) 3932ec3a612SHans de Goede 3942ec3a612SHans de Goede #include <config_distro_bootcmd.h> 3952ec3a612SHans de Goede 39686b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 39786b49093SHans de Goede #define CONSOLE_STDIN_SETTINGS \ 39886b49093SHans de Goede "preboot=usb start\0" \ 39986b49093SHans de Goede "stdin=serial,usbkbd\0" 40086b49093SHans de Goede #else 4017f2c521fSLuc Verhaegen #define CONSOLE_STDIN_SETTINGS \ 4027f2c521fSLuc Verhaegen "stdin=serial\0" 40386b49093SHans de Goede #endif 4047f2c521fSLuc Verhaegen 4057f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 4067f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 4077f2c521fSLuc Verhaegen "stdout=serial,vga\0" \ 4087f2c521fSLuc Verhaegen "stderr=serial,vga\0" 4097f2c521fSLuc Verhaegen #else 4107f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 4117f2c521fSLuc Verhaegen "stdout=serial\0" \ 4127f2c521fSLuc Verhaegen "stderr=serial\0" 4137f2c521fSLuc Verhaegen #endif 4147f2c521fSLuc Verhaegen 4157f2c521fSLuc Verhaegen #define CONSOLE_ENV_SETTINGS \ 4167f2c521fSLuc Verhaegen CONSOLE_STDIN_SETTINGS \ 4177f2c521fSLuc Verhaegen CONSOLE_STDOUT_SETTINGS 4187f2c521fSLuc Verhaegen 4192ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \ 4207f2c521fSLuc Verhaegen CONSOLE_ENV_SETTINGS \ 421846e3254SHans de Goede MEM_LAYOUT_ENV_SETTINGS \ 42225acd33fSHans de Goede "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ 423846e3254SHans de Goede "console=ttyS0,115200\0" \ 4242ec3a612SHans de Goede BOOTENV 4252ec3a612SHans de Goede 4262ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */ 4272ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS 428cba69eeeSIan Campbell #endif 429cba69eeeSIan Campbell 430cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */ 431