1cba69eeeSIan Campbell /* 2cba69eeeSIan Campbell * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3cba69eeeSIan Campbell * 4cba69eeeSIan Campbell * (C) Copyright 2007-2011 5cba69eeeSIan Campbell * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6cba69eeeSIan Campbell * Tom Cubie <tangliang@allwinnertech.com> 7cba69eeeSIan Campbell * 8cba69eeeSIan Campbell * Configuration settings for the Allwinner sunxi series of boards. 9cba69eeeSIan Campbell * 10cba69eeeSIan Campbell * SPDX-License-Identifier: GPL-2.0+ 11cba69eeeSIan Campbell */ 12cba69eeeSIan Campbell 13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H 14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H 15cba69eeeSIan Campbell 16*daf6d399SHans de Goede #include <asm/arch/cpu.h> 17e049fe28SHans de Goede #include <linux/stringify.h> 18e049fe28SHans de Goede 1977ef1369SSiarhei Siamashka #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 2077ef1369SSiarhei Siamashka /* 2177ef1369SSiarhei Siamashka * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the 2277ef1369SSiarhei Siamashka * expense of restricting some features, so the regular machine id values can 2377ef1369SSiarhei Siamashka * be used. 2477ef1369SSiarhei Siamashka */ 2577ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 0 2677ef1369SSiarhei Siamashka #else 2777ef1369SSiarhei Siamashka /* 2877ef1369SSiarhei Siamashka * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. 2977ef1369SSiarhei Siamashka * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass 3077ef1369SSiarhei Siamashka * beyond the machine id check. 3177ef1369SSiarhei Siamashka */ 3277ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 1 3377ef1369SSiarhei Siamashka #endif 3477ef1369SSiarhei Siamashka 35cba69eeeSIan Campbell /* 36cba69eeeSIan Campbell * High Level Configuration Options 37cba69eeeSIan Campbell */ 38cba69eeeSIan Campbell #define CONFIG_SUNXI /* sunxi family */ 3950827a59SIan Campbell #ifdef CONFIG_SPL_BUILD 4050827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 4150827a59SIan Campbell #endif 42cba69eeeSIan Campbell 43cba69eeeSIan Campbell /* Serial & console */ 44cba69eeeSIan Campbell #define CONFIG_SYS_NS16550 45cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL 46cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */ 47cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK 24000000 48*daf6d399SHans de Goede #ifdef CONFIG_DM_SERIAL 49*daf6d399SHans de Goede # define CONFIG_DW_SERIAL 50*daf6d399SHans de Goede #else 511a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE -4 52cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 53cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 54cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 55cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 56c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 571a81cf83SSimon Glass #endif 58cba69eeeSIan Campbell 598a65f69cSPaul Kocialkowski /* CPU */ 60*daf6d399SHans de Goede #define CONFIG_DISPLAY_CPUINFO 618a65f69cSPaul Kocialkowski #define CONFIG_SYS_CACHELINE_SIZE 64 628a65f69cSPaul Kocialkowski 63e049fe28SHans de Goede /* 64e049fe28SHans de Goede * The DRAM Base differs between some models. We cannot use macros for the 65e049fe28SHans de Goede * CONFIG_FOO defines which contain the DRAM base address since they end 66e049fe28SHans de Goede * up unexpanded in include/autoconf.mk . 67e049fe28SHans de Goede * 68e049fe28SHans de Goede * So we have to have this #ifdef #else #endif block for these. 69e049fe28SHans de Goede */ 70e049fe28SHans de Goede #ifdef CONFIG_MACH_SUN9I 71e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x2##x 72e049fe28SHans de Goede #define CONFIG_SYS_SDRAM_BASE 0x20000000 73e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ 74e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE 0x2a000000 75e049fe28SHans de Goede #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 76e049fe28SHans de Goede #define CONFIG_SYS_SPL_MALLOC_START 0x2ff00000 77e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 78e049fe28SHans de Goede #else 79e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x4##x 80cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE 0x40000000 81e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 82e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE 0x4a000000 83e049fe28SHans de Goede #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 84e049fe28SHans de Goede #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 85e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 86e049fe28SHans de Goede #endif 87e049fe28SHans de Goede 88e049fe28SHans de Goede #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ 89e049fe28SHans de Goede #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 90e049fe28SHans de Goede 9177fe9887SHans de Goede #ifdef CONFIG_MACH_SUN9I 9277fe9887SHans de Goede /* 9377fe9887SHans de Goede * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is 9477fe9887SHans de Goede * slightly bigger. Note that it is possible to map the first 32 KiB of the 9577fe9887SHans de Goede * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the 9677fe9887SHans de Goede * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and 9777fe9887SHans de Goede * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. 9877fe9887SHans de Goede */ 9977fe9887SHans de Goede #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 10077fe9887SHans de Goede #define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */ 10177fe9887SHans de Goede #else 102cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR 0x0 103cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 10477fe9887SHans de Goede #endif 105cba69eeeSIan Campbell 106cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \ 107cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 108cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \ 109cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 110cba69eeeSIan Campbell 111cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS 1 112cba69eeeSIan Campbell #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 113cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 114cba69eeeSIan Campbell 115a6e50a88SIan Campbell #ifdef CONFIG_AHCI 116a6e50a88SIan Campbell #define CONFIG_LIBATA 117a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI 118a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT 119a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI 1200751b138SBernhard Nortmann #define CONFIG_SYS_64BIT_LBA 121a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 122a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN 1 123a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 124a6e50a88SIan Campbell CONFIG_SYS_SCSI_MAX_LUN) 125a6e50a88SIan Campbell #define CONFIG_CMD_SCSI 126a6e50a88SIan Campbell #endif 127a6e50a88SIan Campbell 128cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS 129cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG 130cba69eeeSIan Campbell #define CONFIG_INITRD_TAG 1319f852211SPaul Kocialkowski #define CONFIG_SERIAL_TAG 132cba69eeeSIan Campbell 133e5268616SHans de Goede #ifdef CONFIG_NAND_SUNXI 13421d4d37aSHans de Goede #define CONFIG_SPL_NAND_SUPPORT 1 135960caebaSPiotr Zierhoffer #endif 136960caebaSPiotr Zierhoffer 137e24ea55cSIan Campbell /* mmc config */ 138ff2b47f6SChen-Yu Tsai #if !defined(CONFIG_UART0_PORT_F) 139e24ea55cSIan Campbell #define CONFIG_MMC 140e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC 141e24ea55cSIan Campbell #define CONFIG_CMD_MMC 142e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI 143e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT 0 144e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC 145e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 146ff2b47f6SChen-Yu Tsai #endif 147e24ea55cSIan Campbell 148cba69eeeSIan Campbell /* 4MB of malloc() pool */ 149cba69eeeSIan Campbell #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 150cba69eeeSIan Campbell 151cba69eeeSIan Campbell /* 152cba69eeeSIan Campbell * Miscellaneous configurable options 153cba69eeeSIan Campbell */ 15406beadb0SIan Campbell #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 15506beadb0SIan Campbell #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 156cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 157cba69eeeSIan Campbell #define CONFIG_SYS_GENERIC_BOARD 158cba69eeeSIan Campbell 159cba69eeeSIan Campbell /* Boot Argument Buffer Size */ 160cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 161cba69eeeSIan Campbell 162cba69eeeSIan Campbell /* standalone support */ 163e049fe28SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR 164cba69eeeSIan Campbell 165cba69eeeSIan Campbell /* baudrate */ 166cba69eeeSIan Campbell #define CONFIG_BAUDRATE 115200 167cba69eeeSIan Campbell 168cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */ 169cba69eeeSIan Campbell #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 170cba69eeeSIan Campbell 171cba69eeeSIan Campbell /* FLASH and environment organization */ 172cba69eeeSIan Campbell 173cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH 174cba69eeeSIan Campbell 175fa5e1020SBoris Brezillon #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ 176cba69eeeSIan Campbell #define CONFIG_IDENT_STRING " Allwinner Technology" 177cba69eeeSIan Campbell 178e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 179cba69eeeSIan Campbell #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 180cba69eeeSIan Campbell 181cba69eeeSIan Campbell #define CONFIG_FAT_WRITE /* enable write access */ 182cba69eeeSIan Campbell 183cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK 184cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT 185cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT 186cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT 187cba69eeeSIan Campbell 188942cb0b6SSimon Glass #define CONFIG_SPL_BOARD_LOAD_IMAGE 189942cb0b6SSimon Glass 19050827a59SIan Campbell #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 19150827a59SIan Campbell #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 19250827a59SIan Campbell 19350827a59SIan Campbell #define CONFIG_SPL_LIBDISK_SUPPORT 194f0ce28e9SSiarhei Siamashka 195f0ce28e9SSiarhei Siamashka #if !defined(CONFIG_UART0_PORT_F) 19650827a59SIan Campbell #define CONFIG_SPL_MMC_SUPPORT 197f0ce28e9SSiarhei Siamashka #endif 19850827a59SIan Campbell 19950827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 20050827a59SIan Campbell 20150827a59SIan Campbell #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 20250827a59SIan Campbell #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 20350827a59SIan Campbell 204cba69eeeSIan Campbell /* end of 32 KiB in sram */ 205cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 206cba69eeeSIan Campbell #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 207cba69eeeSIan Campbell 2086620377eSHans de Goede /* I2C */ 209ad40610bSHans de Goede #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER 2106620377eSHans de Goede #define CONFIG_SPL_I2C_SUPPORT 211ad40610bSHans de Goede #endif 212ad40610bSHans de Goede 2136c739c5dSPaul Kocialkowski #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ 2146c739c5dSPaul Kocialkowski defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ 2156c739c5dSPaul Kocialkowski defined CONFIG_I2C4_ENABLE 2168b2db32aSHans de Goede #define CONFIG_SYS_I2C 2176620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI 2186620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED 400000 2196620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE 0x7f 2208b2db32aSHans de Goede #define CONFIG_CMD_I2C 2218b2db32aSHans de Goede #endif 22255410089SHans de Goede 22355410089SHans de Goede #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) 22455410089SHans de Goede #define CONFIG_SYS_I2C_SOFT 22555410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SPEED 50000 22655410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 22755410089SHans de Goede /* We use pin names in Kconfig and sunxi_name_to_gpio() */ 22855410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda 22955410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl 23055410089SHans de Goede #ifndef __ASSEMBLY__ 23155410089SHans de Goede extern int soft_i2c_gpio_sda; 23255410089SHans de Goede extern int soft_i2c_gpio_scl; 23355410089SHans de Goede #endif 2341fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ 2351fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ 2361fc42018SHans de Goede #else 2371fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ 2381fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ 23955410089SHans de Goede #endif 24055410089SHans de Goede 24114bc66bdSHenrik Nordstrom /* PMU */ 24214bc66bdSHenrik Nordstrom #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER 24314bc66bdSHenrik Nordstrom #define CONFIG_SPL_POWER_SUPPORT 24414bc66bdSHenrik Nordstrom #endif 24514bc66bdSHenrik Nordstrom 246f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX 247cba69eeeSIan Campbell #define CONFIG_CONS_INDEX 1 /* UART0 */ 248f84269c5SHans de Goede #endif 249cba69eeeSIan Campbell 250a5da3c83SHans de Goede #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE 251f3133962SHans de Goede #if CONFIG_CONS_INDEX == 1 252f3133962SHans de Goede #ifdef CONFIG_MACH_SUN9I 253f3133962SHans de Goede #define OF_STDOUT_PATH "/soc/serial@07000000:115200" 254f3133962SHans de Goede #else 255f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" 256f3133962SHans de Goede #endif 257f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) 258f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" 2595cd83b11SLaurent Itti #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) 2605cd83b11SLaurent Itti #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" 261f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) 262f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" 263f3133962SHans de Goede #else 264f3133962SHans de Goede #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. 265f3133962SHans de Goede #endif 266a5da3c83SHans de Goede #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */ 267f3133962SHans de Goede 268abce2c62SIan Campbell /* GPIO */ 269abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO 270cd82113aSHans de Goede #define CONFIG_SPL_GPIO_SUPPORT 271abce2c62SIan Campbell #define CONFIG_CMD_GPIO 272abce2c62SIan Campbell 2737f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 2747f2c521fSLuc Verhaegen /* 2755633a296SHans de Goede * The amount of RAM to keep free at the top of RAM when relocating u-boot, 2765633a296SHans de Goede * to use as framebuffer. This must be a multiple of 4096. 2777f2c521fSLuc Verhaegen */ 278c1cfd519SHans de Goede #ifdef CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804 279c1cfd519SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (12 << 20) 280c1cfd519SHans de Goede #else 2815633a296SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20) 282c1cfd519SHans de Goede #endif 2837f2c521fSLuc Verhaegen 2842d7a084bSLuc Verhaegen /* Do we want to initialize a simple FB? */ 2852d7a084bSLuc Verhaegen #define CONFIG_VIDEO_DT_SIMPLEFB 2862d7a084bSLuc Verhaegen 2877f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SUNXI 2887f2c521fSLuc Verhaegen 2897f2c521fSLuc Verhaegen #define CONFIG_CFB_CONSOLE 2907f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SW_CURSOR 2917f2c521fSLuc Verhaegen #define CONFIG_VIDEO_LOGO 292be8ec633SHans de Goede #define CONFIG_VIDEO_STD_TIMINGS 29375481607SHans de Goede #define CONFIG_I2C_EDID 29458332f89SHans de Goede #define VIDEO_LINE_LEN (pGD->plnSizeX) 2957f2c521fSLuc Verhaegen 2967f2c521fSLuc Verhaegen /* allow both serial and cfb console. */ 2977f2c521fSLuc Verhaegen #define CONFIG_CONSOLE_MUX 2987f2c521fSLuc Verhaegen /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ 2997f2c521fSLuc Verhaegen #define CONFIG_VGA_AS_SINGLE_DEVICE 3007f2c521fSLuc Verhaegen 3012d7a084bSLuc Verhaegen /* To be able to hook simplefb into dt */ 3022d7a084bSLuc Verhaegen #ifdef CONFIG_VIDEO_DT_SIMPLEFB 3032d7a084bSLuc Verhaegen #define CONFIG_OF_BOARD_SETUP 3042d7a084bSLuc Verhaegen #endif 3052d7a084bSLuc Verhaegen 3067f2c521fSLuc Verhaegen #endif /* CONFIG_VIDEO */ 3077f2c521fSLuc Verhaegen 308c26fb9dbSHans de Goede /* Ethernet support */ 309c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC 3108145dea4SHans de Goede #define CONFIG_PHY_ADDR 1 311c26fb9dbSHans de Goede #define CONFIG_MII /* MII PHY management */ 3128145dea4SHans de Goede #define CONFIG_PHYLIB 313c26fb9dbSHans de Goede #endif 314c26fb9dbSHans de Goede 3155835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC 3165835823dSIan Campbell #define CONFIG_DW_AUTONEG 3175835823dSIan Campbell #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 3185835823dSIan Campbell #define CONFIG_PHY_ADDR 1 3195835823dSIan Campbell #define CONFIG_MII /* MII PHY management */ 3205835823dSIan Campbell #define CONFIG_PHYLIB 3215835823dSIan Campbell #endif 3225835823dSIan Campbell 3232582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_EHCI_HCD 3246a72e804SHans de Goede #define CONFIG_USB_OHCI_NEW 3256a72e804SHans de Goede #define CONFIG_USB_OHCI_SUNXI 3266a72e804SHans de Goede #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 3273584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 3281a800f7aSHans de Goede #endif 3291a800f7aSHans de Goede 3301a800f7aSHans de Goede #ifdef CONFIG_USB_MUSB_SUNXI 33195de1e2fSPaul Kocialkowski #define CONFIG_USB_MUSB_PIO_ONLY 3321a800f7aSHans de Goede #endif 3331a800f7aSHans de Goede 334b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_MUSB_GADGET 335b21144ebSPaul Kocialkowski #define CONFIG_USB_GADGET 336b21144ebSPaul Kocialkowski #define CONFIG_USB_GADGET_DUALSPEED 337b21144ebSPaul Kocialkowski #define CONFIG_USB_GADGET_VBUS_DRAW 0 338b21144ebSPaul Kocialkowski 339b21144ebSPaul Kocialkowski #define CONFIG_USB_GADGET_DOWNLOAD 340b21144ebSPaul Kocialkowski #define CONFIG_USB_FUNCTION_FASTBOOT 341b21144ebSPaul Kocialkowski #define CONFIG_USB_FUNCTION_MASS_STORAGE 342b21144ebSPaul Kocialkowski #endif 343b21144ebSPaul Kocialkowski 344b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_GADGET_DOWNLOAD 345b21144ebSPaul Kocialkowski #define CONFIG_G_DNL_VENDOR_NUM 0x1f3a 346b21144ebSPaul Kocialkowski #define CONFIG_G_DNL_PRODUCT_NUM 0x1010 347b21144ebSPaul Kocialkowski #define CONFIG_G_DNL_MANUFACTURER "Allwinner Technology" 348b21144ebSPaul Kocialkowski #endif 349b21144ebSPaul Kocialkowski 350b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_FASTBOOT 351b21144ebSPaul Kocialkowski #define CONFIG_CMD_FASTBOOT 352b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 353b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000 354b21144ebSPaul Kocialkowski 355b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH 356b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 357b21144ebSPaul Kocialkowski #define CONFIG_EFI_PARTITION 358b21144ebSPaul Kocialkowski #endif 359b21144ebSPaul Kocialkowski 360b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE 361b21144ebSPaul Kocialkowski #define CONFIG_CMD_USB_MASS_STORAGE 362b21144ebSPaul Kocialkowski #endif 363b21144ebSPaul Kocialkowski 36486b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 36586b49093SHans de Goede #define CONFIG_CONSOLE_MUX 36686b49093SHans de Goede #define CONFIG_PREBOOT 36786b49093SHans de Goede #define CONFIG_SYS_STDIO_DEREGISTER 368eab9433aSHans de Goede #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 36986b49093SHans de Goede #endif 37086b49093SHans de Goede 371cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \ 372cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_NAND && \ 373cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_FAT && \ 374cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_SPI_FLASH 375cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE 376cba69eeeSIan Campbell #endif 377cba69eeeSIan Campbell 378b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R 3797f2c521fSLuc Verhaegen #define CONFIG_SYS_CONSOLE_IS_IN_ENV 380b41d7d05SJonathan Liu 381cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD 382cba69eeeSIan Campbell #include <config_distro_defaults.h> 3832ec3a612SHans de Goede 384a7925078SSiarhei Siamashka /* Enable pre-console buffer to get complete log on the VGA console */ 385a7925078SSiarhei Siamashka #define CONFIG_PRE_CONSOLE_BUFFER 386a8552c7cSHans de Goede #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ 387a7925078SSiarhei Siamashka 3888c95c556SHans de Goede /* 3898c95c556SHans de Goede * 240M RAM (256M minimum minus space for the framebuffer), 3908c95c556SHans de Goede * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 3918c95c556SHans de Goede * 1M script, 1M pxe and the ramdisk at the end. 3928c95c556SHans de Goede */ 393846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \ 3948c95c556SHans de Goede "bootm_size=0xf000000\0" \ 395e049fe28SHans de Goede "kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \ 396e049fe28SHans de Goede "fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \ 397e049fe28SHans de Goede "scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \ 398e049fe28SHans de Goede "pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \ 399e049fe28SHans de Goede "ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0" 400846e3254SHans de Goede 40141f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC 40241f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 40341f8e9f5SChen-Yu Tsai #else 40441f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) 40541f8e9f5SChen-Yu Tsai #endif 40641f8e9f5SChen-Yu Tsai 4072ec3a612SHans de Goede #ifdef CONFIG_AHCI 4082ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 4092ec3a612SHans de Goede #else 4102ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) 4112ec3a612SHans de Goede #endif 4122ec3a612SHans de Goede 4132582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_STORAGE 414859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 415859b3f14SChen-Yu Tsai #else 416859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) 417859b3f14SChen-Yu Tsai #endif 418859b3f14SChen-Yu Tsai 4192ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \ 42041f8e9f5SChen-Yu Tsai BOOT_TARGET_DEVICES_MMC(func) \ 4212ec3a612SHans de Goede BOOT_TARGET_DEVICES_SCSI(func) \ 422859b3f14SChen-Yu Tsai BOOT_TARGET_DEVICES_USB(func) \ 4232ec3a612SHans de Goede func(PXE, pxe, na) \ 4242ec3a612SHans de Goede func(DHCP, dhcp, na) 4252ec3a612SHans de Goede 4262ec3a612SHans de Goede #include <config_distro_bootcmd.h> 4272ec3a612SHans de Goede 42886b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 42986b49093SHans de Goede #define CONSOLE_STDIN_SETTINGS \ 43086b49093SHans de Goede "preboot=usb start\0" \ 43186b49093SHans de Goede "stdin=serial,usbkbd\0" 43286b49093SHans de Goede #else 4337f2c521fSLuc Verhaegen #define CONSOLE_STDIN_SETTINGS \ 4347f2c521fSLuc Verhaegen "stdin=serial\0" 43586b49093SHans de Goede #endif 4367f2c521fSLuc Verhaegen 4377f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 4387f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 4397f2c521fSLuc Verhaegen "stdout=serial,vga\0" \ 4407f2c521fSLuc Verhaegen "stderr=serial,vga\0" 4417f2c521fSLuc Verhaegen #else 4427f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 4437f2c521fSLuc Verhaegen "stdout=serial\0" \ 4447f2c521fSLuc Verhaegen "stderr=serial\0" 4457f2c521fSLuc Verhaegen #endif 4467f2c521fSLuc Verhaegen 4477f2c521fSLuc Verhaegen #define CONSOLE_ENV_SETTINGS \ 4487f2c521fSLuc Verhaegen CONSOLE_STDIN_SETTINGS \ 4497f2c521fSLuc Verhaegen CONSOLE_STDOUT_SETTINGS 4507f2c521fSLuc Verhaegen 4512ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \ 4527f2c521fSLuc Verhaegen CONSOLE_ENV_SETTINGS \ 453846e3254SHans de Goede MEM_LAYOUT_ENV_SETTINGS \ 45425acd33fSHans de Goede "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ 455846e3254SHans de Goede "console=ttyS0,115200\0" \ 4562ec3a612SHans de Goede BOOTENV 4572ec3a612SHans de Goede 4582ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */ 4592ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS 460cba69eeeSIan Campbell #endif 461cba69eeeSIan Campbell 462cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */ 463