1*cba69eeeSIan Campbell /* 2*cba69eeeSIan Campbell * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3*cba69eeeSIan Campbell * 4*cba69eeeSIan Campbell * (C) Copyright 2007-2011 5*cba69eeeSIan Campbell * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6*cba69eeeSIan Campbell * Tom Cubie <tangliang@allwinnertech.com> 7*cba69eeeSIan Campbell * 8*cba69eeeSIan Campbell * Configuration settings for the Allwinner sunxi series of boards. 9*cba69eeeSIan Campbell * 10*cba69eeeSIan Campbell * SPDX-License-Identifier: GPL-2.0+ 11*cba69eeeSIan Campbell */ 12*cba69eeeSIan Campbell 13*cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H 14*cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H 15*cba69eeeSIan Campbell 16*cba69eeeSIan Campbell /* 17*cba69eeeSIan Campbell * High Level Configuration Options 18*cba69eeeSIan Campbell */ 19*cba69eeeSIan Campbell #define CONFIG_SUNXI /* sunxi family */ 20*cba69eeeSIan Campbell 21*cba69eeeSIan Campbell #include <asm/arch/cpu.h> /* get chip and board defs */ 22*cba69eeeSIan Campbell 23*cba69eeeSIan Campbell #define CONFIG_SYS_TEXT_BASE 0x4a000000 24*cba69eeeSIan Campbell 25*cba69eeeSIan Campbell /* 26*cba69eeeSIan Campbell * Display CPU information 27*cba69eeeSIan Campbell */ 28*cba69eeeSIan Campbell #define CONFIG_DISPLAY_CPUINFO 29*cba69eeeSIan Campbell 30*cba69eeeSIan Campbell /* Serial & console */ 31*cba69eeeSIan Campbell #define CONFIG_SYS_NS16550 32*cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL 33*cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */ 34*cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_REG_SIZE -4 35*cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK 24000000 36*cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 37*cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 38*cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 39*cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 40*cba69eeeSIan Campbell 41*cba69eeeSIan Campbell /* DRAM Base */ 42*cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE 0x40000000 43*cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR 0x0 44*cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 45*cba69eeeSIan Campbell 46*cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \ 47*cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 48*cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \ 49*cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 50*cba69eeeSIan Campbell 51*cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS 1 52*cba69eeeSIan Campbell #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 53*cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 54*cba69eeeSIan Campbell 55*cba69eeeSIan Campbell #define CONFIG_CMD_MEMORY 56*cba69eeeSIan Campbell #define CONFIG_CMD_SETEXPR 57*cba69eeeSIan Campbell 58*cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS 59*cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG 60*cba69eeeSIan Campbell #define CONFIG_INITRD_TAG 61*cba69eeeSIan Campbell 62*cba69eeeSIan Campbell /* 4MB of malloc() pool */ 63*cba69eeeSIan Campbell #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 64*cba69eeeSIan Campbell 65*cba69eeeSIan Campbell /* 66*cba69eeeSIan Campbell * Miscellaneous configurable options 67*cba69eeeSIan Campbell */ 68*cba69eeeSIan Campbell #define CONFIG_CMD_ECHO 69*cba69eeeSIan Campbell #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 70*cba69eeeSIan Campbell #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 71*cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 72*cba69eeeSIan Campbell #define CONFIG_SYS_GENERIC_BOARD 73*cba69eeeSIan Campbell 74*cba69eeeSIan Campbell /* Boot Argument Buffer Size */ 75*cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 76*cba69eeeSIan Campbell 77*cba69eeeSIan Campbell #define CONFIG_SYS_LOAD_ADDR 0x48000000 /* default load address */ 78*cba69eeeSIan Campbell 79*cba69eeeSIan Campbell /* standalone support */ 80*cba69eeeSIan Campbell #define CONFIG_STANDALONE_LOAD_ADDR 0x48000000 81*cba69eeeSIan Campbell 82*cba69eeeSIan Campbell #define CONFIG_SYS_HZ 1000 83*cba69eeeSIan Campbell 84*cba69eeeSIan Campbell /* baudrate */ 85*cba69eeeSIan Campbell #define CONFIG_BAUDRATE 115200 86*cba69eeeSIan Campbell 87*cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */ 88*cba69eeeSIan Campbell #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 89*cba69eeeSIan Campbell 90*cba69eeeSIan Campbell /* FLASH and environment organization */ 91*cba69eeeSIan Campbell 92*cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH 93*cba69eeeSIan Campbell 94*cba69eeeSIan Campbell #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */ 95*cba69eeeSIan Campbell #define CONFIG_IDENT_STRING " Allwinner Technology" 96*cba69eeeSIan Campbell 97*cba69eeeSIan Campbell #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 98*cba69eeeSIan Campbell 99*cba69eeeSIan Campbell #define CONFIG_EXTRA_ENV_SETTINGS \ 100*cba69eeeSIan Campbell "bootm_size=0x10000000\0" 101*cba69eeeSIan Campbell 102*cba69eeeSIan Campbell #define CONFIG_SYS_BOOT_GET_CMDLINE 103*cba69eeeSIan Campbell 104*cba69eeeSIan Campbell #include <config_cmd_default.h> 105*cba69eeeSIan Campbell 106*cba69eeeSIan Campbell #define CONFIG_FAT_WRITE /* enable write access */ 107*cba69eeeSIan Campbell 108*cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK 109*cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT 110*cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT 111*cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT 112*cba69eeeSIan Campbell 113*cba69eeeSIan Campbell #define CONFIG_SPL 114*cba69eeeSIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds" 115*cba69eeeSIan Campbell #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi" 116*cba69eeeSIan Campbell #define CONFIG_SPL_TEXT_BASE 0x2000 117*cba69eeeSIan Campbell #define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */ 118*cba69eeeSIan Campbell /* end of 32 KiB in sram */ 119*cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 120*cba69eeeSIan Campbell #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 121*cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 122*cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 123*cba69eeeSIan Campbell 124*cba69eeeSIan Campbell #undef CONFIG_CMD_FPGA 125*cba69eeeSIan Campbell #undef CONFIG_CMD_NET 126*cba69eeeSIan Campbell #undef CONFIG_CMD_NFS 127*cba69eeeSIan Campbell 128*cba69eeeSIan Campbell #define CONFIG_CONS_INDEX 1 /* UART0 */ 129*cba69eeeSIan Campbell 130*cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \ 131*cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_NAND && \ 132*cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_FAT && \ 133*cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_SPI_FLASH 134*cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE 135*cba69eeeSIan Campbell #endif 136*cba69eeeSIan Campbell 137*cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD 138*cba69eeeSIan Campbell #include <config_distro_defaults.h> 139*cba69eeeSIan Campbell #endif 140*cba69eeeSIan Campbell 141*cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */ 142