xref: /rk3399_rockchip-uboot/include/configs/sunxi-common.h (revision c8564b24ab4862ca07d4b054cd2cdecfc22c43a9)
1cba69eeeSIan Campbell /*
2cba69eeeSIan Campbell  * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3cba69eeeSIan Campbell  *
4cba69eeeSIan Campbell  * (C) Copyright 2007-2011
5cba69eeeSIan Campbell  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6cba69eeeSIan Campbell  * Tom Cubie <tangliang@allwinnertech.com>
7cba69eeeSIan Campbell  *
8cba69eeeSIan Campbell  * Configuration settings for the Allwinner sunxi series of boards.
9cba69eeeSIan Campbell  *
10cba69eeeSIan Campbell  * SPDX-License-Identifier:	GPL-2.0+
11cba69eeeSIan Campbell  */
12cba69eeeSIan Campbell 
13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H
14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H
15cba69eeeSIan Campbell 
16daf6d399SHans de Goede #include <asm/arch/cpu.h>
17e049fe28SHans de Goede #include <linux/stringify.h>
18e049fe28SHans de Goede 
1977ef1369SSiarhei Siamashka #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
2077ef1369SSiarhei Siamashka /*
2177ef1369SSiarhei Siamashka  * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
2277ef1369SSiarhei Siamashka  * expense of restricting some features, so the regular machine id values can
2377ef1369SSiarhei Siamashka  * be used.
2477ef1369SSiarhei Siamashka  */
2577ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV	0
2677ef1369SSiarhei Siamashka #else
2777ef1369SSiarhei Siamashka /*
2877ef1369SSiarhei Siamashka  * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
2977ef1369SSiarhei Siamashka  * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
3077ef1369SSiarhei Siamashka  * beyond the machine id check.
3177ef1369SSiarhei Siamashka  */
3277ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV	1
3377ef1369SSiarhei Siamashka #endif
3477ef1369SSiarhei Siamashka 
35cba69eeeSIan Campbell /* Serial & console */
36cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL
37cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */
38cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK		24000000
394fb60552SThomas Chou #ifndef CONFIG_DM_SERIAL
401a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE	-4
41cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
42cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
43cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
44cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
45c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
461a81cf83SSimon Glass #endif
47cba69eeeSIan Campbell 
488a65f69cSPaul Kocialkowski /* CPU */
49e4916e85SAndre Przywara #define COUNTER_FREQUENCY		24000000
508a65f69cSPaul Kocialkowski 
51e049fe28SHans de Goede /*
52e049fe28SHans de Goede  * The DRAM Base differs between some models. We cannot use macros for the
53e049fe28SHans de Goede  * CONFIG_FOO defines which contain the DRAM base address since they end
54e049fe28SHans de Goede  * up unexpanded in include/autoconf.mk .
55e049fe28SHans de Goede  *
56e049fe28SHans de Goede  * So we have to have this #ifdef #else #endif block for these.
57e049fe28SHans de Goede  */
58e049fe28SHans de Goede #ifdef CONFIG_MACH_SUN9I
59e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x2##x
60e049fe28SHans de Goede #define CONFIG_SYS_SDRAM_BASE		0x20000000
61e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR		0x22000000 /* default load address */
62e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE		0x2a000000
63ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
64ff42d107SHans de Goede  * since it needs to fit in with the other values. By also #defining it
65ff42d107SHans de Goede  * we get warnings if the Kconfig value mismatches. */
66ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR		0x2fe00000
67e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR	0x2ff80000
68e049fe28SHans de Goede #else
69e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x4##x
70cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE		0x40000000
71e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
72e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE		0x4a000000
73ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
74ff42d107SHans de Goede  * since it needs to fit in with the other values. By also #defining it
75ff42d107SHans de Goede  * we get warnings if the Kconfig value mismatches. */
76ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR		0x4fe00000
77e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
78e049fe28SHans de Goede #endif
79e049fe28SHans de Goede 
80e049fe28SHans de Goede #define CONFIG_SPL_BSS_MAX_SIZE		0x00080000 /* 512 KiB */
81e049fe28SHans de Goede 
82bc613d85SAndre Przywara #ifdef CONFIG_SUNXI_HIGH_SRAM
8377fe9887SHans de Goede /*
8477fe9887SHans de Goede  * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
8577fe9887SHans de Goede  * slightly bigger. Note that it is possible to map the first 32 KiB of the
8677fe9887SHans de Goede  * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
8777fe9887SHans de Goede  * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
8877fe9887SHans de Goede  * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
8977fe9887SHans de Goede  */
9077fe9887SHans de Goede #define CONFIG_SYS_INIT_RAM_ADDR	0x10000
91eb504fa1SAndre Przywara #define CONFIG_SYS_INIT_RAM_SIZE	0x08000	/* FIXME: 40 KiB ? */
9277fe9887SHans de Goede #else
93cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR	0x0
94cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
9577fe9887SHans de Goede #endif
96cba69eeeSIan Campbell 
97cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \
98cba69eeeSIan Campbell 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
99cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \
100cba69eeeSIan Campbell 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
101cba69eeeSIan Campbell 
102cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS		1
103cba69eeeSIan Campbell #define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
104cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */
105cba69eeeSIan Campbell 
106a6e50a88SIan Campbell #ifdef CONFIG_AHCI
107a6e50a88SIan Campbell #define CONFIG_LIBATA
108a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI
109a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT
110a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI
1110751b138SBernhard Nortmann #define CONFIG_SYS_64BIT_LBA
112a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
113a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN		1
114a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
115a6e50a88SIan Campbell 					 CONFIG_SYS_SCSI_MAX_LUN)
116c649e3c9SSimon Glass #define CONFIG_SCSI
117a6e50a88SIan Campbell #endif
118a6e50a88SIan Campbell 
119cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS
120cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG
121cba69eeeSIan Campbell #define CONFIG_INITRD_TAG
1229f852211SPaul Kocialkowski #define CONFIG_SERIAL_TAG
123cba69eeeSIan Campbell 
124e5268616SHans de Goede #ifdef CONFIG_NAND_SUNXI
125a0dfa88bSBoris Brezillon #define CONFIG_SYS_NAND_MAX_ECCPOS 1664
1264ccae81cSBoris Brezillon #define CONFIG_SYS_NAND_ONFI_DETECTION
1274ccae81cSBoris Brezillon #define CONFIG_SYS_MAX_NAND_DEVICE 8
128d482a8dfSHans de Goede 
129d482a8dfSHans de Goede #define CONFIG_MTD_DEVICE
130d482a8dfSHans de Goede #define CONFIG_MTD_PARTITIONS
131960caebaSPiotr Zierhoffer #endif
132960caebaSPiotr Zierhoffer 
13319e99fb4SSiarhei Siamashka #ifdef CONFIG_SPL_SPI_SUNXI
13419e99fb4SSiarhei Siamashka #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
13519e99fb4SSiarhei Siamashka #endif
13619e99fb4SSiarhei Siamashka 
137e24ea55cSIan Campbell /* mmc config */
13844c79879SMaxime Ripard #ifdef CONFIG_MMC
139e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT		0
140fb1c43ccSMaxime Ripard #endif
141fb1c43ccSMaxime Ripard 
142fb1c43ccSMaxime Ripard #if defined(CONFIG_ENV_IS_IN_MMC)
143e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
144ae042bebSEmmanuel Vadot #define CONFIG_SYS_MMC_MAX_DEVICE	4
145ff2b47f6SChen-Yu Tsai #endif
146e24ea55cSIan Campbell 
1475c965ed9SHans de Goede /* 64MB of malloc() pool */
1485c965ed9SHans de Goede #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (64 << 20))
149cba69eeeSIan Campbell 
150cba69eeeSIan Campbell /*
151cba69eeeSIan Campbell  * Miscellaneous configurable options
152cba69eeeSIan Campbell  */
15306beadb0SIan Campbell #define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
15406beadb0SIan Campbell #define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
155cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
156cba69eeeSIan Campbell 
157cba69eeeSIan Campbell /* Boot Argument Buffer Size */
158cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
159cba69eeeSIan Campbell 
160cba69eeeSIan Campbell /* standalone support */
161e049fe28SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR	CONFIG_SYS_LOAD_ADDR
162cba69eeeSIan Campbell 
163cba69eeeSIan Campbell /* baudrate */
164cba69eeeSIan Campbell 
165cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */
166cba69eeeSIan Campbell #define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */
167cba69eeeSIan Campbell 
168cba69eeeSIan Campbell /* FLASH and environment organization */
169cba69eeeSIan Campbell 
170fa5e1020SBoris Brezillon #define CONFIG_SYS_MONITOR_LEN		(768 << 10)	/* 768 KiB */
171cba69eeeSIan Campbell 
172cba69eeeSIan Campbell #define CONFIG_FAT_WRITE	/* enable write access */
173cba69eeeSIan Campbell 
174cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK
175cba69eeeSIan Campbell 
176eb77f5c9SAndre Przywara #ifndef CONFIG_ARM64		/* AArch64 FEL support is not ready yet */
177942cb0b6SSimon Glass #define CONFIG_SPL_BOARD_LOAD_IMAGE
178eb77f5c9SAndre Przywara #endif
179942cb0b6SSimon Glass 
180bc613d85SAndre Przywara #ifdef CONFIG_SUNXI_HIGH_SRAM
181b19236fdSSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE		0x10040		/* sram start+header */
182bc613d85SAndre Przywara #define CONFIG_SPL_MAX_SIZE		0x7fc0		/* 32 KiB */
183bc613d85SAndre Przywara #define LOW_LEVEL_SRAM_STACK		0x00018000
184d96ebc46SSiarhei Siamashka #else
185b19236fdSSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE		0x40		/* sram start+header */
186b19236fdSSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE		0x5fc0		/* 24KB on sun4i/sun7i */
187bc613d85SAndre Przywara #define LOW_LEVEL_SRAM_STACK		0x00008000	/* End of sram */
188d96ebc46SSiarhei Siamashka #endif
18950827a59SIan Campbell 
190bc613d85SAndre Przywara #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
191bc613d85SAndre Przywara 
192d96ebc46SSiarhei Siamashka #ifndef CONFIG_ARM64
19350827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
194d96ebc46SSiarhei Siamashka #endif
19550827a59SIan Campbell 
19650827a59SIan Campbell #define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */
19750827a59SIan Campbell 
198cba69eeeSIan Campbell 
1996620377eSHans de Goede /* I2C */
2000d8382aeSJelle van der Waa #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
2010d8382aeSJelle van der Waa     defined CONFIG_SY8106A_POWER
202ad40610bSHans de Goede #endif
203ad40610bSHans de Goede 
2046c739c5dSPaul Kocialkowski #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
2056c739c5dSPaul Kocialkowski     defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
2069d082687SJelle van der Waa     defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
2078b2db32aSHans de Goede #define CONFIG_SYS_I2C
2086620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI
2096620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED		400000
2106620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE		0x7f
2118b2db32aSHans de Goede #endif
21255410089SHans de Goede 
21355410089SHans de Goede #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
21455410089SHans de Goede #define CONFIG_SYS_I2C_SOFT
21555410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SPEED	50000
21655410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SLAVE	0x00
21755410089SHans de Goede /* We use pin names in Kconfig and sunxi_name_to_gpio() */
21855410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SDA	soft_i2c_gpio_sda
21955410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SCL	soft_i2c_gpio_scl
22055410089SHans de Goede #ifndef __ASSEMBLY__
22155410089SHans de Goede extern int soft_i2c_gpio_sda;
22255410089SHans de Goede extern int soft_i2c_gpio_scl;
22355410089SHans de Goede #endif
2241fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS	0 /* The lcd panel soft i2c is bus 0 */
2251fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM		1 /* And the axp209 i2c bus is bus 1 */
2261fc42018SHans de Goede #else
2271fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM		0 /* The axp209 i2c bus is bus 0 */
2281fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS	-1 /* NA, but necessary to compile */
22955410089SHans de Goede #endif
23055410089SHans de Goede 
23114bc66bdSHenrik Nordstrom /* PMU */
23295ab8feeSvishnupatekar #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
2330d8382aeSJelle van der Waa     defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
2340d8382aeSJelle van der Waa     defined CONFIG_SY8106A_POWER
23514bc66bdSHenrik Nordstrom #endif
23614bc66bdSHenrik Nordstrom 
237f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX
238cba69eeeSIan Campbell #define CONFIG_CONS_INDEX              1       /* UART0 */
239f84269c5SHans de Goede #endif
240cba69eeeSIan Campbell 
241a5da3c83SHans de Goede #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
242f3133962SHans de Goede #if CONFIG_CONS_INDEX == 1
243f3133962SHans de Goede #ifdef CONFIG_MACH_SUN9I
244f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc/serial@07000000:115200"
245f3133962SHans de Goede #else
246f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28000:115200"
247f3133962SHans de Goede #endif
248f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
249f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
2505cd83b11SLaurent Itti #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
2515cd83b11SLaurent Itti #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
252f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
253f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc@01c00000/serial@01f02800:115200"
254f3133962SHans de Goede #else
255f3133962SHans de Goede #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
256f3133962SHans de Goede #endif
257a5da3c83SHans de Goede #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
258f3133962SHans de Goede 
259abce2c62SIan Campbell /* GPIO */
260abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO
261abce2c62SIan Campbell 
2627f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO
2637f2c521fSLuc Verhaegen /*
2645633a296SHans de Goede  * The amount of RAM to keep free at the top of RAM when relocating u-boot,
2655633a296SHans de Goede  * to use as framebuffer. This must be a multiple of 4096.
2667f2c521fSLuc Verhaegen  */
2675c965ed9SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
2687f2c521fSLuc Verhaegen 
2692d7a084bSLuc Verhaegen /* Do we want to initialize a simple FB? */
2702d7a084bSLuc Verhaegen #define CONFIG_VIDEO_DT_SIMPLEFB
2712d7a084bSLuc Verhaegen 
2727f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SUNXI
2737f2c521fSLuc Verhaegen 
2747f2c521fSLuc Verhaegen #define CONFIG_VIDEO_LOGO
275be8ec633SHans de Goede #define CONFIG_VIDEO_STD_TIMINGS
27675481607SHans de Goede #define CONFIG_I2C_EDID
27758332f89SHans de Goede #define VIDEO_LINE_LEN (pGD->plnSizeX)
2787f2c521fSLuc Verhaegen 
2797f2c521fSLuc Verhaegen /* allow both serial and cfb console. */
2807f2c521fSLuc Verhaegen /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
2817f2c521fSLuc Verhaegen 
2827f2c521fSLuc Verhaegen #endif /* CONFIG_VIDEO */
2837f2c521fSLuc Verhaegen 
284c26fb9dbSHans de Goede /* Ethernet support */
285c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC
2868145dea4SHans de Goede #define CONFIG_PHY_ADDR		1
287c26fb9dbSHans de Goede #define CONFIG_MII			/* MII PHY management		*/
2888145dea4SHans de Goede #define CONFIG_PHYLIB
289c26fb9dbSHans de Goede #endif
290c26fb9dbSHans de Goede 
2915835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC
2925835823dSIan Campbell #define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
2935835823dSIan Campbell #define CONFIG_PHY_ADDR		1
2945835823dSIan Campbell #define CONFIG_MII			/* MII PHY management		*/
2951eae8f66SHans de Goede #define CONFIG_PHY_REALTEK
2965835823dSIan Campbell #endif
2975835823dSIan Campbell 
2982582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_EHCI_HCD
2996a72e804SHans de Goede #define CONFIG_USB_OHCI_NEW
3006a72e804SHans de Goede #define CONFIG_USB_OHCI_SUNXI
3016a72e804SHans de Goede #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
3023584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
3031a800f7aSHans de Goede #endif
3041a800f7aSHans de Goede 
3051a800f7aSHans de Goede #ifdef CONFIG_USB_MUSB_SUNXI
30695de1e2fSPaul Kocialkowski #define CONFIG_USB_MUSB_PIO_ONLY
3071a800f7aSHans de Goede #endif
3081a800f7aSHans de Goede 
309b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_MUSB_GADGET
310aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_FASTBOOT
311aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_MASS_STORAGE
312b21144ebSPaul Kocialkowski #endif
313b21144ebSPaul Kocialkowski 
314b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_FASTBOOT
315b21144ebSPaul Kocialkowski #define CONFIG_CMD_FASTBOOT
316b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
317b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_SIZE	0x2000000
318bac83fb0SMaxime Ripard #define CONFIG_ANDROID_BOOT_IMAGE
319b21144ebSPaul Kocialkowski 
320b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH
32144c79879SMaxime Ripard 
32244c79879SMaxime Ripard #ifdef CONFIG_MMC
323b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH_MMC_DEV	0
324b21144ebSPaul Kocialkowski #endif
32544c79879SMaxime Ripard #endif
326b21144ebSPaul Kocialkowski 
327b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
328b21144ebSPaul Kocialkowski #endif
329b21144ebSPaul Kocialkowski 
33086b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD
33186b49093SHans de Goede #define CONFIG_PREBOOT
332eab9433aSHans de Goede #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
33386b49093SHans de Goede #endif
33486b49093SHans de Goede 
335b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R
336b41d7d05SJonathan Liu 
337cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD
338cba69eeeSIan Campbell #include <config_distro_defaults.h>
3392ec3a612SHans de Goede 
340671f9ad8SAndre Przywara #ifdef CONFIG_ARM64
341671f9ad8SAndre Przywara /*
342671f9ad8SAndre Przywara  * Boards seem to come with at least 512MB of DRAM.
343671f9ad8SAndre Przywara  * The kernel should go at 512K, which is the default text offset (that will
344671f9ad8SAndre Przywara  * be adjusted at runtime if needed).
345671f9ad8SAndre Przywara  * There is no compression for arm64 kernels (yet), so leave some space
346671f9ad8SAndre Przywara  * for really big kernels, say 256MB for now.
347671f9ad8SAndre Przywara  * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
348671f9ad8SAndre Przywara  * Align the initrd to a 2MB page.
349671f9ad8SAndre Przywara  */
350671f9ad8SAndre Przywara #define KERNEL_ADDR_R	__stringify(SDRAM_OFFSET(0080000))
351671f9ad8SAndre Przywara #define FDT_ADDR_R	__stringify(SDRAM_OFFSET(FA00000))
352671f9ad8SAndre Przywara #define SCRIPT_ADDR_R	__stringify(SDRAM_OFFSET(FC00000))
353671f9ad8SAndre Przywara #define PXEFILE_ADDR_R	__stringify(SDRAM_OFFSET(FD00000))
354671f9ad8SAndre Przywara #define RAMDISK_ADDR_R	__stringify(SDRAM_OFFSET(FE00000))
355671f9ad8SAndre Przywara 
356671f9ad8SAndre Przywara #else
3578c95c556SHans de Goede /*
3585c965ed9SHans de Goede  * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
3598c95c556SHans de Goede  * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
3608c95c556SHans de Goede  * 1M script, 1M pxe and the ramdisk at the end.
3618c95c556SHans de Goede  */
3622a909c5fSSiarhei Siamashka 
3632a909c5fSSiarhei Siamashka #define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(2000000))
3642a909c5fSSiarhei Siamashka #define FDT_ADDR_R     __stringify(SDRAM_OFFSET(3000000))
3652a909c5fSSiarhei Siamashka #define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(3100000))
3662a909c5fSSiarhei Siamashka #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
3672a909c5fSSiarhei Siamashka #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
368671f9ad8SAndre Przywara #endif
3692a909c5fSSiarhei Siamashka 
370846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \
3715c965ed9SHans de Goede 	"bootm_size=0xa000000\0" \
3722a909c5fSSiarhei Siamashka 	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
3732a909c5fSSiarhei Siamashka 	"fdt_addr_r=" FDT_ADDR_R "\0" \
3742a909c5fSSiarhei Siamashka 	"scriptaddr=" SCRIPT_ADDR_R "\0" \
3752a909c5fSSiarhei Siamashka 	"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
3762a909c5fSSiarhei Siamashka 	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
3772a909c5fSSiarhei Siamashka 
3782a909c5fSSiarhei Siamashka #define DFU_ALT_INFO_RAM \
3792a909c5fSSiarhei Siamashka 	"dfu_alt_info_ram=" \
3802a909c5fSSiarhei Siamashka 	"kernel ram " KERNEL_ADDR_R " 0x1000000;" \
3812a909c5fSSiarhei Siamashka 	"fdt ram " FDT_ADDR_R " 0x100000;" \
3822a909c5fSSiarhei Siamashka 	"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
383846e3254SHans de Goede 
38441f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC
38541f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
3865a37a400SKarsten Merker #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
3875a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
3885a37a400SKarsten Merker #else
3895a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
3905a37a400SKarsten Merker #endif
39141f8e9f5SChen-Yu Tsai #else
39241f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func)
3935a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
39441f8e9f5SChen-Yu Tsai #endif
39541f8e9f5SChen-Yu Tsai 
3962ec3a612SHans de Goede #ifdef CONFIG_AHCI
3972ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
3982ec3a612SHans de Goede #else
3992ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func)
4002ec3a612SHans de Goede #endif
4012ec3a612SHans de Goede 
4022582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_STORAGE
403859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
404859b3f14SChen-Yu Tsai #else
405859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func)
406859b3f14SChen-Yu Tsai #endif
407859b3f14SChen-Yu Tsai 
408f3b589c0SBernhard Nortmann /* FEL boot support, auto-execute boot.scr if a script address was provided */
409f3b589c0SBernhard Nortmann #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
410f3b589c0SBernhard Nortmann 	"bootcmd_fel=" \
411f3b589c0SBernhard Nortmann 		"if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
412f3b589c0SBernhard Nortmann 			"echo '(FEL boot)'; " \
413f3b589c0SBernhard Nortmann 			"source ${fel_scriptaddr}; " \
414f3b589c0SBernhard Nortmann 		"fi\0"
415f3b589c0SBernhard Nortmann #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
416f3b589c0SBernhard Nortmann 	"fel "
417f3b589c0SBernhard Nortmann 
4182ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \
419f3b589c0SBernhard Nortmann 	func(FEL, fel, na) \
42041f8e9f5SChen-Yu Tsai 	BOOT_TARGET_DEVICES_MMC(func) \
4215a37a400SKarsten Merker 	BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
4222ec3a612SHans de Goede 	BOOT_TARGET_DEVICES_SCSI(func) \
423859b3f14SChen-Yu Tsai 	BOOT_TARGET_DEVICES_USB(func) \
4242ec3a612SHans de Goede 	func(PXE, pxe, na) \
4252ec3a612SHans de Goede 	func(DHCP, dhcp, na)
4262ec3a612SHans de Goede 
4273b824025SHans de Goede #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
4283b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT \
4293b824025SHans de Goede 	"bootcmd_sunxi_compat=" \
4303b824025SHans de Goede 		"setenv root /dev/mmcblk0p3 rootwait; " \
4313b824025SHans de Goede 		"if ext2load mmc 0 0x44000000 uEnv.txt; then " \
4323b824025SHans de Goede 			"echo Loaded environment from uEnv.txt; " \
4333b824025SHans de Goede 			"env import -t 0x44000000 ${filesize}; " \
4343b824025SHans de Goede 		"fi; " \
4353b824025SHans de Goede 		"setenv bootargs console=${console} root=${root} ${extraargs}; " \
4363b824025SHans de Goede 		"ext2load mmc 0 0x43000000 script.bin && " \
4373b824025SHans de Goede 		"ext2load mmc 0 0x48000000 uImage && " \
4383b824025SHans de Goede 		"bootm 0x48000000\0"
4393b824025SHans de Goede #else
4403b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT
4413b824025SHans de Goede #endif
4423b824025SHans de Goede 
4432ec3a612SHans de Goede #include <config_distro_bootcmd.h>
4442ec3a612SHans de Goede 
44586b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD
44686b49093SHans de Goede #define CONSOLE_STDIN_SETTINGS \
44786b49093SHans de Goede 	"preboot=usb start\0" \
44886b49093SHans de Goede 	"stdin=serial,usbkbd\0"
44986b49093SHans de Goede #else
4507f2c521fSLuc Verhaegen #define CONSOLE_STDIN_SETTINGS \
4517f2c521fSLuc Verhaegen 	"stdin=serial\0"
45286b49093SHans de Goede #endif
4537f2c521fSLuc Verhaegen 
4547f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO
4557f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \
4567f2c521fSLuc Verhaegen 	"stdout=serial,vga\0" \
4577f2c521fSLuc Verhaegen 	"stderr=serial,vga\0"
4587f2c521fSLuc Verhaegen #else
4597f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \
4607f2c521fSLuc Verhaegen 	"stdout=serial\0" \
4617f2c521fSLuc Verhaegen 	"stderr=serial\0"
4627f2c521fSLuc Verhaegen #endif
4637f2c521fSLuc Verhaegen 
464*c8564b24SMaxime Ripard #ifdef CONFIG_MTDIDS_DEFAULT
465*c8564b24SMaxime Ripard #define SUNXI_MTDIDS_DEFAULT \
466*c8564b24SMaxime Ripard 	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
467*c8564b24SMaxime Ripard #else
468*c8564b24SMaxime Ripard #define SUNXI_MTDIDS_DEFAULT
469*c8564b24SMaxime Ripard #endif
470*c8564b24SMaxime Ripard 
471*c8564b24SMaxime Ripard #ifdef CONFIG_MTDPARTS_DEFAULT
472*c8564b24SMaxime Ripard #define SUNXI_MTDPARTS_DEFAULT \
473*c8564b24SMaxime Ripard 	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
474*c8564b24SMaxime Ripard #else
475*c8564b24SMaxime Ripard #define SUNXI_MTDPARTS_DEFAULT
476*c8564b24SMaxime Ripard #endif
477*c8564b24SMaxime Ripard 
4787f2c521fSLuc Verhaegen #define CONSOLE_ENV_SETTINGS \
4797f2c521fSLuc Verhaegen 	CONSOLE_STDIN_SETTINGS \
4807f2c521fSLuc Verhaegen 	CONSOLE_STDOUT_SETTINGS
4817f2c521fSLuc Verhaegen 
4822ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \
4837f2c521fSLuc Verhaegen 	CONSOLE_ENV_SETTINGS \
484846e3254SHans de Goede 	MEM_LAYOUT_ENV_SETTINGS \
4852a909c5fSSiarhei Siamashka 	DFU_ALT_INFO_RAM \
48625acd33fSHans de Goede 	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
487846e3254SHans de Goede 	"console=ttyS0,115200\0" \
488*c8564b24SMaxime Ripard 	SUNXI_MTDIDS_DEFAULT \
489*c8564b24SMaxime Ripard 	SUNXI_MTDPARTS_DEFAULT \
4903b824025SHans de Goede 	BOOTCMD_SUNXI_COMPAT \
4912ec3a612SHans de Goede 	BOOTENV
4922ec3a612SHans de Goede 
4932ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */
4942ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS
495cba69eeeSIan Campbell #endif
496cba69eeeSIan Campbell 
497cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */
498