1cba69eeeSIan Campbell /* 2cba69eeeSIan Campbell * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3cba69eeeSIan Campbell * 4cba69eeeSIan Campbell * (C) Copyright 2007-2011 5cba69eeeSIan Campbell * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6cba69eeeSIan Campbell * Tom Cubie <tangliang@allwinnertech.com> 7cba69eeeSIan Campbell * 8cba69eeeSIan Campbell * Configuration settings for the Allwinner sunxi series of boards. 9cba69eeeSIan Campbell * 10cba69eeeSIan Campbell * SPDX-License-Identifier: GPL-2.0+ 11cba69eeeSIan Campbell */ 12cba69eeeSIan Campbell 13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H 14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H 15cba69eeeSIan Campbell 16daf6d399SHans de Goede #include <asm/arch/cpu.h> 17e049fe28SHans de Goede #include <linux/stringify.h> 18e049fe28SHans de Goede 1977ef1369SSiarhei Siamashka #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 2077ef1369SSiarhei Siamashka /* 2177ef1369SSiarhei Siamashka * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the 2277ef1369SSiarhei Siamashka * expense of restricting some features, so the regular machine id values can 2377ef1369SSiarhei Siamashka * be used. 2477ef1369SSiarhei Siamashka */ 2577ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 0 2677ef1369SSiarhei Siamashka #else 2777ef1369SSiarhei Siamashka /* 2877ef1369SSiarhei Siamashka * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. 2977ef1369SSiarhei Siamashka * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass 3077ef1369SSiarhei Siamashka * beyond the machine id check. 3177ef1369SSiarhei Siamashka */ 3277ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 1 3377ef1369SSiarhei Siamashka #endif 3477ef1369SSiarhei Siamashka 35cba69eeeSIan Campbell /* 36cba69eeeSIan Campbell * High Level Configuration Options 37cba69eeeSIan Campbell */ 38cba69eeeSIan Campbell #define CONFIG_SUNXI /* sunxi family */ 3950827a59SIan Campbell #ifdef CONFIG_SPL_BUILD 4050827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 4150827a59SIan Campbell #endif 42cba69eeeSIan Campbell 43cba69eeeSIan Campbell /* Serial & console */ 44cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL 45cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */ 46cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK 24000000 474fb60552SThomas Chou #ifndef CONFIG_DM_SERIAL 481a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE -4 49cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 50cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 51cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 52cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 53c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 541a81cf83SSimon Glass #endif 55cba69eeeSIan Campbell 568a65f69cSPaul Kocialkowski /* CPU */ 57daf6d399SHans de Goede #define CONFIG_DISPLAY_CPUINFO 588a65f69cSPaul Kocialkowski #define CONFIG_SYS_CACHELINE_SIZE 64 59d96ebc46SSiarhei Siamashka #define CONFIG_TIMER_CLK_FREQ 24000000 608a65f69cSPaul Kocialkowski 61e049fe28SHans de Goede /* 62e049fe28SHans de Goede * The DRAM Base differs between some models. We cannot use macros for the 63e049fe28SHans de Goede * CONFIG_FOO defines which contain the DRAM base address since they end 64e049fe28SHans de Goede * up unexpanded in include/autoconf.mk . 65e049fe28SHans de Goede * 66e049fe28SHans de Goede * So we have to have this #ifdef #else #endif block for these. 67e049fe28SHans de Goede */ 68e049fe28SHans de Goede #ifdef CONFIG_MACH_SUN9I 69e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x2##x 70e049fe28SHans de Goede #define CONFIG_SYS_SDRAM_BASE 0x20000000 71e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ 72e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE 0x2a000000 73e049fe28SHans de Goede #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 74ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 75ff42d107SHans de Goede * since it needs to fit in with the other values. By also #defining it 76ff42d107SHans de Goede * we get warnings if the Kconfig value mismatches. */ 77ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000 78e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 79e049fe28SHans de Goede #else 80e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x4##x 81cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE 0x40000000 82e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 83e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE 0x4a000000 84e049fe28SHans de Goede #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 85ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 86ff42d107SHans de Goede * since it needs to fit in with the other values. By also #defining it 87ff42d107SHans de Goede * we get warnings if the Kconfig value mismatches. */ 88ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000 89e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 90e049fe28SHans de Goede #endif 91e049fe28SHans de Goede 92e049fe28SHans de Goede #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ 93e049fe28SHans de Goede 94d96ebc46SSiarhei Siamashka #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) 9577fe9887SHans de Goede /* 9677fe9887SHans de Goede * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is 9777fe9887SHans de Goede * slightly bigger. Note that it is possible to map the first 32 KiB of the 9877fe9887SHans de Goede * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the 9977fe9887SHans de Goede * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and 10077fe9887SHans de Goede * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. 10177fe9887SHans de Goede */ 10277fe9887SHans de Goede #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 103d96ebc46SSiarhei Siamashka #define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */ 10477fe9887SHans de Goede #else 105cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR 0x0 106cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 10777fe9887SHans de Goede #endif 108cba69eeeSIan Campbell 109cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \ 110cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 111cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \ 112cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 113cba69eeeSIan Campbell 114cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS 1 115cba69eeeSIan Campbell #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 116cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 117cba69eeeSIan Campbell 118a6e50a88SIan Campbell #ifdef CONFIG_AHCI 119a6e50a88SIan Campbell #define CONFIG_LIBATA 120a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI 121a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT 122a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI 1230751b138SBernhard Nortmann #define CONFIG_SYS_64BIT_LBA 124a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 125a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN 1 126a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 127a6e50a88SIan Campbell CONFIG_SYS_SCSI_MAX_LUN) 128*c649e3c9SSimon Glass #define CONFIG_SCSI 129a6e50a88SIan Campbell #endif 130a6e50a88SIan Campbell 131cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS 132cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG 133cba69eeeSIan Campbell #define CONFIG_INITRD_TAG 1349f852211SPaul Kocialkowski #define CONFIG_SERIAL_TAG 135cba69eeeSIan Campbell 136e5268616SHans de Goede #ifdef CONFIG_NAND_SUNXI 13721d4d37aSHans de Goede #define CONFIG_SPL_NAND_SUPPORT 1 138960caebaSPiotr Zierhoffer #endif 139960caebaSPiotr Zierhoffer 140e24ea55cSIan Campbell /* mmc config */ 14144c79879SMaxime Ripard #ifdef CONFIG_MMC 142e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC 143e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI 144e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT 0 145e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC 146e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 147ff2b47f6SChen-Yu Tsai #endif 148e24ea55cSIan Campbell 1495c965ed9SHans de Goede /* 64MB of malloc() pool */ 1505c965ed9SHans de Goede #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20)) 151cba69eeeSIan Campbell 152cba69eeeSIan Campbell /* 153cba69eeeSIan Campbell * Miscellaneous configurable options 154cba69eeeSIan Campbell */ 15506beadb0SIan Campbell #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 15606beadb0SIan Campbell #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 157cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 158cba69eeeSIan Campbell 159cba69eeeSIan Campbell /* Boot Argument Buffer Size */ 160cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 161cba69eeeSIan Campbell 162cba69eeeSIan Campbell /* standalone support */ 163e049fe28SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR 164cba69eeeSIan Campbell 165cba69eeeSIan Campbell /* baudrate */ 166cba69eeeSIan Campbell #define CONFIG_BAUDRATE 115200 167cba69eeeSIan Campbell 168cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */ 169cba69eeeSIan Campbell #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 170cba69eeeSIan Campbell 171cba69eeeSIan Campbell /* FLASH and environment organization */ 172cba69eeeSIan Campbell 173cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH 174cba69eeeSIan Campbell 175fa5e1020SBoris Brezillon #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ 176cba69eeeSIan Campbell #define CONFIG_IDENT_STRING " Allwinner Technology" 1772af25b74SSimon Glass #define CONFIG_DISPLAY_BOARDINFO 178cba69eeeSIan Campbell 179e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 180cba69eeeSIan Campbell #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 181cba69eeeSIan Campbell 182cba69eeeSIan Campbell #define CONFIG_FAT_WRITE /* enable write access */ 183cba69eeeSIan Campbell 184cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK 185cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT 186cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT 187cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT 188cba69eeeSIan Campbell 189942cb0b6SSimon Glass #define CONFIG_SPL_BOARD_LOAD_IMAGE 190942cb0b6SSimon Glass 191d96ebc46SSiarhei Siamashka #if defined(CONFIG_MACH_SUN9I) 192d96ebc46SSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE 0x10020 /* sram start+header */ 193d96ebc46SSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* ? KiB on sun9i */ 194d96ebc46SSiarhei Siamashka #elif defined(CONFIG_MACH_SUN50I) 195d96ebc46SSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE 0x10020 /* sram start+header */ 196d96ebc46SSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE 0x7fe0 /* 32 KiB on sun50i */ 197d96ebc46SSiarhei Siamashka #else 19850827a59SIan Campbell #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 19950827a59SIan Campbell #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 200d96ebc46SSiarhei Siamashka #endif 20150827a59SIan Campbell 20250827a59SIan Campbell #define CONFIG_SPL_LIBDISK_SUPPORT 203f0ce28e9SSiarhei Siamashka 20444c79879SMaxime Ripard #ifdef CONFIG_MMC 20550827a59SIan Campbell #define CONFIG_SPL_MMC_SUPPORT 206f0ce28e9SSiarhei Siamashka #endif 20750827a59SIan Campbell 208d96ebc46SSiarhei Siamashka #ifndef CONFIG_ARM64 20950827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 210d96ebc46SSiarhei Siamashka #endif 21150827a59SIan Campbell 21250827a59SIan Campbell #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 21350827a59SIan Campbell #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 21450827a59SIan Campbell 215d96ebc46SSiarhei Siamashka #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) 216d96ebc46SSiarhei Siamashka /* FIXME: 40 KiB instead of 32 KiB ? */ 217d96ebc46SSiarhei Siamashka #define LOW_LEVEL_SRAM_STACK 0x00018000 218d96ebc46SSiarhei Siamashka #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 219d96ebc46SSiarhei Siamashka #else 220cba69eeeSIan Campbell /* end of 32 KiB in sram */ 221cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 222cba69eeeSIan Campbell #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 223d96ebc46SSiarhei Siamashka #endif 224cba69eeeSIan Campbell 2256620377eSHans de Goede /* I2C */ 2260d8382aeSJelle van der Waa #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ 2270d8382aeSJelle van der Waa defined CONFIG_SY8106A_POWER 2286620377eSHans de Goede #define CONFIG_SPL_I2C_SUPPORT 229ad40610bSHans de Goede #endif 230ad40610bSHans de Goede 2316c739c5dSPaul Kocialkowski #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ 2326c739c5dSPaul Kocialkowski defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ 2339d082687SJelle van der Waa defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE 2348b2db32aSHans de Goede #define CONFIG_SYS_I2C 2356620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI 2366620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED 400000 2376620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE 0x7f 2388b2db32aSHans de Goede #endif 23955410089SHans de Goede 24055410089SHans de Goede #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) 24155410089SHans de Goede #define CONFIG_SYS_I2C_SOFT 24255410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SPEED 50000 24355410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 24455410089SHans de Goede /* We use pin names in Kconfig and sunxi_name_to_gpio() */ 24555410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda 24655410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl 24755410089SHans de Goede #ifndef __ASSEMBLY__ 24855410089SHans de Goede extern int soft_i2c_gpio_sda; 24955410089SHans de Goede extern int soft_i2c_gpio_scl; 25055410089SHans de Goede #endif 2511fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ 2521fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ 2531fc42018SHans de Goede #else 2541fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ 2551fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ 25655410089SHans de Goede #endif 25755410089SHans de Goede 25814bc66bdSHenrik Nordstrom /* PMU */ 25995ab8feeSvishnupatekar #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ 2600d8382aeSJelle van der Waa defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \ 2610d8382aeSJelle van der Waa defined CONFIG_SY8106A_POWER 26214bc66bdSHenrik Nordstrom #define CONFIG_SPL_POWER_SUPPORT 26314bc66bdSHenrik Nordstrom #endif 26414bc66bdSHenrik Nordstrom 265f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX 266cba69eeeSIan Campbell #define CONFIG_CONS_INDEX 1 /* UART0 */ 267f84269c5SHans de Goede #endif 268cba69eeeSIan Campbell 269a5da3c83SHans de Goede #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE 270f3133962SHans de Goede #if CONFIG_CONS_INDEX == 1 271f3133962SHans de Goede #ifdef CONFIG_MACH_SUN9I 272f3133962SHans de Goede #define OF_STDOUT_PATH "/soc/serial@07000000:115200" 273f3133962SHans de Goede #else 274f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" 275f3133962SHans de Goede #endif 276f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) 277f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" 2785cd83b11SLaurent Itti #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) 2795cd83b11SLaurent Itti #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" 280f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) 281f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" 282f3133962SHans de Goede #else 283f3133962SHans de Goede #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. 284f3133962SHans de Goede #endif 285a5da3c83SHans de Goede #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */ 286f3133962SHans de Goede 287abce2c62SIan Campbell /* GPIO */ 288abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO 289cd82113aSHans de Goede #define CONFIG_SPL_GPIO_SUPPORT 290abce2c62SIan Campbell 2917f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 2927f2c521fSLuc Verhaegen /* 2935633a296SHans de Goede * The amount of RAM to keep free at the top of RAM when relocating u-boot, 2945633a296SHans de Goede * to use as framebuffer. This must be a multiple of 4096. 2957f2c521fSLuc Verhaegen */ 2965c965ed9SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20) 2977f2c521fSLuc Verhaegen 2982d7a084bSLuc Verhaegen /* Do we want to initialize a simple FB? */ 2992d7a084bSLuc Verhaegen #define CONFIG_VIDEO_DT_SIMPLEFB 3002d7a084bSLuc Verhaegen 3017f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SUNXI 3027f2c521fSLuc Verhaegen 3037f2c521fSLuc Verhaegen #define CONFIG_CFB_CONSOLE 3047f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SW_CURSOR 3057f2c521fSLuc Verhaegen #define CONFIG_VIDEO_LOGO 306be8ec633SHans de Goede #define CONFIG_VIDEO_STD_TIMINGS 30775481607SHans de Goede #define CONFIG_I2C_EDID 30858332f89SHans de Goede #define VIDEO_LINE_LEN (pGD->plnSizeX) 3097f2c521fSLuc Verhaegen 3107f2c521fSLuc Verhaegen /* allow both serial and cfb console. */ 3117f2c521fSLuc Verhaegen #define CONFIG_CONSOLE_MUX 3127f2c521fSLuc Verhaegen /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ 3137f2c521fSLuc Verhaegen #define CONFIG_VGA_AS_SINGLE_DEVICE 3147f2c521fSLuc Verhaegen 3157f2c521fSLuc Verhaegen #endif /* CONFIG_VIDEO */ 3167f2c521fSLuc Verhaegen 317c26fb9dbSHans de Goede /* Ethernet support */ 318c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC 3198145dea4SHans de Goede #define CONFIG_PHY_ADDR 1 320c26fb9dbSHans de Goede #define CONFIG_MII /* MII PHY management */ 3218145dea4SHans de Goede #define CONFIG_PHYLIB 322c26fb9dbSHans de Goede #endif 323c26fb9dbSHans de Goede 3245835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC 3255835823dSIan Campbell #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 3265835823dSIan Campbell #define CONFIG_PHY_ADDR 1 3275835823dSIan Campbell #define CONFIG_MII /* MII PHY management */ 3281eae8f66SHans de Goede #define CONFIG_PHY_REALTEK 3295835823dSIan Campbell #endif 3305835823dSIan Campbell 3312582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_EHCI_HCD 3326a72e804SHans de Goede #define CONFIG_USB_OHCI_NEW 3336a72e804SHans de Goede #define CONFIG_USB_OHCI_SUNXI 3346a72e804SHans de Goede #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 3353584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 3361a800f7aSHans de Goede #endif 3371a800f7aSHans de Goede 3381a800f7aSHans de Goede #ifdef CONFIG_USB_MUSB_SUNXI 33995de1e2fSPaul Kocialkowski #define CONFIG_USB_MUSB_PIO_ONLY 3401a800f7aSHans de Goede #endif 3411a800f7aSHans de Goede 342b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_MUSB_GADGET 343aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_DFU 344aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_FASTBOOT 345aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_MASS_STORAGE 346b21144ebSPaul Kocialkowski #endif 347b21144ebSPaul Kocialkowski 3482a909c5fSSiarhei Siamashka #ifdef CONFIG_USB_FUNCTION_DFU 3492a909c5fSSiarhei Siamashka #define CONFIG_DFU_RAM 3502a909c5fSSiarhei Siamashka #endif 3512a909c5fSSiarhei Siamashka 352b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_FASTBOOT 353b21144ebSPaul Kocialkowski #define CONFIG_CMD_FASTBOOT 354b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 355b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000 356bac83fb0SMaxime Ripard #define CONFIG_ANDROID_BOOT_IMAGE 357b21144ebSPaul Kocialkowski 358b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH 35944c79879SMaxime Ripard 36044c79879SMaxime Ripard #ifdef CONFIG_MMC 361b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 362b21144ebSPaul Kocialkowski #define CONFIG_EFI_PARTITION 363b21144ebSPaul Kocialkowski #endif 36444c79879SMaxime Ripard #endif 365b21144ebSPaul Kocialkowski 366b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE 367b21144ebSPaul Kocialkowski #endif 368b21144ebSPaul Kocialkowski 36986b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 37086b49093SHans de Goede #define CONFIG_CONSOLE_MUX 37186b49093SHans de Goede #define CONFIG_PREBOOT 37286b49093SHans de Goede #define CONFIG_SYS_STDIO_DEREGISTER 373eab9433aSHans de Goede #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 37486b49093SHans de Goede #endif 37586b49093SHans de Goede 376cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \ 377cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_NAND && \ 378cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_FAT && \ 379cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_SPI_FLASH 380cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE 381cba69eeeSIan Campbell #endif 382cba69eeeSIan Campbell 383b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R 3847f2c521fSLuc Verhaegen #define CONFIG_SYS_CONSOLE_IS_IN_ENV 385b41d7d05SJonathan Liu 386cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD 387cba69eeeSIan Campbell #include <config_distro_defaults.h> 3882ec3a612SHans de Goede 389a7925078SSiarhei Siamashka /* Enable pre-console buffer to get complete log on the VGA console */ 390a7925078SSiarhei Siamashka #define CONFIG_PRE_CONSOLE_BUFFER 391a8552c7cSHans de Goede #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ 392a7925078SSiarhei Siamashka 3938c95c556SHans de Goede /* 3945c965ed9SHans de Goede * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. 3958c95c556SHans de Goede * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 3968c95c556SHans de Goede * 1M script, 1M pxe and the ramdisk at the end. 3978c95c556SHans de Goede */ 3982a909c5fSSiarhei Siamashka 3992a909c5fSSiarhei Siamashka #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) 4002a909c5fSSiarhei Siamashka #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) 4012a909c5fSSiarhei Siamashka #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) 4022a909c5fSSiarhei Siamashka #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) 4032a909c5fSSiarhei Siamashka #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000)) 4042a909c5fSSiarhei Siamashka 405846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \ 4065c965ed9SHans de Goede "bootm_size=0xa000000\0" \ 4072a909c5fSSiarhei Siamashka "kernel_addr_r=" KERNEL_ADDR_R "\0" \ 4082a909c5fSSiarhei Siamashka "fdt_addr_r=" FDT_ADDR_R "\0" \ 4092a909c5fSSiarhei Siamashka "scriptaddr=" SCRIPT_ADDR_R "\0" \ 4102a909c5fSSiarhei Siamashka "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ 4112a909c5fSSiarhei Siamashka "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" 4122a909c5fSSiarhei Siamashka 4132a909c5fSSiarhei Siamashka #define DFU_ALT_INFO_RAM \ 4142a909c5fSSiarhei Siamashka "dfu_alt_info_ram=" \ 4152a909c5fSSiarhei Siamashka "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ 4162a909c5fSSiarhei Siamashka "fdt ram " FDT_ADDR_R " 0x100000;" \ 4172a909c5fSSiarhei Siamashka "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0" 418846e3254SHans de Goede 41941f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC 42041f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 4215a37a400SKarsten Merker #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 4225a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1) 4235a37a400SKarsten Merker #else 4245a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) 4255a37a400SKarsten Merker #endif 42641f8e9f5SChen-Yu Tsai #else 42741f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) 4285a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) 42941f8e9f5SChen-Yu Tsai #endif 43041f8e9f5SChen-Yu Tsai 4312ec3a612SHans de Goede #ifdef CONFIG_AHCI 4322ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 4332ec3a612SHans de Goede #else 4342ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) 4352ec3a612SHans de Goede #endif 4362ec3a612SHans de Goede 4372582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_STORAGE 438859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 439859b3f14SChen-Yu Tsai #else 440859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) 441859b3f14SChen-Yu Tsai #endif 442859b3f14SChen-Yu Tsai 443f3b589c0SBernhard Nortmann /* FEL boot support, auto-execute boot.scr if a script address was provided */ 444f3b589c0SBernhard Nortmann #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \ 445f3b589c0SBernhard Nortmann "bootcmd_fel=" \ 446f3b589c0SBernhard Nortmann "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \ 447f3b589c0SBernhard Nortmann "echo '(FEL boot)'; " \ 448f3b589c0SBernhard Nortmann "source ${fel_scriptaddr}; " \ 449f3b589c0SBernhard Nortmann "fi\0" 450f3b589c0SBernhard Nortmann #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \ 451f3b589c0SBernhard Nortmann "fel " 452f3b589c0SBernhard Nortmann 4532ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \ 454f3b589c0SBernhard Nortmann func(FEL, fel, na) \ 45541f8e9f5SChen-Yu Tsai BOOT_TARGET_DEVICES_MMC(func) \ 4565a37a400SKarsten Merker BOOT_TARGET_DEVICES_MMC_EXTRA(func) \ 4572ec3a612SHans de Goede BOOT_TARGET_DEVICES_SCSI(func) \ 458859b3f14SChen-Yu Tsai BOOT_TARGET_DEVICES_USB(func) \ 4592ec3a612SHans de Goede func(PXE, pxe, na) \ 4602ec3a612SHans de Goede func(DHCP, dhcp, na) 4612ec3a612SHans de Goede 4623b824025SHans de Goede #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 4633b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT \ 4643b824025SHans de Goede "bootcmd_sunxi_compat=" \ 4653b824025SHans de Goede "setenv root /dev/mmcblk0p3 rootwait; " \ 4663b824025SHans de Goede "if ext2load mmc 0 0x44000000 uEnv.txt; then " \ 4673b824025SHans de Goede "echo Loaded environment from uEnv.txt; " \ 4683b824025SHans de Goede "env import -t 0x44000000 ${filesize}; " \ 4693b824025SHans de Goede "fi; " \ 4703b824025SHans de Goede "setenv bootargs console=${console} root=${root} ${extraargs}; " \ 4713b824025SHans de Goede "ext2load mmc 0 0x43000000 script.bin && " \ 4723b824025SHans de Goede "ext2load mmc 0 0x48000000 uImage && " \ 4733b824025SHans de Goede "bootm 0x48000000\0" 4743b824025SHans de Goede #else 4753b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT 4763b824025SHans de Goede #endif 4773b824025SHans de Goede 4782ec3a612SHans de Goede #include <config_distro_bootcmd.h> 4792ec3a612SHans de Goede 48086b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 48186b49093SHans de Goede #define CONSOLE_STDIN_SETTINGS \ 48286b49093SHans de Goede "preboot=usb start\0" \ 48386b49093SHans de Goede "stdin=serial,usbkbd\0" 48486b49093SHans de Goede #else 4857f2c521fSLuc Verhaegen #define CONSOLE_STDIN_SETTINGS \ 4867f2c521fSLuc Verhaegen "stdin=serial\0" 48786b49093SHans de Goede #endif 4887f2c521fSLuc Verhaegen 4897f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 4907f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 4917f2c521fSLuc Verhaegen "stdout=serial,vga\0" \ 4927f2c521fSLuc Verhaegen "stderr=serial,vga\0" 4937f2c521fSLuc Verhaegen #else 4947f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 4957f2c521fSLuc Verhaegen "stdout=serial\0" \ 4967f2c521fSLuc Verhaegen "stderr=serial\0" 4977f2c521fSLuc Verhaegen #endif 4987f2c521fSLuc Verhaegen 4997f2c521fSLuc Verhaegen #define CONSOLE_ENV_SETTINGS \ 5007f2c521fSLuc Verhaegen CONSOLE_STDIN_SETTINGS \ 5017f2c521fSLuc Verhaegen CONSOLE_STDOUT_SETTINGS 5027f2c521fSLuc Verhaegen 5032ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \ 5047f2c521fSLuc Verhaegen CONSOLE_ENV_SETTINGS \ 505846e3254SHans de Goede MEM_LAYOUT_ENV_SETTINGS \ 5062a909c5fSSiarhei Siamashka DFU_ALT_INFO_RAM \ 50725acd33fSHans de Goede "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ 508846e3254SHans de Goede "console=ttyS0,115200\0" \ 5093b824025SHans de Goede BOOTCMD_SUNXI_COMPAT \ 5102ec3a612SHans de Goede BOOTENV 5112ec3a612SHans de Goede 5122ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */ 5132ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS 514cba69eeeSIan Campbell #endif 515cba69eeeSIan Campbell 516cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */ 517