1cba69eeeSIan Campbell /* 2cba69eeeSIan Campbell * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3cba69eeeSIan Campbell * 4cba69eeeSIan Campbell * (C) Copyright 2007-2011 5cba69eeeSIan Campbell * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6cba69eeeSIan Campbell * Tom Cubie <tangliang@allwinnertech.com> 7cba69eeeSIan Campbell * 8cba69eeeSIan Campbell * Configuration settings for the Allwinner sunxi series of boards. 9cba69eeeSIan Campbell * 10cba69eeeSIan Campbell * SPDX-License-Identifier: GPL-2.0+ 11cba69eeeSIan Campbell */ 12cba69eeeSIan Campbell 13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H 14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H 15cba69eeeSIan Campbell 16cba69eeeSIan Campbell /* 17cba69eeeSIan Campbell * High Level Configuration Options 18cba69eeeSIan Campbell */ 19cba69eeeSIan Campbell #define CONFIG_SUNXI /* sunxi family */ 2050827a59SIan Campbell #ifdef CONFIG_SPL_BUILD 2150827a59SIan Campbell #ifndef CONFIG_SPL_FEL 2250827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 2350827a59SIan Campbell #endif 2450827a59SIan Campbell #endif 25cba69eeeSIan Campbell 26cba69eeeSIan Campbell #include <asm/arch/cpu.h> /* get chip and board defs */ 27cba69eeeSIan Campbell 28cba69eeeSIan Campbell #define CONFIG_SYS_TEXT_BASE 0x4a000000 29cba69eeeSIan Campbell 30cba69eeeSIan Campbell /* 31cba69eeeSIan Campbell * Display CPU information 32cba69eeeSIan Campbell */ 33cba69eeeSIan Campbell #define CONFIG_DISPLAY_CPUINFO 34cba69eeeSIan Campbell 35cba69eeeSIan Campbell /* Serial & console */ 36cba69eeeSIan Campbell #define CONFIG_SYS_NS16550 37cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL 38cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */ 39cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_REG_SIZE -4 40cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK 24000000 41cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 42cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 43cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 44cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 45cba69eeeSIan Campbell 46cba69eeeSIan Campbell /* DRAM Base */ 47cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE 0x40000000 48cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR 0x0 49cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 50cba69eeeSIan Campbell 51cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \ 52cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 53cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \ 54cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 55cba69eeeSIan Campbell 56cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS 1 57cba69eeeSIan Campbell #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 58cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 59cba69eeeSIan Campbell 60cba69eeeSIan Campbell #define CONFIG_CMD_MEMORY 61cba69eeeSIan Campbell #define CONFIG_CMD_SETEXPR 62cba69eeeSIan Campbell 63cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS 64cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG 65cba69eeeSIan Campbell #define CONFIG_INITRD_TAG 66cba69eeeSIan Campbell 67e24ea55cSIan Campbell /* mmc config */ 68e24ea55cSIan Campbell #define CONFIG_MMC 69e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC 70e24ea55cSIan Campbell #define CONFIG_CMD_MMC 71e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI 72e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT 0 73e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC 74e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 75e24ea55cSIan Campbell 76cba69eeeSIan Campbell /* 4MB of malloc() pool */ 77cba69eeeSIan Campbell #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 78cba69eeeSIan Campbell 79cba69eeeSIan Campbell /* 80cba69eeeSIan Campbell * Miscellaneous configurable options 81cba69eeeSIan Campbell */ 82cba69eeeSIan Campbell #define CONFIG_CMD_ECHO 83cba69eeeSIan Campbell #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 84cba69eeeSIan Campbell #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 85cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 86cba69eeeSIan Campbell #define CONFIG_SYS_GENERIC_BOARD 87cba69eeeSIan Campbell 88cba69eeeSIan Campbell /* Boot Argument Buffer Size */ 89cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 90cba69eeeSIan Campbell 91cba69eeeSIan Campbell #define CONFIG_SYS_LOAD_ADDR 0x48000000 /* default load address */ 92cba69eeeSIan Campbell 93cba69eeeSIan Campbell /* standalone support */ 94cba69eeeSIan Campbell #define CONFIG_STANDALONE_LOAD_ADDR 0x48000000 95cba69eeeSIan Campbell 96cba69eeeSIan Campbell #define CONFIG_SYS_HZ 1000 97cba69eeeSIan Campbell 98cba69eeeSIan Campbell /* baudrate */ 99cba69eeeSIan Campbell #define CONFIG_BAUDRATE 115200 100cba69eeeSIan Campbell 101cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */ 102cba69eeeSIan Campbell #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 103cba69eeeSIan Campbell 104cba69eeeSIan Campbell /* FLASH and environment organization */ 105cba69eeeSIan Campbell 106cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH 107cba69eeeSIan Campbell 108cba69eeeSIan Campbell #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */ 109cba69eeeSIan Campbell #define CONFIG_IDENT_STRING " Allwinner Technology" 110cba69eeeSIan Campbell 111e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 112cba69eeeSIan Campbell #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 113cba69eeeSIan Campbell 114cba69eeeSIan Campbell #define CONFIG_EXTRA_ENV_SETTINGS \ 115cba69eeeSIan Campbell "bootm_size=0x10000000\0" 116cba69eeeSIan Campbell 117cba69eeeSIan Campbell #define CONFIG_SYS_BOOT_GET_CMDLINE 118cba69eeeSIan Campbell 119cba69eeeSIan Campbell #include <config_cmd_default.h> 120cba69eeeSIan Campbell 121cba69eeeSIan Campbell #define CONFIG_FAT_WRITE /* enable write access */ 122cba69eeeSIan Campbell 123cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK 124cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT 125cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT 126cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT 127cba69eeeSIan Campbell 12850827a59SIan Campbell #ifdef CONFIG_SPL_FEL 12950827a59SIan Campbell 130cba69eeeSIan Campbell #define CONFIG_SPL 131cba69eeeSIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds" 132cba69eeeSIan Campbell #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi" 133cba69eeeSIan Campbell #define CONFIG_SPL_TEXT_BASE 0x2000 134cba69eeeSIan Campbell #define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */ 13550827a59SIan Campbell 13650827a59SIan Campbell #else /* CONFIG_SPL */ 13750827a59SIan Campbell 13850827a59SIan Campbell #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 13950827a59SIan Campbell #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */ 14050827a59SIan Campbell 14150827a59SIan Campbell #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 14250827a59SIan Campbell #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 14350827a59SIan Campbell 14450827a59SIan Campbell #define CONFIG_SPL_LIBDISK_SUPPORT 14550827a59SIan Campbell #define CONFIG_SPL_MMC_SUPPORT 14650827a59SIan Campbell 14750827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 14850827a59SIan Campbell 14950827a59SIan Campbell #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 15050827a59SIan Campbell #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 15150827a59SIan Campbell 15250827a59SIan Campbell #endif /* CONFIG_SPL */ 15350827a59SIan Campbell 154cba69eeeSIan Campbell /* end of 32 KiB in sram */ 155cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 156cba69eeeSIan Campbell #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 157cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 158cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 159cba69eeeSIan Campbell 160cba69eeeSIan Campbell #undef CONFIG_CMD_FPGA 161cba69eeeSIan Campbell #undef CONFIG_CMD_NET 162cba69eeeSIan Campbell #undef CONFIG_CMD_NFS 163cba69eeeSIan Campbell 164f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX 165cba69eeeSIan Campbell #define CONFIG_CONS_INDEX 1 /* UART0 */ 166f84269c5SHans de Goede #endif 167cba69eeeSIan Campbell 168*c26fb9dbSHans de Goede /* Ethernet support */ 169*c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC 170*c26fb9dbSHans de Goede #define CONFIG_MII /* MII PHY management */ 171*c26fb9dbSHans de Goede #endif 172*c26fb9dbSHans de Goede 1735835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC 1745835823dSIan Campbell #define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */ 1755835823dSIan Campbell #define CONFIG_DW_AUTONEG 1765835823dSIan Campbell #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 1775835823dSIan Campbell #define CONFIG_PHY_ADDR 1 1785835823dSIan Campbell #define CONFIG_MII /* MII PHY management */ 1795835823dSIan Campbell #define CONFIG_PHYLIB 1805835823dSIan Campbell #endif 1815835823dSIan Campbell 1825835823dSIan Campbell #ifdef CONFIG_CMD_NET 1835835823dSIan Campbell #define CONFIG_CMD_NFS 1845835823dSIan Campbell #define CONFIG_CMD_DNS 1855835823dSIan Campbell #define CONFIG_NETCONSOLE 1865835823dSIan Campbell #define CONFIG_BOOTP_DNS2 1875835823dSIan Campbell #define CONFIG_BOOTP_SEND_HOSTNAME 1885835823dSIan Campbell #endif 1895835823dSIan Campbell 190cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \ 191cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_NAND && \ 192cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_FAT && \ 193cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_SPI_FLASH 194cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE 195cba69eeeSIan Campbell #endif 196cba69eeeSIan Campbell 197cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD 198cba69eeeSIan Campbell #include <config_distro_defaults.h> 199cba69eeeSIan Campbell #endif 200cba69eeeSIan Campbell 201cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */ 202