1cba69eeeSIan Campbell /* 2cba69eeeSIan Campbell * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3cba69eeeSIan Campbell * 4cba69eeeSIan Campbell * (C) Copyright 2007-2011 5cba69eeeSIan Campbell * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6cba69eeeSIan Campbell * Tom Cubie <tangliang@allwinnertech.com> 7cba69eeeSIan Campbell * 8cba69eeeSIan Campbell * Configuration settings for the Allwinner sunxi series of boards. 9cba69eeeSIan Campbell * 10cba69eeeSIan Campbell * SPDX-License-Identifier: GPL-2.0+ 11cba69eeeSIan Campbell */ 12cba69eeeSIan Campbell 13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H 14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H 15cba69eeeSIan Campbell 16daf6d399SHans de Goede #include <asm/arch/cpu.h> 17e049fe28SHans de Goede #include <linux/stringify.h> 18e049fe28SHans de Goede 1977ef1369SSiarhei Siamashka #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 2077ef1369SSiarhei Siamashka /* 2177ef1369SSiarhei Siamashka * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the 2277ef1369SSiarhei Siamashka * expense of restricting some features, so the regular machine id values can 2377ef1369SSiarhei Siamashka * be used. 2477ef1369SSiarhei Siamashka */ 2577ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 0 2677ef1369SSiarhei Siamashka #else 2777ef1369SSiarhei Siamashka /* 2877ef1369SSiarhei Siamashka * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. 2977ef1369SSiarhei Siamashka * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass 3077ef1369SSiarhei Siamashka * beyond the machine id check. 3177ef1369SSiarhei Siamashka */ 3277ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 1 3377ef1369SSiarhei Siamashka #endif 3477ef1369SSiarhei Siamashka 35cba69eeeSIan Campbell /* 36cba69eeeSIan Campbell * High Level Configuration Options 37cba69eeeSIan Campbell */ 3850827a59SIan Campbell #ifdef CONFIG_SPL_BUILD 3950827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 4050827a59SIan Campbell #endif 41cba69eeeSIan Campbell 42cba69eeeSIan Campbell /* Serial & console */ 43cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL 44cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */ 45cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK 24000000 464fb60552SThomas Chou #ifndef CONFIG_DM_SERIAL 471a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE -4 48cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 49cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 50cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 51cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 52c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 531a81cf83SSimon Glass #endif 54cba69eeeSIan Campbell 558a65f69cSPaul Kocialkowski /* CPU */ 56d96ebc46SSiarhei Siamashka #define CONFIG_TIMER_CLK_FREQ 24000000 578a65f69cSPaul Kocialkowski 58e049fe28SHans de Goede /* 59e049fe28SHans de Goede * The DRAM Base differs between some models. We cannot use macros for the 60e049fe28SHans de Goede * CONFIG_FOO defines which contain the DRAM base address since they end 61e049fe28SHans de Goede * up unexpanded in include/autoconf.mk . 62e049fe28SHans de Goede * 63e049fe28SHans de Goede * So we have to have this #ifdef #else #endif block for these. 64e049fe28SHans de Goede */ 65e049fe28SHans de Goede #ifdef CONFIG_MACH_SUN9I 66e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x2##x 67e049fe28SHans de Goede #define CONFIG_SYS_SDRAM_BASE 0x20000000 68e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ 69e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE 0x2a000000 70ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 71ff42d107SHans de Goede * since it needs to fit in with the other values. By also #defining it 72ff42d107SHans de Goede * we get warnings if the Kconfig value mismatches. */ 73ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000 74e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 75e049fe28SHans de Goede #else 76e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x4##x 77cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE 0x40000000 78e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 79e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE 0x4a000000 80ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 81ff42d107SHans de Goede * since it needs to fit in with the other values. By also #defining it 82ff42d107SHans de Goede * we get warnings if the Kconfig value mismatches. */ 83ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000 84e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 85e049fe28SHans de Goede #endif 86e049fe28SHans de Goede 87e049fe28SHans de Goede #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ 88e049fe28SHans de Goede 89d96ebc46SSiarhei Siamashka #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) 9077fe9887SHans de Goede /* 9177fe9887SHans de Goede * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is 9277fe9887SHans de Goede * slightly bigger. Note that it is possible to map the first 32 KiB of the 9377fe9887SHans de Goede * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the 9477fe9887SHans de Goede * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and 9577fe9887SHans de Goede * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. 9677fe9887SHans de Goede */ 9777fe9887SHans de Goede #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 98eb504fa1SAndre Przywara #define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */ 9977fe9887SHans de Goede #else 100cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR 0x0 101cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 10277fe9887SHans de Goede #endif 103cba69eeeSIan Campbell 104cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \ 105cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 106cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \ 107cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 108cba69eeeSIan Campbell 109cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS 1 110cba69eeeSIan Campbell #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 111cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 112cba69eeeSIan Campbell 113a6e50a88SIan Campbell #ifdef CONFIG_AHCI 114a6e50a88SIan Campbell #define CONFIG_LIBATA 115a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI 116a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT 117a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI 1180751b138SBernhard Nortmann #define CONFIG_SYS_64BIT_LBA 119a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 120a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN 1 121a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 122a6e50a88SIan Campbell CONFIG_SYS_SCSI_MAX_LUN) 123c649e3c9SSimon Glass #define CONFIG_SCSI 124a6e50a88SIan Campbell #endif 125a6e50a88SIan Campbell 126cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS 127cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG 128cba69eeeSIan Campbell #define CONFIG_INITRD_TAG 1299f852211SPaul Kocialkowski #define CONFIG_SERIAL_TAG 130cba69eeeSIan Campbell 131e5268616SHans de Goede #ifdef CONFIG_NAND_SUNXI 132a0dfa88bSBoris Brezillon #define CONFIG_SYS_NAND_MAX_ECCPOS 1664 1334ccae81cSBoris Brezillon #define CONFIG_SYS_NAND_ONFI_DETECTION 1344ccae81cSBoris Brezillon #define CONFIG_SYS_MAX_NAND_DEVICE 8 135960caebaSPiotr Zierhoffer #endif 136960caebaSPiotr Zierhoffer 13719e99fb4SSiarhei Siamashka #ifdef CONFIG_SPL_SPI_SUNXI 13819e99fb4SSiarhei Siamashka #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 13919e99fb4SSiarhei Siamashka #endif 14019e99fb4SSiarhei Siamashka 141e24ea55cSIan Campbell /* mmc config */ 14244c79879SMaxime Ripard #ifdef CONFIG_MMC 143e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC 144e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI 145e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT 0 146e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC 147e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 148*ae042bebSEmmanuel Vadot #define CONFIG_SYS_MMC_MAX_DEVICE 4 149ff2b47f6SChen-Yu Tsai #endif 150e24ea55cSIan Campbell 1515c965ed9SHans de Goede /* 64MB of malloc() pool */ 1525c965ed9SHans de Goede #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20)) 153cba69eeeSIan Campbell 154cba69eeeSIan Campbell /* 155cba69eeeSIan Campbell * Miscellaneous configurable options 156cba69eeeSIan Campbell */ 15706beadb0SIan Campbell #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 15806beadb0SIan Campbell #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 159cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 160cba69eeeSIan Campbell 161cba69eeeSIan Campbell /* Boot Argument Buffer Size */ 162cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 163cba69eeeSIan Campbell 164cba69eeeSIan Campbell /* standalone support */ 165e049fe28SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR 166cba69eeeSIan Campbell 167cba69eeeSIan Campbell /* baudrate */ 168cba69eeeSIan Campbell #define CONFIG_BAUDRATE 115200 169cba69eeeSIan Campbell 170cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */ 171cba69eeeSIan Campbell #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 172cba69eeeSIan Campbell 173cba69eeeSIan Campbell /* FLASH and environment organization */ 174cba69eeeSIan Campbell 175cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH 176cba69eeeSIan Campbell 177fa5e1020SBoris Brezillon #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ 178cba69eeeSIan Campbell 179e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 180cba69eeeSIan Campbell #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 181cba69eeeSIan Campbell 182cba69eeeSIan Campbell #define CONFIG_FAT_WRITE /* enable write access */ 183cba69eeeSIan Campbell 184cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK 185cba69eeeSIan Campbell 186942cb0b6SSimon Glass #define CONFIG_SPL_BOARD_LOAD_IMAGE 187942cb0b6SSimon Glass 188d96ebc46SSiarhei Siamashka #if defined(CONFIG_MACH_SUN9I) 189b19236fdSSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ 190b19236fdSSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE 0x5fc0 /* ? KiB on sun9i */ 191d96ebc46SSiarhei Siamashka #elif defined(CONFIG_MACH_SUN50I) 192b19236fdSSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ 193b19236fdSSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB on sun50i */ 194d96ebc46SSiarhei Siamashka #else 195b19236fdSSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */ 196b19236fdSSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */ 197d96ebc46SSiarhei Siamashka #endif 19850827a59SIan Campbell 199d96ebc46SSiarhei Siamashka #ifndef CONFIG_ARM64 20050827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 201d96ebc46SSiarhei Siamashka #endif 20250827a59SIan Campbell 20350827a59SIan Campbell #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 20450827a59SIan Campbell 205d96ebc46SSiarhei Siamashka #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) 206eb504fa1SAndre Przywara /* FIXME: 40 KiB instead of 32 KiB ? */ 207eb504fa1SAndre Przywara #define LOW_LEVEL_SRAM_STACK 0x00018000 208d96ebc46SSiarhei Siamashka #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 209d96ebc46SSiarhei Siamashka #else 210cba69eeeSIan Campbell /* end of 32 KiB in sram */ 211cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 212cba69eeeSIan Campbell #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 213d96ebc46SSiarhei Siamashka #endif 214cba69eeeSIan Campbell 2156620377eSHans de Goede /* I2C */ 2160d8382aeSJelle van der Waa #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ 2170d8382aeSJelle van der Waa defined CONFIG_SY8106A_POWER 218ad40610bSHans de Goede #endif 219ad40610bSHans de Goede 2206c739c5dSPaul Kocialkowski #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ 2216c739c5dSPaul Kocialkowski defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ 2229d082687SJelle van der Waa defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE 2238b2db32aSHans de Goede #define CONFIG_SYS_I2C 2246620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI 2256620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED 400000 2266620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE 0x7f 2278b2db32aSHans de Goede #endif 22855410089SHans de Goede 22955410089SHans de Goede #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) 23055410089SHans de Goede #define CONFIG_SYS_I2C_SOFT 23155410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SPEED 50000 23255410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 23355410089SHans de Goede /* We use pin names in Kconfig and sunxi_name_to_gpio() */ 23455410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda 23555410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl 23655410089SHans de Goede #ifndef __ASSEMBLY__ 23755410089SHans de Goede extern int soft_i2c_gpio_sda; 23855410089SHans de Goede extern int soft_i2c_gpio_scl; 23955410089SHans de Goede #endif 2401fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ 2411fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ 2421fc42018SHans de Goede #else 2431fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ 2441fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ 24555410089SHans de Goede #endif 24655410089SHans de Goede 24714bc66bdSHenrik Nordstrom /* PMU */ 24895ab8feeSvishnupatekar #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ 2490d8382aeSJelle van der Waa defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \ 2500d8382aeSJelle van der Waa defined CONFIG_SY8106A_POWER 25114bc66bdSHenrik Nordstrom #endif 25214bc66bdSHenrik Nordstrom 253f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX 254cba69eeeSIan Campbell #define CONFIG_CONS_INDEX 1 /* UART0 */ 255f84269c5SHans de Goede #endif 256cba69eeeSIan Campbell 257a5da3c83SHans de Goede #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE 258f3133962SHans de Goede #if CONFIG_CONS_INDEX == 1 259f3133962SHans de Goede #ifdef CONFIG_MACH_SUN9I 260f3133962SHans de Goede #define OF_STDOUT_PATH "/soc/serial@07000000:115200" 261f3133962SHans de Goede #else 262f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" 263f3133962SHans de Goede #endif 264f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) 265f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" 2665cd83b11SLaurent Itti #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) 2675cd83b11SLaurent Itti #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" 268f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) 269f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" 270f3133962SHans de Goede #else 271f3133962SHans de Goede #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. 272f3133962SHans de Goede #endif 273a5da3c83SHans de Goede #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */ 274f3133962SHans de Goede 275abce2c62SIan Campbell /* GPIO */ 276abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO 277abce2c62SIan Campbell 2787f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 2797f2c521fSLuc Verhaegen /* 2805633a296SHans de Goede * The amount of RAM to keep free at the top of RAM when relocating u-boot, 2815633a296SHans de Goede * to use as framebuffer. This must be a multiple of 4096. 2827f2c521fSLuc Verhaegen */ 2835c965ed9SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20) 2847f2c521fSLuc Verhaegen 2852d7a084bSLuc Verhaegen /* Do we want to initialize a simple FB? */ 2862d7a084bSLuc Verhaegen #define CONFIG_VIDEO_DT_SIMPLEFB 2872d7a084bSLuc Verhaegen 2887f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SUNXI 2897f2c521fSLuc Verhaegen 2907f2c521fSLuc Verhaegen #define CONFIG_VIDEO_LOGO 291be8ec633SHans de Goede #define CONFIG_VIDEO_STD_TIMINGS 29275481607SHans de Goede #define CONFIG_I2C_EDID 29358332f89SHans de Goede #define VIDEO_LINE_LEN (pGD->plnSizeX) 2947f2c521fSLuc Verhaegen 2957f2c521fSLuc Verhaegen /* allow both serial and cfb console. */ 2967f2c521fSLuc Verhaegen /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ 2977f2c521fSLuc Verhaegen 2987f2c521fSLuc Verhaegen #endif /* CONFIG_VIDEO */ 2997f2c521fSLuc Verhaegen 300c26fb9dbSHans de Goede /* Ethernet support */ 301c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC 3028145dea4SHans de Goede #define CONFIG_PHY_ADDR 1 303c26fb9dbSHans de Goede #define CONFIG_MII /* MII PHY management */ 3048145dea4SHans de Goede #define CONFIG_PHYLIB 305c26fb9dbSHans de Goede #endif 306c26fb9dbSHans de Goede 3075835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC 3085835823dSIan Campbell #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 3095835823dSIan Campbell #define CONFIG_PHY_ADDR 1 3105835823dSIan Campbell #define CONFIG_MII /* MII PHY management */ 3111eae8f66SHans de Goede #define CONFIG_PHY_REALTEK 3125835823dSIan Campbell #endif 3135835823dSIan Campbell 3142582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_EHCI_HCD 3156a72e804SHans de Goede #define CONFIG_USB_OHCI_NEW 3166a72e804SHans de Goede #define CONFIG_USB_OHCI_SUNXI 3176a72e804SHans de Goede #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 3183584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 3191a800f7aSHans de Goede #endif 3201a800f7aSHans de Goede 3211a800f7aSHans de Goede #ifdef CONFIG_USB_MUSB_SUNXI 32295de1e2fSPaul Kocialkowski #define CONFIG_USB_MUSB_PIO_ONLY 3231a800f7aSHans de Goede #endif 3241a800f7aSHans de Goede 325b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_MUSB_GADGET 326aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_FASTBOOT 327aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_MASS_STORAGE 328b21144ebSPaul Kocialkowski #endif 329b21144ebSPaul Kocialkowski 330b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_FASTBOOT 331b21144ebSPaul Kocialkowski #define CONFIG_CMD_FASTBOOT 332b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 333b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000 334bac83fb0SMaxime Ripard #define CONFIG_ANDROID_BOOT_IMAGE 335b21144ebSPaul Kocialkowski 336b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH 33744c79879SMaxime Ripard 33844c79879SMaxime Ripard #ifdef CONFIG_MMC 339b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 340b21144ebSPaul Kocialkowski #define CONFIG_EFI_PARTITION 341b21144ebSPaul Kocialkowski #endif 34244c79879SMaxime Ripard #endif 343b21144ebSPaul Kocialkowski 344b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE 345b21144ebSPaul Kocialkowski #endif 346b21144ebSPaul Kocialkowski 34786b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 34886b49093SHans de Goede #define CONFIG_PREBOOT 349eab9433aSHans de Goede #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 35086b49093SHans de Goede #endif 35186b49093SHans de Goede 352cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \ 353cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_NAND && \ 354cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_FAT && \ 355cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_SPI_FLASH 356cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE 357cba69eeeSIan Campbell #endif 358cba69eeeSIan Campbell 359b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R 360b41d7d05SJonathan Liu 361cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD 362cba69eeeSIan Campbell #include <config_distro_defaults.h> 3632ec3a612SHans de Goede 364671f9ad8SAndre Przywara #ifdef CONFIG_ARM64 365671f9ad8SAndre Przywara /* 366671f9ad8SAndre Przywara * Boards seem to come with at least 512MB of DRAM. 367671f9ad8SAndre Przywara * The kernel should go at 512K, which is the default text offset (that will 368671f9ad8SAndre Przywara * be adjusted at runtime if needed). 369671f9ad8SAndre Przywara * There is no compression for arm64 kernels (yet), so leave some space 370671f9ad8SAndre Przywara * for really big kernels, say 256MB for now. 371671f9ad8SAndre Przywara * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd. 372671f9ad8SAndre Przywara * Align the initrd to a 2MB page. 373671f9ad8SAndre Przywara */ 374671f9ad8SAndre Przywara #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) 375671f9ad8SAndre Przywara #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) 376671f9ad8SAndre Przywara #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) 377671f9ad8SAndre Przywara #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) 378671f9ad8SAndre Przywara #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000)) 379671f9ad8SAndre Przywara 380671f9ad8SAndre Przywara #else 3818c95c556SHans de Goede /* 3825c965ed9SHans de Goede * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. 3838c95c556SHans de Goede * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 3848c95c556SHans de Goede * 1M script, 1M pxe and the ramdisk at the end. 3858c95c556SHans de Goede */ 3862a909c5fSSiarhei Siamashka 3872a909c5fSSiarhei Siamashka #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) 3882a909c5fSSiarhei Siamashka #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) 3892a909c5fSSiarhei Siamashka #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) 3902a909c5fSSiarhei Siamashka #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) 3912a909c5fSSiarhei Siamashka #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000)) 392671f9ad8SAndre Przywara #endif 3932a909c5fSSiarhei Siamashka 394846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \ 3955c965ed9SHans de Goede "bootm_size=0xa000000\0" \ 3962a909c5fSSiarhei Siamashka "kernel_addr_r=" KERNEL_ADDR_R "\0" \ 3972a909c5fSSiarhei Siamashka "fdt_addr_r=" FDT_ADDR_R "\0" \ 3982a909c5fSSiarhei Siamashka "scriptaddr=" SCRIPT_ADDR_R "\0" \ 3992a909c5fSSiarhei Siamashka "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ 4002a909c5fSSiarhei Siamashka "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" 4012a909c5fSSiarhei Siamashka 4022a909c5fSSiarhei Siamashka #define DFU_ALT_INFO_RAM \ 4032a909c5fSSiarhei Siamashka "dfu_alt_info_ram=" \ 4042a909c5fSSiarhei Siamashka "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ 4052a909c5fSSiarhei Siamashka "fdt ram " FDT_ADDR_R " 0x100000;" \ 4062a909c5fSSiarhei Siamashka "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0" 407846e3254SHans de Goede 40841f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC 40941f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 4105a37a400SKarsten Merker #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 4115a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1) 4125a37a400SKarsten Merker #else 4135a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) 4145a37a400SKarsten Merker #endif 41541f8e9f5SChen-Yu Tsai #else 41641f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) 4175a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) 41841f8e9f5SChen-Yu Tsai #endif 41941f8e9f5SChen-Yu Tsai 4202ec3a612SHans de Goede #ifdef CONFIG_AHCI 4212ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 4222ec3a612SHans de Goede #else 4232ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) 4242ec3a612SHans de Goede #endif 4252ec3a612SHans de Goede 4262582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_STORAGE 427859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 428859b3f14SChen-Yu Tsai #else 429859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) 430859b3f14SChen-Yu Tsai #endif 431859b3f14SChen-Yu Tsai 432f3b589c0SBernhard Nortmann /* FEL boot support, auto-execute boot.scr if a script address was provided */ 433f3b589c0SBernhard Nortmann #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \ 434f3b589c0SBernhard Nortmann "bootcmd_fel=" \ 435f3b589c0SBernhard Nortmann "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \ 436f3b589c0SBernhard Nortmann "echo '(FEL boot)'; " \ 437f3b589c0SBernhard Nortmann "source ${fel_scriptaddr}; " \ 438f3b589c0SBernhard Nortmann "fi\0" 439f3b589c0SBernhard Nortmann #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \ 440f3b589c0SBernhard Nortmann "fel " 441f3b589c0SBernhard Nortmann 4422ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \ 443f3b589c0SBernhard Nortmann func(FEL, fel, na) \ 44441f8e9f5SChen-Yu Tsai BOOT_TARGET_DEVICES_MMC(func) \ 4455a37a400SKarsten Merker BOOT_TARGET_DEVICES_MMC_EXTRA(func) \ 4462ec3a612SHans de Goede BOOT_TARGET_DEVICES_SCSI(func) \ 447859b3f14SChen-Yu Tsai BOOT_TARGET_DEVICES_USB(func) \ 4482ec3a612SHans de Goede func(PXE, pxe, na) \ 4492ec3a612SHans de Goede func(DHCP, dhcp, na) 4502ec3a612SHans de Goede 4513b824025SHans de Goede #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 4523b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT \ 4533b824025SHans de Goede "bootcmd_sunxi_compat=" \ 4543b824025SHans de Goede "setenv root /dev/mmcblk0p3 rootwait; " \ 4553b824025SHans de Goede "if ext2load mmc 0 0x44000000 uEnv.txt; then " \ 4563b824025SHans de Goede "echo Loaded environment from uEnv.txt; " \ 4573b824025SHans de Goede "env import -t 0x44000000 ${filesize}; " \ 4583b824025SHans de Goede "fi; " \ 4593b824025SHans de Goede "setenv bootargs console=${console} root=${root} ${extraargs}; " \ 4603b824025SHans de Goede "ext2load mmc 0 0x43000000 script.bin && " \ 4613b824025SHans de Goede "ext2load mmc 0 0x48000000 uImage && " \ 4623b824025SHans de Goede "bootm 0x48000000\0" 4633b824025SHans de Goede #else 4643b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT 4653b824025SHans de Goede #endif 4663b824025SHans de Goede 4672ec3a612SHans de Goede #include <config_distro_bootcmd.h> 4682ec3a612SHans de Goede 46986b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 47086b49093SHans de Goede #define CONSOLE_STDIN_SETTINGS \ 47186b49093SHans de Goede "preboot=usb start\0" \ 47286b49093SHans de Goede "stdin=serial,usbkbd\0" 47386b49093SHans de Goede #else 4747f2c521fSLuc Verhaegen #define CONSOLE_STDIN_SETTINGS \ 4757f2c521fSLuc Verhaegen "stdin=serial\0" 47686b49093SHans de Goede #endif 4777f2c521fSLuc Verhaegen 4787f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 4797f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 4807f2c521fSLuc Verhaegen "stdout=serial,vga\0" \ 4817f2c521fSLuc Verhaegen "stderr=serial,vga\0" 4827f2c521fSLuc Verhaegen #else 4837f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 4847f2c521fSLuc Verhaegen "stdout=serial\0" \ 4857f2c521fSLuc Verhaegen "stderr=serial\0" 4867f2c521fSLuc Verhaegen #endif 4877f2c521fSLuc Verhaegen 4887f2c521fSLuc Verhaegen #define CONSOLE_ENV_SETTINGS \ 4897f2c521fSLuc Verhaegen CONSOLE_STDIN_SETTINGS \ 4907f2c521fSLuc Verhaegen CONSOLE_STDOUT_SETTINGS 4917f2c521fSLuc Verhaegen 4922ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \ 4937f2c521fSLuc Verhaegen CONSOLE_ENV_SETTINGS \ 494846e3254SHans de Goede MEM_LAYOUT_ENV_SETTINGS \ 4952a909c5fSSiarhei Siamashka DFU_ALT_INFO_RAM \ 49625acd33fSHans de Goede "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ 497846e3254SHans de Goede "console=ttyS0,115200\0" \ 4983b824025SHans de Goede BOOTCMD_SUNXI_COMPAT \ 4992ec3a612SHans de Goede BOOTENV 5002ec3a612SHans de Goede 5012ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */ 5022ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS 503cba69eeeSIan Campbell #endif 504cba69eeeSIan Campbell 505cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */ 506