xref: /rk3399_rockchip-uboot/include/configs/sunxi-common.h (revision a5da3c8354de9786ea1e065e40ba74f044dfbfe9)
1cba69eeeSIan Campbell /*
2cba69eeeSIan Campbell  * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3cba69eeeSIan Campbell  *
4cba69eeeSIan Campbell  * (C) Copyright 2007-2011
5cba69eeeSIan Campbell  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6cba69eeeSIan Campbell  * Tom Cubie <tangliang@allwinnertech.com>
7cba69eeeSIan Campbell  *
8cba69eeeSIan Campbell  * Configuration settings for the Allwinner sunxi series of boards.
9cba69eeeSIan Campbell  *
10cba69eeeSIan Campbell  * SPDX-License-Identifier:	GPL-2.0+
11cba69eeeSIan Campbell  */
12cba69eeeSIan Campbell 
13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H
14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H
15cba69eeeSIan Campbell 
16e049fe28SHans de Goede #include <linux/stringify.h>
17e049fe28SHans de Goede 
1877ef1369SSiarhei Siamashka #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
1977ef1369SSiarhei Siamashka /*
2077ef1369SSiarhei Siamashka  * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
2177ef1369SSiarhei Siamashka  * expense of restricting some features, so the regular machine id values can
2277ef1369SSiarhei Siamashka  * be used.
2377ef1369SSiarhei Siamashka  */
2477ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV	0
2577ef1369SSiarhei Siamashka #else
2677ef1369SSiarhei Siamashka /*
2777ef1369SSiarhei Siamashka  * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
2877ef1369SSiarhei Siamashka  * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
2977ef1369SSiarhei Siamashka  * beyond the machine id check.
3077ef1369SSiarhei Siamashka  */
3177ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV	1
3277ef1369SSiarhei Siamashka #endif
3377ef1369SSiarhei Siamashka 
34cba69eeeSIan Campbell /*
35cba69eeeSIan Campbell  * High Level Configuration Options
36cba69eeeSIan Campbell  */
37cba69eeeSIan Campbell #define CONFIG_SUNXI		/* sunxi family */
3850827a59SIan Campbell #ifdef CONFIG_SPL_BUILD
3950827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD	/* Thumbs mode to save space in SPL */
4050827a59SIan Campbell #endif
41cba69eeeSIan Campbell 
42cba69eeeSIan Campbell #include <asm/arch/cpu.h>	/* get chip and board defs */
43cba69eeeSIan Campbell 
44b6006bafSHans de Goede #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL)
451a81cf83SSimon Glass # define CONFIG_DW_SERIAL
4657f878efSSimon Glass #endif
4757f878efSSimon Glass 
48cba69eeeSIan Campbell /*
49cba69eeeSIan Campbell  * Display CPU information
50cba69eeeSIan Campbell  */
51cba69eeeSIan Campbell #define CONFIG_DISPLAY_CPUINFO
52cba69eeeSIan Campbell 
534e7c892dSIan Campbell #define CONFIG_SYS_PROMPT	"sunxi# "
544e7c892dSIan Campbell 
55cba69eeeSIan Campbell /* Serial & console */
56cba69eeeSIan Campbell #define CONFIG_SYS_NS16550
57cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL
58cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */
59cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK		24000000
601a81cf83SSimon Glass #ifndef CONFIG_DM_SERIAL
611a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE	-4
62cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
63cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
64cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
65cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
66c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
671a81cf83SSimon Glass #endif
68cba69eeeSIan Campbell 
698a65f69cSPaul Kocialkowski /* CPU */
708a65f69cSPaul Kocialkowski #define CONFIG_SYS_CACHELINE_SIZE	64
718a65f69cSPaul Kocialkowski 
72e049fe28SHans de Goede /*
73e049fe28SHans de Goede  * The DRAM Base differs between some models. We cannot use macros for the
74e049fe28SHans de Goede  * CONFIG_FOO defines which contain the DRAM base address since they end
75e049fe28SHans de Goede  * up unexpanded in include/autoconf.mk .
76e049fe28SHans de Goede  *
77e049fe28SHans de Goede  * So we have to have this #ifdef #else #endif block for these.
78e049fe28SHans de Goede  */
79e049fe28SHans de Goede #ifdef CONFIG_MACH_SUN9I
80e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x2##x
81e049fe28SHans de Goede #define CONFIG_SYS_SDRAM_BASE		0x20000000
82e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR		0x22000000 /* default load address */
83e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE		0x2a000000
84e049fe28SHans de Goede #define CONFIG_PRE_CON_BUF_ADDR		0x2f000000
85e049fe28SHans de Goede #define CONFIG_SYS_SPL_MALLOC_START	0x2ff00000
86e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR	0x2ff80000
87e049fe28SHans de Goede #else
88e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x4##x
89cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE		0x40000000
90e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
91e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE		0x4a000000
92e049fe28SHans de Goede #define CONFIG_PRE_CON_BUF_ADDR		0x4f000000
93e049fe28SHans de Goede #define CONFIG_SYS_SPL_MALLOC_START	0x4ff00000
94e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
95e049fe28SHans de Goede #endif
96e049fe28SHans de Goede 
97e049fe28SHans de Goede #define CONFIG_SPL_BSS_MAX_SIZE		0x00080000 /* 512 KiB */
98e049fe28SHans de Goede #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00080000 /* 512 KiB */
99e049fe28SHans de Goede 
10077fe9887SHans de Goede #ifdef CONFIG_MACH_SUN9I
10177fe9887SHans de Goede /*
10277fe9887SHans de Goede  * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
10377fe9887SHans de Goede  * slightly bigger. Note that it is possible to map the first 32 KiB of the
10477fe9887SHans de Goede  * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
10577fe9887SHans de Goede  * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
10677fe9887SHans de Goede  * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
10777fe9887SHans de Goede  */
10877fe9887SHans de Goede #define CONFIG_SYS_INIT_RAM_ADDR	0x10000
10977fe9887SHans de Goede #define CONFIG_SYS_INIT_RAM_SIZE	0x0a000	/* 40 KiB */
11077fe9887SHans de Goede #else
111cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR	0x0
112cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
11377fe9887SHans de Goede #endif
114cba69eeeSIan Campbell 
115cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \
116cba69eeeSIan Campbell 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
117cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \
118cba69eeeSIan Campbell 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
119cba69eeeSIan Campbell 
120cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS		1
121cba69eeeSIan Campbell #define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
122cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */
123cba69eeeSIan Campbell 
124a6e50a88SIan Campbell #ifdef CONFIG_AHCI
125a6e50a88SIan Campbell #define CONFIG_LIBATA
126a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI
127a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT
128a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI
1290751b138SBernhard Nortmann #define CONFIG_SYS_64BIT_LBA
130a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
131a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN		1
132a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
133a6e50a88SIan Campbell 					 CONFIG_SYS_SCSI_MAX_LUN)
134a6e50a88SIan Campbell #define CONFIG_CMD_SCSI
135a6e50a88SIan Campbell #endif
136a6e50a88SIan Campbell 
137cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS
138cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG
139cba69eeeSIan Campbell #define CONFIG_INITRD_TAG
1409f852211SPaul Kocialkowski #define CONFIG_SERIAL_TAG
141cba69eeeSIan Campbell 
142960caebaSPiotr Zierhoffer #if defined(CONFIG_SPL_NAND_SUNXI)
143960caebaSPiotr Zierhoffer #define CONFIG_SPL_NAND_DRIVERS
144960caebaSPiotr Zierhoffer #define CONFIG_SPL_NAND_SUPPORT
145960caebaSPiotr Zierhoffer 
146960caebaSPiotr Zierhoffer #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
147960caebaSPiotr Zierhoffer #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x008000
148960caebaSPiotr Zierhoffer 
149960caebaSPiotr Zierhoffer #endif
150960caebaSPiotr Zierhoffer 
151960caebaSPiotr Zierhoffer 
152e24ea55cSIan Campbell /* mmc config */
153ff2b47f6SChen-Yu Tsai #if !defined(CONFIG_UART0_PORT_F)
154e24ea55cSIan Campbell #define CONFIG_MMC
155e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC
156e24ea55cSIan Campbell #define CONFIG_CMD_MMC
157e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI
158e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT		0
159e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC
160e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
161ff2b47f6SChen-Yu Tsai #endif
162e24ea55cSIan Campbell 
163cba69eeeSIan Campbell /* 4MB of malloc() pool */
164cba69eeeSIan Campbell #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (4 << 20))
165cba69eeeSIan Campbell 
166cba69eeeSIan Campbell /*
167cba69eeeSIan Campbell  * Miscellaneous configurable options
168cba69eeeSIan Campbell  */
16906beadb0SIan Campbell #define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
17006beadb0SIan Campbell #define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
171cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
172cba69eeeSIan Campbell #define CONFIG_SYS_GENERIC_BOARD
173cba69eeeSIan Campbell 
174cba69eeeSIan Campbell /* Boot Argument Buffer Size */
175cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
176cba69eeeSIan Campbell 
177cba69eeeSIan Campbell /* standalone support */
178e049fe28SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR	CONFIG_SYS_LOAD_ADDR
179cba69eeeSIan Campbell 
180cba69eeeSIan Campbell /* baudrate */
181cba69eeeSIan Campbell #define CONFIG_BAUDRATE			115200
182cba69eeeSIan Campbell 
183cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */
184cba69eeeSIan Campbell #define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */
185cba69eeeSIan Campbell 
186cba69eeeSIan Campbell /* FLASH and environment organization */
187cba69eeeSIan Campbell 
188cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH
189cba69eeeSIan Campbell 
190cba69eeeSIan Campbell #define CONFIG_SYS_MONITOR_LEN		(512 << 10)	/* 512 KiB */
191cba69eeeSIan Campbell #define CONFIG_IDENT_STRING		" Allwinner Technology"
192cba69eeeSIan Campbell 
193e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET		(544 << 10) /* (8 + 24 + 512) KiB */
194cba69eeeSIan Campbell #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
195cba69eeeSIan Campbell 
196cba69eeeSIan Campbell #define CONFIG_FAT_WRITE	/* enable write access */
197cba69eeeSIan Campbell 
198cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK
199cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT
200cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT
201cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT
202cba69eeeSIan Campbell 
203942cb0b6SSimon Glass #define CONFIG_SPL_BOARD_LOAD_IMAGE
204942cb0b6SSimon Glass 
20550827a59SIan Campbell #define CONFIG_SPL_TEXT_BASE		0x20		/* sram start+header */
20650827a59SIan Campbell #define CONFIG_SPL_MAX_SIZE		0x5fe0		/* 24KB on sun4i/sun7i */
20750827a59SIan Campbell 
20850827a59SIan Campbell #define CONFIG_SPL_LIBDISK_SUPPORT
209f0ce28e9SSiarhei Siamashka 
210f0ce28e9SSiarhei Siamashka #if !defined(CONFIG_UART0_PORT_F)
21150827a59SIan Campbell #define CONFIG_SPL_MMC_SUPPORT
212f0ce28e9SSiarhei Siamashka #endif
21350827a59SIan Campbell 
21450827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
21550827a59SIan Campbell 
21650827a59SIan Campbell #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	80	/* 40KiB */
21750827a59SIan Campbell #define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */
21850827a59SIan Campbell 
219cba69eeeSIan Campbell /* end of 32 KiB in sram */
220cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK		0x00008000 /* End of sram */
221cba69eeeSIan Campbell #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
222cba69eeeSIan Campbell 
2236620377eSHans de Goede /* I2C */
224ad40610bSHans de Goede #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER
2256620377eSHans de Goede #define CONFIG_SPL_I2C_SUPPORT
226ad40610bSHans de Goede #endif
227ad40610bSHans de Goede 
2286c739c5dSPaul Kocialkowski #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
2296c739c5dSPaul Kocialkowski     defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
2306c739c5dSPaul Kocialkowski     defined CONFIG_I2C4_ENABLE
2318b2db32aSHans de Goede #define CONFIG_SYS_I2C
2326620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI
2336620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED		400000
2346620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE		0x7f
2358b2db32aSHans de Goede #define CONFIG_CMD_I2C
2368b2db32aSHans de Goede #endif
23755410089SHans de Goede 
23855410089SHans de Goede #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
23955410089SHans de Goede #define CONFIG_SYS_I2C_SOFT
24055410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SPEED	50000
24155410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SLAVE	0x00
24255410089SHans de Goede /* We use pin names in Kconfig and sunxi_name_to_gpio() */
24355410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SDA	soft_i2c_gpio_sda
24455410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SCL	soft_i2c_gpio_scl
24555410089SHans de Goede #ifndef __ASSEMBLY__
24655410089SHans de Goede extern int soft_i2c_gpio_sda;
24755410089SHans de Goede extern int soft_i2c_gpio_scl;
24855410089SHans de Goede #endif
2491fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS	0 /* The lcd panel soft i2c is bus 0 */
2501fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM		1 /* And the axp209 i2c bus is bus 1 */
2511fc42018SHans de Goede #else
2521fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM		0 /* The axp209 i2c bus is bus 0 */
2531fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS	-1 /* NA, but necessary to compile */
25455410089SHans de Goede #endif
25555410089SHans de Goede 
25614bc66bdSHenrik Nordstrom /* PMU */
25714bc66bdSHenrik Nordstrom #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
25814bc66bdSHenrik Nordstrom #define CONFIG_SPL_POWER_SUPPORT
25914bc66bdSHenrik Nordstrom #endif
26014bc66bdSHenrik Nordstrom 
261f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX
262cba69eeeSIan Campbell #define CONFIG_CONS_INDEX              1       /* UART0 */
263f84269c5SHans de Goede #endif
264cba69eeeSIan Campbell 
265*a5da3c83SHans de Goede #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
266f3133962SHans de Goede #if CONFIG_CONS_INDEX == 1
267f3133962SHans de Goede #ifdef CONFIG_MACH_SUN9I
268f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc/serial@07000000:115200"
269f3133962SHans de Goede #else
270f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28000:115200"
271f3133962SHans de Goede #endif
272f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
273f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
2745cd83b11SLaurent Itti #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
2755cd83b11SLaurent Itti #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
276f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
277f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc@01c00000/serial@01f02800:115200"
278f3133962SHans de Goede #else
279f3133962SHans de Goede #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
280f3133962SHans de Goede #endif
281*a5da3c83SHans de Goede #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
282f3133962SHans de Goede 
283abce2c62SIan Campbell /* GPIO */
284abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO
285cd82113aSHans de Goede #define CONFIG_SPL_GPIO_SUPPORT
286abce2c62SIan Campbell #define CONFIG_CMD_GPIO
287abce2c62SIan Campbell 
2887f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO
2897f2c521fSLuc Verhaegen /*
2905633a296SHans de Goede  * The amount of RAM to keep free at the top of RAM when relocating u-boot,
2915633a296SHans de Goede  * to use as framebuffer. This must be a multiple of 4096.
2927f2c521fSLuc Verhaegen  */
2935633a296SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20)
2947f2c521fSLuc Verhaegen 
2952d7a084bSLuc Verhaegen /* Do we want to initialize a simple FB? */
2962d7a084bSLuc Verhaegen #define CONFIG_VIDEO_DT_SIMPLEFB
2972d7a084bSLuc Verhaegen 
2987f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SUNXI
2997f2c521fSLuc Verhaegen 
3007f2c521fSLuc Verhaegen #define CONFIG_CFB_CONSOLE
3017f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SW_CURSOR
3027f2c521fSLuc Verhaegen #define CONFIG_VIDEO_LOGO
303be8ec633SHans de Goede #define CONFIG_VIDEO_STD_TIMINGS
30475481607SHans de Goede #define CONFIG_I2C_EDID
3057f2c521fSLuc Verhaegen 
3067f2c521fSLuc Verhaegen /* allow both serial and cfb console. */
3077f2c521fSLuc Verhaegen #define CONFIG_CONSOLE_MUX
3087f2c521fSLuc Verhaegen /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
3097f2c521fSLuc Verhaegen #define CONFIG_VGA_AS_SINGLE_DEVICE
3107f2c521fSLuc Verhaegen 
3112d7a084bSLuc Verhaegen /* To be able to hook simplefb into dt */
3122d7a084bSLuc Verhaegen #ifdef CONFIG_VIDEO_DT_SIMPLEFB
3132d7a084bSLuc Verhaegen #define CONFIG_OF_BOARD_SETUP
3142d7a084bSLuc Verhaegen #endif
3152d7a084bSLuc Verhaegen 
3167f2c521fSLuc Verhaegen #endif /* CONFIG_VIDEO */
3177f2c521fSLuc Verhaegen 
318c26fb9dbSHans de Goede /* Ethernet support */
319c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC
3208145dea4SHans de Goede #define CONFIG_PHY_ADDR		1
321c26fb9dbSHans de Goede #define CONFIG_MII			/* MII PHY management		*/
3228145dea4SHans de Goede #define CONFIG_PHYLIB
323c26fb9dbSHans de Goede #endif
324c26fb9dbSHans de Goede 
3255835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC
3265835823dSIan Campbell #define CONFIG_DW_AUTONEG
3275835823dSIan Campbell #define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
3285835823dSIan Campbell #define CONFIG_PHY_ADDR		1
3295835823dSIan Campbell #define CONFIG_MII			/* MII PHY management		*/
3305835823dSIan Campbell #define CONFIG_PHYLIB
3315835823dSIan Campbell #endif
3325835823dSIan Campbell 
3332582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_EHCI_HCD
3346a72e804SHans de Goede #define CONFIG_USB_OHCI_NEW
3356a72e804SHans de Goede #define CONFIG_USB_OHCI_SUNXI
3366a72e804SHans de Goede #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
3373584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
3381a800f7aSHans de Goede #endif
3391a800f7aSHans de Goede 
3401a800f7aSHans de Goede #ifdef CONFIG_USB_MUSB_SUNXI
34195de1e2fSPaul Kocialkowski #define CONFIG_USB_MUSB_PIO_ONLY
3421a800f7aSHans de Goede #endif
3431a800f7aSHans de Goede 
344b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_MUSB_GADGET
345b21144ebSPaul Kocialkowski #define CONFIG_USB_GADGET
346b21144ebSPaul Kocialkowski #define CONFIG_USB_GADGET_DUALSPEED
347b21144ebSPaul Kocialkowski #define CONFIG_USB_GADGET_VBUS_DRAW	0
348b21144ebSPaul Kocialkowski 
349b21144ebSPaul Kocialkowski #define CONFIG_USB_GADGET_DOWNLOAD
350b21144ebSPaul Kocialkowski #define CONFIG_USB_FUNCTION_FASTBOOT
351b21144ebSPaul Kocialkowski #define CONFIG_USB_FUNCTION_MASS_STORAGE
352b21144ebSPaul Kocialkowski #endif
353b21144ebSPaul Kocialkowski 
354b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_GADGET_DOWNLOAD
355b21144ebSPaul Kocialkowski #define CONFIG_G_DNL_VENDOR_NUM		0x1f3a
356b21144ebSPaul Kocialkowski #define CONFIG_G_DNL_PRODUCT_NUM	0x1010
357b21144ebSPaul Kocialkowski #define CONFIG_G_DNL_MANUFACTURER	"Allwinner Technology"
358b21144ebSPaul Kocialkowski #endif
359b21144ebSPaul Kocialkowski 
360b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_FASTBOOT
361b21144ebSPaul Kocialkowski #define CONFIG_CMD_FASTBOOT
362b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
363b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_SIZE	0x2000000
364b21144ebSPaul Kocialkowski 
365b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH
366b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH_MMC_DEV	0
367b21144ebSPaul Kocialkowski #define CONFIG_EFI_PARTITION
368b21144ebSPaul Kocialkowski #endif
369b21144ebSPaul Kocialkowski 
370b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
371b21144ebSPaul Kocialkowski #define CONFIG_CMD_USB_MASS_STORAGE
372b21144ebSPaul Kocialkowski #endif
373b21144ebSPaul Kocialkowski 
37486b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD
37586b49093SHans de Goede #define CONFIG_CONSOLE_MUX
37686b49093SHans de Goede #define CONFIG_PREBOOT
37786b49093SHans de Goede #define CONFIG_SYS_STDIO_DEREGISTER
378eab9433aSHans de Goede #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
37986b49093SHans de Goede #endif
38086b49093SHans de Goede 
381cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \
382cba69eeeSIan Campbell     !defined CONFIG_ENV_IS_IN_NAND && \
383cba69eeeSIan Campbell     !defined CONFIG_ENV_IS_IN_FAT && \
384cba69eeeSIan Campbell     !defined CONFIG_ENV_IS_IN_SPI_FLASH
385cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE
386cba69eeeSIan Campbell #endif
387cba69eeeSIan Campbell 
388b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R
3897f2c521fSLuc Verhaegen #define CONFIG_SYS_CONSOLE_IS_IN_ENV
390b41d7d05SJonathan Liu 
391cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD
392cba69eeeSIan Campbell #include <config_distro_defaults.h>
3932ec3a612SHans de Goede 
394a7925078SSiarhei Siamashka /* Enable pre-console buffer to get complete log on the VGA console */
395a7925078SSiarhei Siamashka #define CONFIG_PRE_CONSOLE_BUFFER
396a8552c7cSHans de Goede #define CONFIG_PRE_CON_BUF_SZ		4096 /* Aprox 2 80*25 screens */
397a7925078SSiarhei Siamashka 
3988c95c556SHans de Goede /*
3998c95c556SHans de Goede  * 240M RAM (256M minimum minus space for the framebuffer),
4008c95c556SHans de Goede  * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
4018c95c556SHans de Goede  * 1M script, 1M pxe and the ramdisk at the end.
4028c95c556SHans de Goede  */
403846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \
4048c95c556SHans de Goede 	"bootm_size=0xf000000\0" \
405e049fe28SHans de Goede 	"kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \
406e049fe28SHans de Goede 	"fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \
407e049fe28SHans de Goede 	"scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \
408e049fe28SHans de Goede 	"pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \
409e049fe28SHans de Goede 	"ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0"
410846e3254SHans de Goede 
41141f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC
41241f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
41341f8e9f5SChen-Yu Tsai #else
41441f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func)
41541f8e9f5SChen-Yu Tsai #endif
41641f8e9f5SChen-Yu Tsai 
4172ec3a612SHans de Goede #ifdef CONFIG_AHCI
4182ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
4192ec3a612SHans de Goede #else
4202ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func)
4212ec3a612SHans de Goede #endif
4222ec3a612SHans de Goede 
4232582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_STORAGE
424859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
425859b3f14SChen-Yu Tsai #else
426859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func)
427859b3f14SChen-Yu Tsai #endif
428859b3f14SChen-Yu Tsai 
4292ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \
43041f8e9f5SChen-Yu Tsai 	BOOT_TARGET_DEVICES_MMC(func) \
4312ec3a612SHans de Goede 	BOOT_TARGET_DEVICES_SCSI(func) \
432859b3f14SChen-Yu Tsai 	BOOT_TARGET_DEVICES_USB(func) \
4332ec3a612SHans de Goede 	func(PXE, pxe, na) \
4342ec3a612SHans de Goede 	func(DHCP, dhcp, na)
4352ec3a612SHans de Goede 
4362ec3a612SHans de Goede #include <config_distro_bootcmd.h>
4372ec3a612SHans de Goede 
43886b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD
43986b49093SHans de Goede #define CONSOLE_STDIN_SETTINGS \
44086b49093SHans de Goede 	"preboot=usb start\0" \
44186b49093SHans de Goede 	"stdin=serial,usbkbd\0"
44286b49093SHans de Goede #else
4437f2c521fSLuc Verhaegen #define CONSOLE_STDIN_SETTINGS \
4447f2c521fSLuc Verhaegen 	"stdin=serial\0"
44586b49093SHans de Goede #endif
4467f2c521fSLuc Verhaegen 
4477f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO
4487f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \
4497f2c521fSLuc Verhaegen 	"stdout=serial,vga\0" \
4507f2c521fSLuc Verhaegen 	"stderr=serial,vga\0"
4517f2c521fSLuc Verhaegen #else
4527f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \
4537f2c521fSLuc Verhaegen 	"stdout=serial\0" \
4547f2c521fSLuc Verhaegen 	"stderr=serial\0"
4557f2c521fSLuc Verhaegen #endif
4567f2c521fSLuc Verhaegen 
4577f2c521fSLuc Verhaegen #define CONSOLE_ENV_SETTINGS \
4587f2c521fSLuc Verhaegen 	CONSOLE_STDIN_SETTINGS \
4597f2c521fSLuc Verhaegen 	CONSOLE_STDOUT_SETTINGS
4607f2c521fSLuc Verhaegen 
4612ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \
4627f2c521fSLuc Verhaegen 	CONSOLE_ENV_SETTINGS \
463846e3254SHans de Goede 	MEM_LAYOUT_ENV_SETTINGS \
46425acd33fSHans de Goede 	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
465846e3254SHans de Goede 	"console=ttyS0,115200\0" \
4662ec3a612SHans de Goede 	BOOTENV
4672ec3a612SHans de Goede 
4682ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */
4692ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS
470cba69eeeSIan Campbell #endif
471cba69eeeSIan Campbell 
472cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */
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