1cba69eeeSIan Campbell /* 2cba69eeeSIan Campbell * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3cba69eeeSIan Campbell * 4cba69eeeSIan Campbell * (C) Copyright 2007-2011 5cba69eeeSIan Campbell * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6cba69eeeSIan Campbell * Tom Cubie <tangliang@allwinnertech.com> 7cba69eeeSIan Campbell * 8cba69eeeSIan Campbell * Configuration settings for the Allwinner sunxi series of boards. 9cba69eeeSIan Campbell * 10cba69eeeSIan Campbell * SPDX-License-Identifier: GPL-2.0+ 11cba69eeeSIan Campbell */ 12cba69eeeSIan Campbell 13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H 14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H 15cba69eeeSIan Campbell 16daf6d399SHans de Goede #include <asm/arch/cpu.h> 17e049fe28SHans de Goede #include <linux/stringify.h> 18e049fe28SHans de Goede 1977ef1369SSiarhei Siamashka #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 2077ef1369SSiarhei Siamashka /* 2177ef1369SSiarhei Siamashka * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the 2277ef1369SSiarhei Siamashka * expense of restricting some features, so the regular machine id values can 2377ef1369SSiarhei Siamashka * be used. 2477ef1369SSiarhei Siamashka */ 2577ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 0 2677ef1369SSiarhei Siamashka #else 2777ef1369SSiarhei Siamashka /* 2877ef1369SSiarhei Siamashka * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. 2977ef1369SSiarhei Siamashka * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass 3077ef1369SSiarhei Siamashka * beyond the machine id check. 3177ef1369SSiarhei Siamashka */ 3277ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 1 3377ef1369SSiarhei Siamashka #endif 3477ef1369SSiarhei Siamashka 35cba69eeeSIan Campbell /* 36cba69eeeSIan Campbell * High Level Configuration Options 37cba69eeeSIan Campbell */ 38cba69eeeSIan Campbell #define CONFIG_SUNXI /* sunxi family */ 3950827a59SIan Campbell #ifdef CONFIG_SPL_BUILD 4050827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 4150827a59SIan Campbell #endif 42cba69eeeSIan Campbell 43cba69eeeSIan Campbell /* Serial & console */ 44cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL 45cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */ 46cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK 24000000 474fb60552SThomas Chou #ifndef CONFIG_DM_SERIAL 481a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE -4 49cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 50cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 51cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 52cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 53c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 541a81cf83SSimon Glass #endif 55cba69eeeSIan Campbell 568a65f69cSPaul Kocialkowski /* CPU */ 57daf6d399SHans de Goede #define CONFIG_DISPLAY_CPUINFO 588a65f69cSPaul Kocialkowski #define CONFIG_SYS_CACHELINE_SIZE 64 59d96ebc46SSiarhei Siamashka #define CONFIG_TIMER_CLK_FREQ 24000000 608a65f69cSPaul Kocialkowski 61e049fe28SHans de Goede /* 62e049fe28SHans de Goede * The DRAM Base differs between some models. We cannot use macros for the 63e049fe28SHans de Goede * CONFIG_FOO defines which contain the DRAM base address since they end 64e049fe28SHans de Goede * up unexpanded in include/autoconf.mk . 65e049fe28SHans de Goede * 66e049fe28SHans de Goede * So we have to have this #ifdef #else #endif block for these. 67e049fe28SHans de Goede */ 68e049fe28SHans de Goede #ifdef CONFIG_MACH_SUN9I 69e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x2##x 70e049fe28SHans de Goede #define CONFIG_SYS_SDRAM_BASE 0x20000000 71e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ 72e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE 0x2a000000 73e049fe28SHans de Goede #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 74ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 75ff42d107SHans de Goede * since it needs to fit in with the other values. By also #defining it 76ff42d107SHans de Goede * we get warnings if the Kconfig value mismatches. */ 77ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000 78e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 79e049fe28SHans de Goede #else 80e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x4##x 81cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE 0x40000000 82e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 83e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE 0x4a000000 84e049fe28SHans de Goede #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 85ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 86ff42d107SHans de Goede * since it needs to fit in with the other values. By also #defining it 87ff42d107SHans de Goede * we get warnings if the Kconfig value mismatches. */ 88ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000 89e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 90e049fe28SHans de Goede #endif 91e049fe28SHans de Goede 92e049fe28SHans de Goede #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ 93e049fe28SHans de Goede 94d96ebc46SSiarhei Siamashka #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) 9577fe9887SHans de Goede /* 9677fe9887SHans de Goede * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is 9777fe9887SHans de Goede * slightly bigger. Note that it is possible to map the first 32 KiB of the 9877fe9887SHans de Goede * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the 9977fe9887SHans de Goede * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and 10077fe9887SHans de Goede * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. 10177fe9887SHans de Goede */ 10277fe9887SHans de Goede #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 1031a83fb4aSSiarhei Siamashka #define CONFIG_SYS_INIT_RAM_SIZE 0xA000 /* 40 KiB */ 10477fe9887SHans de Goede #else 105cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR 0x0 106cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 10777fe9887SHans de Goede #endif 108cba69eeeSIan Campbell 109cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \ 110cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 111cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \ 112cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 113cba69eeeSIan Campbell 114cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS 1 115cba69eeeSIan Campbell #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 116cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 117cba69eeeSIan Campbell 118a6e50a88SIan Campbell #ifdef CONFIG_AHCI 119a6e50a88SIan Campbell #define CONFIG_LIBATA 120a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI 121a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT 122a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI 1230751b138SBernhard Nortmann #define CONFIG_SYS_64BIT_LBA 124a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 125a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN 1 126a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 127a6e50a88SIan Campbell CONFIG_SYS_SCSI_MAX_LUN) 128c649e3c9SSimon Glass #define CONFIG_SCSI 129a6e50a88SIan Campbell #endif 130a6e50a88SIan Campbell 131cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS 132cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG 133cba69eeeSIan Campbell #define CONFIG_INITRD_TAG 1349f852211SPaul Kocialkowski #define CONFIG_SERIAL_TAG 135cba69eeeSIan Campbell 136e5268616SHans de Goede #ifdef CONFIG_NAND_SUNXI 137*a0dfa88bSBoris Brezillon #define CONFIG_SYS_NAND_MAX_ECCPOS 1664 13821d4d37aSHans de Goede #define CONFIG_SPL_NAND_SUPPORT 1 1394ccae81cSBoris Brezillon #define CONFIG_SYS_NAND_ONFI_DETECTION 1404ccae81cSBoris Brezillon #define CONFIG_SYS_MAX_NAND_DEVICE 8 141960caebaSPiotr Zierhoffer #endif 142960caebaSPiotr Zierhoffer 14319e99fb4SSiarhei Siamashka #ifdef CONFIG_SPL_SPI_SUNXI 14419e99fb4SSiarhei Siamashka #define CONFIG_SPL_SPI_FLASH_SUPPORT 1 14519e99fb4SSiarhei Siamashka #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 14619e99fb4SSiarhei Siamashka #endif 14719e99fb4SSiarhei Siamashka 148e24ea55cSIan Campbell /* mmc config */ 14944c79879SMaxime Ripard #ifdef CONFIG_MMC 150e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC 151e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI 152e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT 0 153e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC 154e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 155ff2b47f6SChen-Yu Tsai #endif 156e24ea55cSIan Campbell 1575c965ed9SHans de Goede /* 64MB of malloc() pool */ 1585c965ed9SHans de Goede #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20)) 159cba69eeeSIan Campbell 160cba69eeeSIan Campbell /* 161cba69eeeSIan Campbell * Miscellaneous configurable options 162cba69eeeSIan Campbell */ 16306beadb0SIan Campbell #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 16406beadb0SIan Campbell #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 165cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 166cba69eeeSIan Campbell 167cba69eeeSIan Campbell /* Boot Argument Buffer Size */ 168cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 169cba69eeeSIan Campbell 170cba69eeeSIan Campbell /* standalone support */ 171e049fe28SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR 172cba69eeeSIan Campbell 173cba69eeeSIan Campbell /* baudrate */ 174cba69eeeSIan Campbell #define CONFIG_BAUDRATE 115200 175cba69eeeSIan Campbell 176cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */ 177cba69eeeSIan Campbell #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 178cba69eeeSIan Campbell 179cba69eeeSIan Campbell /* FLASH and environment organization */ 180cba69eeeSIan Campbell 181cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH 182cba69eeeSIan Campbell 183fa5e1020SBoris Brezillon #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ 184cba69eeeSIan Campbell #define CONFIG_IDENT_STRING " Allwinner Technology" 1852af25b74SSimon Glass #define CONFIG_DISPLAY_BOARDINFO 186cba69eeeSIan Campbell 187e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 188cba69eeeSIan Campbell #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 189cba69eeeSIan Campbell 190cba69eeeSIan Campbell #define CONFIG_FAT_WRITE /* enable write access */ 191cba69eeeSIan Campbell 192cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK 193cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT 194cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT 195cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT 196cba69eeeSIan Campbell 197942cb0b6SSimon Glass #define CONFIG_SPL_BOARD_LOAD_IMAGE 198942cb0b6SSimon Glass 199d96ebc46SSiarhei Siamashka #if defined(CONFIG_MACH_SUN9I) 200b19236fdSSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ 201b19236fdSSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE 0x5fc0 /* ? KiB on sun9i */ 202d96ebc46SSiarhei Siamashka #elif defined(CONFIG_MACH_SUN50I) 203b19236fdSSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ 204b19236fdSSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB on sun50i */ 205d96ebc46SSiarhei Siamashka #else 206b19236fdSSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */ 207b19236fdSSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */ 208d96ebc46SSiarhei Siamashka #endif 20950827a59SIan Campbell 21050827a59SIan Campbell #define CONFIG_SPL_LIBDISK_SUPPORT 211f0ce28e9SSiarhei Siamashka 21244c79879SMaxime Ripard #ifdef CONFIG_MMC 21350827a59SIan Campbell #define CONFIG_SPL_MMC_SUPPORT 214f0ce28e9SSiarhei Siamashka #endif 21550827a59SIan Campbell 216d96ebc46SSiarhei Siamashka #ifndef CONFIG_ARM64 21750827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 218d96ebc46SSiarhei Siamashka #endif 21950827a59SIan Campbell 22050827a59SIan Campbell #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 22150827a59SIan Campbell #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 22250827a59SIan Campbell 223d96ebc46SSiarhei Siamashka #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I) 2241a83fb4aSSiarhei Siamashka #define LOW_LEVEL_SRAM_STACK 0x0001A000 225d96ebc46SSiarhei Siamashka #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 226d96ebc46SSiarhei Siamashka #else 227cba69eeeSIan Campbell /* end of 32 KiB in sram */ 228cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 229cba69eeeSIan Campbell #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 230d96ebc46SSiarhei Siamashka #endif 231cba69eeeSIan Campbell 2326620377eSHans de Goede /* I2C */ 2330d8382aeSJelle van der Waa #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ 2340d8382aeSJelle van der Waa defined CONFIG_SY8106A_POWER 2356620377eSHans de Goede #define CONFIG_SPL_I2C_SUPPORT 236ad40610bSHans de Goede #endif 237ad40610bSHans de Goede 2386c739c5dSPaul Kocialkowski #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ 2396c739c5dSPaul Kocialkowski defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ 2409d082687SJelle van der Waa defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE 2418b2db32aSHans de Goede #define CONFIG_SYS_I2C 2426620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI 2436620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED 400000 2446620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE 0x7f 2458b2db32aSHans de Goede #endif 24655410089SHans de Goede 24755410089SHans de Goede #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) 24855410089SHans de Goede #define CONFIG_SYS_I2C_SOFT 24955410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SPEED 50000 25055410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 25155410089SHans de Goede /* We use pin names in Kconfig and sunxi_name_to_gpio() */ 25255410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda 25355410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl 25455410089SHans de Goede #ifndef __ASSEMBLY__ 25555410089SHans de Goede extern int soft_i2c_gpio_sda; 25655410089SHans de Goede extern int soft_i2c_gpio_scl; 25755410089SHans de Goede #endif 2581fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ 2591fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ 2601fc42018SHans de Goede #else 2611fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ 2621fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ 26355410089SHans de Goede #endif 26455410089SHans de Goede 26514bc66bdSHenrik Nordstrom /* PMU */ 26695ab8feeSvishnupatekar #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ 2670d8382aeSJelle van der Waa defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \ 2680d8382aeSJelle van der Waa defined CONFIG_SY8106A_POWER 26914bc66bdSHenrik Nordstrom #define CONFIG_SPL_POWER_SUPPORT 27014bc66bdSHenrik Nordstrom #endif 27114bc66bdSHenrik Nordstrom 272f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX 273cba69eeeSIan Campbell #define CONFIG_CONS_INDEX 1 /* UART0 */ 274f84269c5SHans de Goede #endif 275cba69eeeSIan Campbell 276a5da3c83SHans de Goede #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE 277f3133962SHans de Goede #if CONFIG_CONS_INDEX == 1 278f3133962SHans de Goede #ifdef CONFIG_MACH_SUN9I 279f3133962SHans de Goede #define OF_STDOUT_PATH "/soc/serial@07000000:115200" 280f3133962SHans de Goede #else 281f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" 282f3133962SHans de Goede #endif 283f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) 284f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" 2855cd83b11SLaurent Itti #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) 2865cd83b11SLaurent Itti #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" 287f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) 288f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" 289f3133962SHans de Goede #else 290f3133962SHans de Goede #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. 291f3133962SHans de Goede #endif 292a5da3c83SHans de Goede #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */ 293f3133962SHans de Goede 294abce2c62SIan Campbell /* GPIO */ 295abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO 296cd82113aSHans de Goede #define CONFIG_SPL_GPIO_SUPPORT 297abce2c62SIan Campbell 2987f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 2997f2c521fSLuc Verhaegen /* 3005633a296SHans de Goede * The amount of RAM to keep free at the top of RAM when relocating u-boot, 3015633a296SHans de Goede * to use as framebuffer. This must be a multiple of 4096. 3027f2c521fSLuc Verhaegen */ 3035c965ed9SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20) 3047f2c521fSLuc Verhaegen 3052d7a084bSLuc Verhaegen /* Do we want to initialize a simple FB? */ 3062d7a084bSLuc Verhaegen #define CONFIG_VIDEO_DT_SIMPLEFB 3072d7a084bSLuc Verhaegen 3087f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SUNXI 3097f2c521fSLuc Verhaegen 3107f2c521fSLuc Verhaegen #define CONFIG_CFB_CONSOLE 3117f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SW_CURSOR 3127f2c521fSLuc Verhaegen #define CONFIG_VIDEO_LOGO 313be8ec633SHans de Goede #define CONFIG_VIDEO_STD_TIMINGS 31475481607SHans de Goede #define CONFIG_I2C_EDID 31558332f89SHans de Goede #define VIDEO_LINE_LEN (pGD->plnSizeX) 3167f2c521fSLuc Verhaegen 3177f2c521fSLuc Verhaegen /* allow both serial and cfb console. */ 3187f2c521fSLuc Verhaegen #define CONFIG_CONSOLE_MUX 3197f2c521fSLuc Verhaegen /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ 3207f2c521fSLuc Verhaegen #define CONFIG_VGA_AS_SINGLE_DEVICE 3217f2c521fSLuc Verhaegen 3227f2c521fSLuc Verhaegen #endif /* CONFIG_VIDEO */ 3237f2c521fSLuc Verhaegen 324c26fb9dbSHans de Goede /* Ethernet support */ 325c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC 3268145dea4SHans de Goede #define CONFIG_PHY_ADDR 1 327c26fb9dbSHans de Goede #define CONFIG_MII /* MII PHY management */ 3288145dea4SHans de Goede #define CONFIG_PHYLIB 329c26fb9dbSHans de Goede #endif 330c26fb9dbSHans de Goede 3315835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC 3325835823dSIan Campbell #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 3335835823dSIan Campbell #define CONFIG_PHY_ADDR 1 3345835823dSIan Campbell #define CONFIG_MII /* MII PHY management */ 3351eae8f66SHans de Goede #define CONFIG_PHY_REALTEK 3365835823dSIan Campbell #endif 3375835823dSIan Campbell 3382582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_EHCI_HCD 3396a72e804SHans de Goede #define CONFIG_USB_OHCI_NEW 3406a72e804SHans de Goede #define CONFIG_USB_OHCI_SUNXI 3416a72e804SHans de Goede #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 3423584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 3431a800f7aSHans de Goede #endif 3441a800f7aSHans de Goede 3451a800f7aSHans de Goede #ifdef CONFIG_USB_MUSB_SUNXI 34695de1e2fSPaul Kocialkowski #define CONFIG_USB_MUSB_PIO_ONLY 3471a800f7aSHans de Goede #endif 3481a800f7aSHans de Goede 349b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_MUSB_GADGET 350aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_DFU 351aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_FASTBOOT 352aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_MASS_STORAGE 353b21144ebSPaul Kocialkowski #endif 354b21144ebSPaul Kocialkowski 3552a909c5fSSiarhei Siamashka #ifdef CONFIG_USB_FUNCTION_DFU 3562a909c5fSSiarhei Siamashka #define CONFIG_DFU_RAM 3572a909c5fSSiarhei Siamashka #endif 3582a909c5fSSiarhei Siamashka 359b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_FASTBOOT 360b21144ebSPaul Kocialkowski #define CONFIG_CMD_FASTBOOT 361b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 362b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000 363bac83fb0SMaxime Ripard #define CONFIG_ANDROID_BOOT_IMAGE 364b21144ebSPaul Kocialkowski 365b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH 36644c79879SMaxime Ripard 36744c79879SMaxime Ripard #ifdef CONFIG_MMC 368b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 369b21144ebSPaul Kocialkowski #define CONFIG_EFI_PARTITION 370b21144ebSPaul Kocialkowski #endif 37144c79879SMaxime Ripard #endif 372b21144ebSPaul Kocialkowski 373b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE 374b21144ebSPaul Kocialkowski #endif 375b21144ebSPaul Kocialkowski 37686b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 37786b49093SHans de Goede #define CONFIG_CONSOLE_MUX 37886b49093SHans de Goede #define CONFIG_PREBOOT 37986b49093SHans de Goede #define CONFIG_SYS_STDIO_DEREGISTER 380eab9433aSHans de Goede #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 38186b49093SHans de Goede #endif 38286b49093SHans de Goede 383cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \ 384cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_NAND && \ 385cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_FAT && \ 386cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_SPI_FLASH 387cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE 388cba69eeeSIan Campbell #endif 389cba69eeeSIan Campbell 390b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R 3917f2c521fSLuc Verhaegen #define CONFIG_SYS_CONSOLE_IS_IN_ENV 392b41d7d05SJonathan Liu 393cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD 394cba69eeeSIan Campbell #include <config_distro_defaults.h> 3952ec3a612SHans de Goede 396a7925078SSiarhei Siamashka /* Enable pre-console buffer to get complete log on the VGA console */ 397a7925078SSiarhei Siamashka #define CONFIG_PRE_CONSOLE_BUFFER 398a8552c7cSHans de Goede #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ 399a7925078SSiarhei Siamashka 400671f9ad8SAndre Przywara #ifdef CONFIG_ARM64 401671f9ad8SAndre Przywara /* 402671f9ad8SAndre Przywara * Boards seem to come with at least 512MB of DRAM. 403671f9ad8SAndre Przywara * The kernel should go at 512K, which is the default text offset (that will 404671f9ad8SAndre Przywara * be adjusted at runtime if needed). 405671f9ad8SAndre Przywara * There is no compression for arm64 kernels (yet), so leave some space 406671f9ad8SAndre Przywara * for really big kernels, say 256MB for now. 407671f9ad8SAndre Przywara * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd. 408671f9ad8SAndre Przywara * Align the initrd to a 2MB page. 409671f9ad8SAndre Przywara */ 410671f9ad8SAndre Przywara #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) 411671f9ad8SAndre Przywara #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) 412671f9ad8SAndre Przywara #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) 413671f9ad8SAndre Przywara #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000)) 414671f9ad8SAndre Przywara #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000)) 415671f9ad8SAndre Przywara 416671f9ad8SAndre Przywara #else 4178c95c556SHans de Goede /* 4185c965ed9SHans de Goede * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. 4198c95c556SHans de Goede * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 4208c95c556SHans de Goede * 1M script, 1M pxe and the ramdisk at the end. 4218c95c556SHans de Goede */ 4222a909c5fSSiarhei Siamashka 4232a909c5fSSiarhei Siamashka #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) 4242a909c5fSSiarhei Siamashka #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) 4252a909c5fSSiarhei Siamashka #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) 4262a909c5fSSiarhei Siamashka #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) 4272a909c5fSSiarhei Siamashka #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000)) 428671f9ad8SAndre Przywara #endif 4292a909c5fSSiarhei Siamashka 430846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \ 4315c965ed9SHans de Goede "bootm_size=0xa000000\0" \ 4322a909c5fSSiarhei Siamashka "kernel_addr_r=" KERNEL_ADDR_R "\0" \ 4332a909c5fSSiarhei Siamashka "fdt_addr_r=" FDT_ADDR_R "\0" \ 4342a909c5fSSiarhei Siamashka "scriptaddr=" SCRIPT_ADDR_R "\0" \ 4352a909c5fSSiarhei Siamashka "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ 4362a909c5fSSiarhei Siamashka "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" 4372a909c5fSSiarhei Siamashka 4382a909c5fSSiarhei Siamashka #define DFU_ALT_INFO_RAM \ 4392a909c5fSSiarhei Siamashka "dfu_alt_info_ram=" \ 4402a909c5fSSiarhei Siamashka "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ 4412a909c5fSSiarhei Siamashka "fdt ram " FDT_ADDR_R " 0x100000;" \ 4422a909c5fSSiarhei Siamashka "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0" 443846e3254SHans de Goede 44441f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC 44541f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 4465a37a400SKarsten Merker #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 4475a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1) 4485a37a400SKarsten Merker #else 4495a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) 4505a37a400SKarsten Merker #endif 45141f8e9f5SChen-Yu Tsai #else 45241f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) 4535a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) 45441f8e9f5SChen-Yu Tsai #endif 45541f8e9f5SChen-Yu Tsai 4562ec3a612SHans de Goede #ifdef CONFIG_AHCI 4572ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 4582ec3a612SHans de Goede #else 4592ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) 4602ec3a612SHans de Goede #endif 4612ec3a612SHans de Goede 4622582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_STORAGE 463859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 464859b3f14SChen-Yu Tsai #else 465859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) 466859b3f14SChen-Yu Tsai #endif 467859b3f14SChen-Yu Tsai 468f3b589c0SBernhard Nortmann /* FEL boot support, auto-execute boot.scr if a script address was provided */ 469f3b589c0SBernhard Nortmann #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \ 470f3b589c0SBernhard Nortmann "bootcmd_fel=" \ 471f3b589c0SBernhard Nortmann "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \ 472f3b589c0SBernhard Nortmann "echo '(FEL boot)'; " \ 473f3b589c0SBernhard Nortmann "source ${fel_scriptaddr}; " \ 474f3b589c0SBernhard Nortmann "fi\0" 475f3b589c0SBernhard Nortmann #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \ 476f3b589c0SBernhard Nortmann "fel " 477f3b589c0SBernhard Nortmann 4782ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \ 479f3b589c0SBernhard Nortmann func(FEL, fel, na) \ 48041f8e9f5SChen-Yu Tsai BOOT_TARGET_DEVICES_MMC(func) \ 4815a37a400SKarsten Merker BOOT_TARGET_DEVICES_MMC_EXTRA(func) \ 4822ec3a612SHans de Goede BOOT_TARGET_DEVICES_SCSI(func) \ 483859b3f14SChen-Yu Tsai BOOT_TARGET_DEVICES_USB(func) \ 4842ec3a612SHans de Goede func(PXE, pxe, na) \ 4852ec3a612SHans de Goede func(DHCP, dhcp, na) 4862ec3a612SHans de Goede 4873b824025SHans de Goede #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 4883b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT \ 4893b824025SHans de Goede "bootcmd_sunxi_compat=" \ 4903b824025SHans de Goede "setenv root /dev/mmcblk0p3 rootwait; " \ 4913b824025SHans de Goede "if ext2load mmc 0 0x44000000 uEnv.txt; then " \ 4923b824025SHans de Goede "echo Loaded environment from uEnv.txt; " \ 4933b824025SHans de Goede "env import -t 0x44000000 ${filesize}; " \ 4943b824025SHans de Goede "fi; " \ 4953b824025SHans de Goede "setenv bootargs console=${console} root=${root} ${extraargs}; " \ 4963b824025SHans de Goede "ext2load mmc 0 0x43000000 script.bin && " \ 4973b824025SHans de Goede "ext2load mmc 0 0x48000000 uImage && " \ 4983b824025SHans de Goede "bootm 0x48000000\0" 4993b824025SHans de Goede #else 5003b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT 5013b824025SHans de Goede #endif 5023b824025SHans de Goede 5032ec3a612SHans de Goede #include <config_distro_bootcmd.h> 5042ec3a612SHans de Goede 50586b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 50686b49093SHans de Goede #define CONSOLE_STDIN_SETTINGS \ 50786b49093SHans de Goede "preboot=usb start\0" \ 50886b49093SHans de Goede "stdin=serial,usbkbd\0" 50986b49093SHans de Goede #else 5107f2c521fSLuc Verhaegen #define CONSOLE_STDIN_SETTINGS \ 5117f2c521fSLuc Verhaegen "stdin=serial\0" 51286b49093SHans de Goede #endif 5137f2c521fSLuc Verhaegen 5147f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 5157f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 5167f2c521fSLuc Verhaegen "stdout=serial,vga\0" \ 5177f2c521fSLuc Verhaegen "stderr=serial,vga\0" 5187f2c521fSLuc Verhaegen #else 5197f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 5207f2c521fSLuc Verhaegen "stdout=serial\0" \ 5217f2c521fSLuc Verhaegen "stderr=serial\0" 5227f2c521fSLuc Verhaegen #endif 5237f2c521fSLuc Verhaegen 5247f2c521fSLuc Verhaegen #define CONSOLE_ENV_SETTINGS \ 5257f2c521fSLuc Verhaegen CONSOLE_STDIN_SETTINGS \ 5267f2c521fSLuc Verhaegen CONSOLE_STDOUT_SETTINGS 5277f2c521fSLuc Verhaegen 5282ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \ 5297f2c521fSLuc Verhaegen CONSOLE_ENV_SETTINGS \ 530846e3254SHans de Goede MEM_LAYOUT_ENV_SETTINGS \ 5312a909c5fSSiarhei Siamashka DFU_ALT_INFO_RAM \ 53225acd33fSHans de Goede "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ 533846e3254SHans de Goede "console=ttyS0,115200\0" \ 5343b824025SHans de Goede BOOTCMD_SUNXI_COMPAT \ 5352ec3a612SHans de Goede BOOTENV 5362ec3a612SHans de Goede 5372ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */ 5382ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS 539cba69eeeSIan Campbell #endif 540cba69eeeSIan Campbell 541cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */ 542