1cba69eeeSIan Campbell /* 2cba69eeeSIan Campbell * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3cba69eeeSIan Campbell * 4cba69eeeSIan Campbell * (C) Copyright 2007-2011 5cba69eeeSIan Campbell * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6cba69eeeSIan Campbell * Tom Cubie <tangliang@allwinnertech.com> 7cba69eeeSIan Campbell * 8cba69eeeSIan Campbell * Configuration settings for the Allwinner sunxi series of boards. 9cba69eeeSIan Campbell * 10cba69eeeSIan Campbell * SPDX-License-Identifier: GPL-2.0+ 11cba69eeeSIan Campbell */ 12cba69eeeSIan Campbell 13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H 14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H 15cba69eeeSIan Campbell 1677ef1369SSiarhei Siamashka #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 1777ef1369SSiarhei Siamashka /* 1877ef1369SSiarhei Siamashka * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the 1977ef1369SSiarhei Siamashka * expense of restricting some features, so the regular machine id values can 2077ef1369SSiarhei Siamashka * be used. 2177ef1369SSiarhei Siamashka */ 2277ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 0 2377ef1369SSiarhei Siamashka #else 2477ef1369SSiarhei Siamashka /* 2577ef1369SSiarhei Siamashka * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. 2677ef1369SSiarhei Siamashka * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass 2777ef1369SSiarhei Siamashka * beyond the machine id check. 2877ef1369SSiarhei Siamashka */ 2977ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 1 3077ef1369SSiarhei Siamashka #endif 3177ef1369SSiarhei Siamashka 32cba69eeeSIan Campbell /* 33cba69eeeSIan Campbell * High Level Configuration Options 34cba69eeeSIan Campbell */ 35cba69eeeSIan Campbell #define CONFIG_SUNXI /* sunxi family */ 3650827a59SIan Campbell #ifdef CONFIG_SPL_BUILD 3750827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 3850827a59SIan Campbell #endif 39cba69eeeSIan Campbell 40cba69eeeSIan Campbell #include <asm/arch/cpu.h> /* get chip and board defs */ 41cba69eeeSIan Campbell 42cba69eeeSIan Campbell #define CONFIG_SYS_TEXT_BASE 0x4a000000 43cba69eeeSIan Campbell 44b6006bafSHans de Goede #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL) 451a81cf83SSimon Glass # define CONFIG_DW_SERIAL 4657f878efSSimon Glass #endif 4757f878efSSimon Glass 48cba69eeeSIan Campbell /* 49cba69eeeSIan Campbell * Display CPU information 50cba69eeeSIan Campbell */ 51cba69eeeSIan Campbell #define CONFIG_DISPLAY_CPUINFO 52cba69eeeSIan Campbell 534e7c892dSIan Campbell #define CONFIG_SYS_PROMPT "sunxi# " 544e7c892dSIan Campbell 55cba69eeeSIan Campbell /* Serial & console */ 56cba69eeeSIan Campbell #define CONFIG_SYS_NS16550 57cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL 58cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */ 59cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK 24000000 601a81cf83SSimon Glass #ifndef CONFIG_DM_SERIAL 611a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE -4 62cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 63cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 64cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 65cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 66c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 671a81cf83SSimon Glass #endif 68cba69eeeSIan Campbell 69cba69eeeSIan Campbell /* DRAM Base */ 70cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE 0x40000000 71cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR 0x0 72cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 73cba69eeeSIan Campbell 74cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \ 75cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 76cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \ 77cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 78cba69eeeSIan Campbell 79cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS 1 80cba69eeeSIan Campbell #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 81cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 82cba69eeeSIan Campbell 83a6e50a88SIan Campbell #ifdef CONFIG_AHCI 84a6e50a88SIan Campbell #define CONFIG_LIBATA 85a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI 86a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT 87a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI 88a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 89a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN 1 90a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 91a6e50a88SIan Campbell CONFIG_SYS_SCSI_MAX_LUN) 92a6e50a88SIan Campbell #define CONFIG_CMD_SCSI 93a6e50a88SIan Campbell #endif 94a6e50a88SIan Campbell 95cba69eeeSIan Campbell #define CONFIG_CMD_MEMORY 96cba69eeeSIan Campbell #define CONFIG_CMD_SETEXPR 97cba69eeeSIan Campbell 98cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS 99cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG 100cba69eeeSIan Campbell #define CONFIG_INITRD_TAG 101*9f852211SPaul Kocialkowski #define CONFIG_SERIAL_TAG 102cba69eeeSIan Campbell 103e24ea55cSIan Campbell /* mmc config */ 104ff2b47f6SChen-Yu Tsai #if !defined(CONFIG_UART0_PORT_F) 105e24ea55cSIan Campbell #define CONFIG_MMC 106e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC 107e24ea55cSIan Campbell #define CONFIG_CMD_MMC 108e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI 109e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT 0 110e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC 111e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 112ff2b47f6SChen-Yu Tsai #endif 113e24ea55cSIan Campbell 114cba69eeeSIan Campbell /* 4MB of malloc() pool */ 115cba69eeeSIan Campbell #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 116cba69eeeSIan Campbell 117cba69eeeSIan Campbell /* 118cba69eeeSIan Campbell * Miscellaneous configurable options 119cba69eeeSIan Campbell */ 120cba69eeeSIan Campbell #define CONFIG_CMD_ECHO 12106beadb0SIan Campbell #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 12206beadb0SIan Campbell #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 123cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 124cba69eeeSIan Campbell #define CONFIG_SYS_GENERIC_BOARD 125cba69eeeSIan Campbell 126cba69eeeSIan Campbell /* Boot Argument Buffer Size */ 127cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 128cba69eeeSIan Campbell 129846e3254SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 130cba69eeeSIan Campbell 131cba69eeeSIan Campbell /* standalone support */ 132846e3254SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR 0x42000000 133cba69eeeSIan Campbell 134cba69eeeSIan Campbell /* baudrate */ 135cba69eeeSIan Campbell #define CONFIG_BAUDRATE 115200 136cba69eeeSIan Campbell 137cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */ 138cba69eeeSIan Campbell #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 139cba69eeeSIan Campbell 140cba69eeeSIan Campbell /* FLASH and environment organization */ 141cba69eeeSIan Campbell 142cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH 143cba69eeeSIan Campbell 144cba69eeeSIan Campbell #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */ 145cba69eeeSIan Campbell #define CONFIG_IDENT_STRING " Allwinner Technology" 146cba69eeeSIan Campbell 147e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 148cba69eeeSIan Campbell #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 149cba69eeeSIan Campbell 150cba69eeeSIan Campbell #include <config_cmd_default.h> 151b9fb3b94SHans de Goede #undef CONFIG_CMD_FPGA 152cba69eeeSIan Campbell 153cba69eeeSIan Campbell #define CONFIG_FAT_WRITE /* enable write access */ 154cba69eeeSIan Campbell 155cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK 156cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT 157cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT 158cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT 159cba69eeeSIan Campbell 160942cb0b6SSimon Glass #define CONFIG_SPL_BOARD_LOAD_IMAGE 161942cb0b6SSimon Glass 16250827a59SIan Campbell #ifdef CONFIG_SPL_FEL 16350827a59SIan Campbell 164cba69eeeSIan Campbell #define CONFIG_SPL_TEXT_BASE 0x2000 165cba69eeeSIan Campbell #define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */ 16650827a59SIan Campbell 16750827a59SIan Campbell #else /* CONFIG_SPL */ 16850827a59SIan Campbell 16950827a59SIan Campbell #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 17050827a59SIan Campbell #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */ 17150827a59SIan Campbell 17250827a59SIan Campbell #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 17350827a59SIan Campbell #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 17450827a59SIan Campbell 17550827a59SIan Campbell #define CONFIG_SPL_LIBDISK_SUPPORT 176f0ce28e9SSiarhei Siamashka 177f0ce28e9SSiarhei Siamashka #if !defined(CONFIG_UART0_PORT_F) 17850827a59SIan Campbell #define CONFIG_SPL_MMC_SUPPORT 179f0ce28e9SSiarhei Siamashka #endif 18050827a59SIan Campbell 18150827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 18250827a59SIan Campbell 18350827a59SIan Campbell #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 18450827a59SIan Campbell #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 18550827a59SIan Campbell 18650827a59SIan Campbell #endif /* CONFIG_SPL */ 18750827a59SIan Campbell 188cba69eeeSIan Campbell /* end of 32 KiB in sram */ 189cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 190cba69eeeSIan Campbell #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 191cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 192cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 193cba69eeeSIan Campbell 1946620377eSHans de Goede /* I2C */ 195ad40610bSHans de Goede #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER 1966620377eSHans de Goede #define CONFIG_SPL_I2C_SUPPORT 197ad40610bSHans de Goede #endif 198ad40610bSHans de Goede 1996c739c5dSPaul Kocialkowski #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ 2006c739c5dSPaul Kocialkowski defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ 2016c739c5dSPaul Kocialkowski defined CONFIG_I2C4_ENABLE 2028b2db32aSHans de Goede #define CONFIG_SYS_I2C 2036620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI 2046620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED 400000 2056620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE 0x7f 2068b2db32aSHans de Goede #define CONFIG_CMD_I2C 2078b2db32aSHans de Goede #endif 20855410089SHans de Goede 20955410089SHans de Goede #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) 21055410089SHans de Goede #define CONFIG_SYS_I2C_SOFT 21155410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SPEED 50000 21255410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 21355410089SHans de Goede /* We use pin names in Kconfig and sunxi_name_to_gpio() */ 21455410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda 21555410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl 21655410089SHans de Goede #ifndef __ASSEMBLY__ 21755410089SHans de Goede extern int soft_i2c_gpio_sda; 21855410089SHans de Goede extern int soft_i2c_gpio_scl; 21955410089SHans de Goede #endif 2201fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ 2211fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ 2221fc42018SHans de Goede #else 2231fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ 2241fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ 22555410089SHans de Goede #endif 22655410089SHans de Goede 22714bc66bdSHenrik Nordstrom /* PMU */ 22814bc66bdSHenrik Nordstrom #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER 22914bc66bdSHenrik Nordstrom #define CONFIG_SPL_POWER_SUPPORT 23014bc66bdSHenrik Nordstrom #endif 23114bc66bdSHenrik Nordstrom 232f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX 233cba69eeeSIan Campbell #define CONFIG_CONS_INDEX 1 /* UART0 */ 234f84269c5SHans de Goede #endif 235cba69eeeSIan Campbell 236f3133962SHans de Goede #if CONFIG_CONS_INDEX == 1 237f3133962SHans de Goede #ifdef CONFIG_MACH_SUN9I 238f3133962SHans de Goede #define OF_STDOUT_PATH "/soc/serial@07000000:115200" 239f3133962SHans de Goede #else 240f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" 241f3133962SHans de Goede #endif 242f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) 243f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" 244f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) 245f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" 246f3133962SHans de Goede #else 247f3133962SHans de Goede #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. 248f3133962SHans de Goede #endif 249f3133962SHans de Goede 250abce2c62SIan Campbell /* GPIO */ 251abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO 252cd82113aSHans de Goede #define CONFIG_SPL_GPIO_SUPPORT 253abce2c62SIan Campbell #define CONFIG_CMD_GPIO 254abce2c62SIan Campbell 2557f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 2567f2c521fSLuc Verhaegen /* 2575633a296SHans de Goede * The amount of RAM to keep free at the top of RAM when relocating u-boot, 2585633a296SHans de Goede * to use as framebuffer. This must be a multiple of 4096. 2597f2c521fSLuc Verhaegen */ 2605633a296SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20) 2617f2c521fSLuc Verhaegen 2622d7a084bSLuc Verhaegen /* Do we want to initialize a simple FB? */ 2632d7a084bSLuc Verhaegen #define CONFIG_VIDEO_DT_SIMPLEFB 2642d7a084bSLuc Verhaegen 2657f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SUNXI 2667f2c521fSLuc Verhaegen 2677f2c521fSLuc Verhaegen #define CONFIG_CFB_CONSOLE 2687f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SW_CURSOR 2697f2c521fSLuc Verhaegen #define CONFIG_VIDEO_LOGO 270be8ec633SHans de Goede #define CONFIG_VIDEO_STD_TIMINGS 27175481607SHans de Goede #define CONFIG_I2C_EDID 2727f2c521fSLuc Verhaegen 2737f2c521fSLuc Verhaegen /* allow both serial and cfb console. */ 2747f2c521fSLuc Verhaegen #define CONFIG_CONSOLE_MUX 2757f2c521fSLuc Verhaegen /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ 2767f2c521fSLuc Verhaegen #define CONFIG_VGA_AS_SINGLE_DEVICE 2777f2c521fSLuc Verhaegen 2782d7a084bSLuc Verhaegen /* To be able to hook simplefb into dt */ 2792d7a084bSLuc Verhaegen #ifdef CONFIG_VIDEO_DT_SIMPLEFB 2802d7a084bSLuc Verhaegen #define CONFIG_OF_BOARD_SETUP 2812d7a084bSLuc Verhaegen #endif 2822d7a084bSLuc Verhaegen 2837f2c521fSLuc Verhaegen #endif /* CONFIG_VIDEO */ 2847f2c521fSLuc Verhaegen 285c26fb9dbSHans de Goede /* Ethernet support */ 286c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC 2878145dea4SHans de Goede #define CONFIG_PHY_ADDR 1 288c26fb9dbSHans de Goede #define CONFIG_MII /* MII PHY management */ 2898145dea4SHans de Goede #define CONFIG_PHYLIB 290c26fb9dbSHans de Goede #endif 291c26fb9dbSHans de Goede 2925835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC 2935835823dSIan Campbell #define CONFIG_DW_AUTONEG 2945835823dSIan Campbell #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 2955835823dSIan Campbell #define CONFIG_PHY_ADDR 1 2965835823dSIan Campbell #define CONFIG_MII /* MII PHY management */ 2975835823dSIan Campbell #define CONFIG_PHYLIB 2985835823dSIan Campbell #endif 2995835823dSIan Campbell 3003584f30cSRoman Byshko #ifdef CONFIG_USB_EHCI 3016a72e804SHans de Goede #define CONFIG_USB_OHCI_NEW 3026a72e804SHans de Goede #define CONFIG_USB_OHCI_SUNXI 3036a72e804SHans de Goede #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 3043584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 3051a800f7aSHans de Goede #endif 3061a800f7aSHans de Goede 3071a800f7aSHans de Goede #ifdef CONFIG_USB_MUSB_SUNXI 3081a800f7aSHans de Goede #define CONFIG_MUSB_HOST 3091a800f7aSHans de Goede #define CONFIG_MUSB_PIO_ONLY 3101a800f7aSHans de Goede #endif 3111a800f7aSHans de Goede 3121a800f7aSHans de Goede #if defined CONFIG_USB_EHCI || defined CONFIG_USB_MUSB_SUNXI 3131a800f7aSHans de Goede #define CONFIG_CMD_USB 3143584f30cSRoman Byshko #define CONFIG_USB_STORAGE 3153584f30cSRoman Byshko #endif 3163584f30cSRoman Byshko 31786b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 31886b49093SHans de Goede #define CONFIG_CONSOLE_MUX 31986b49093SHans de Goede #define CONFIG_PREBOOT 32086b49093SHans de Goede #define CONFIG_SYS_STDIO_DEREGISTER 321eab9433aSHans de Goede #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 32286b49093SHans de Goede #endif 32386b49093SHans de Goede 324cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \ 325cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_NAND && \ 326cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_FAT && \ 327cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_SPI_FLASH 328cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE 329cba69eeeSIan Campbell #endif 330cba69eeeSIan Campbell 331b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R 3327f2c521fSLuc Verhaegen #define CONFIG_SYS_CONSOLE_IS_IN_ENV 333b41d7d05SJonathan Liu 334cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD 335cba69eeeSIan Campbell #include <config_distro_defaults.h> 3362ec3a612SHans de Goede 337a7925078SSiarhei Siamashka /* Enable pre-console buffer to get complete log on the VGA console */ 338a7925078SSiarhei Siamashka #define CONFIG_PRE_CONSOLE_BUFFER 339a7925078SSiarhei Siamashka #define CONFIG_PRE_CON_BUF_SZ (1024 * 1024) 340a7925078SSiarhei Siamashka /* Use the room between the end of bootm_size and the framebuffer */ 341a7925078SSiarhei Siamashka #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 342a7925078SSiarhei Siamashka 3438c95c556SHans de Goede /* 3448c95c556SHans de Goede * 240M RAM (256M minimum minus space for the framebuffer), 3458c95c556SHans de Goede * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 3468c95c556SHans de Goede * 1M script, 1M pxe and the ramdisk at the end. 3478c95c556SHans de Goede */ 348846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \ 3498c95c556SHans de Goede "bootm_size=0xf000000\0" \ 350846e3254SHans de Goede "kernel_addr_r=0x42000000\0" \ 351846e3254SHans de Goede "fdt_addr_r=0x43000000\0" \ 352846e3254SHans de Goede "scriptaddr=0x43100000\0" \ 353846e3254SHans de Goede "pxefile_addr_r=0x43200000\0" \ 354846e3254SHans de Goede "ramdisk_addr_r=0x43300000\0" 355846e3254SHans de Goede 35641f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC 35741f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 35841f8e9f5SChen-Yu Tsai #else 35941f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) 36041f8e9f5SChen-Yu Tsai #endif 36141f8e9f5SChen-Yu Tsai 3622ec3a612SHans de Goede #ifdef CONFIG_AHCI 3632ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 3642ec3a612SHans de Goede #else 3652ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) 3662ec3a612SHans de Goede #endif 3672ec3a612SHans de Goede 368859b3f14SChen-Yu Tsai #ifdef CONFIG_USB_EHCI 369859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 370859b3f14SChen-Yu Tsai #else 371859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) 372859b3f14SChen-Yu Tsai #endif 373859b3f14SChen-Yu Tsai 3742ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \ 37541f8e9f5SChen-Yu Tsai BOOT_TARGET_DEVICES_MMC(func) \ 3762ec3a612SHans de Goede BOOT_TARGET_DEVICES_SCSI(func) \ 377859b3f14SChen-Yu Tsai BOOT_TARGET_DEVICES_USB(func) \ 3782ec3a612SHans de Goede func(PXE, pxe, na) \ 3792ec3a612SHans de Goede func(DHCP, dhcp, na) 3802ec3a612SHans de Goede 3812ec3a612SHans de Goede #include <config_distro_bootcmd.h> 3822ec3a612SHans de Goede 38386b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 38486b49093SHans de Goede #define CONSOLE_STDIN_SETTINGS \ 38586b49093SHans de Goede "preboot=usb start\0" \ 38686b49093SHans de Goede "stdin=serial,usbkbd\0" 38786b49093SHans de Goede #else 3887f2c521fSLuc Verhaegen #define CONSOLE_STDIN_SETTINGS \ 3897f2c521fSLuc Verhaegen "stdin=serial\0" 39086b49093SHans de Goede #endif 3917f2c521fSLuc Verhaegen 3927f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 3937f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 3947f2c521fSLuc Verhaegen "stdout=serial,vga\0" \ 3957f2c521fSLuc Verhaegen "stderr=serial,vga\0" 3967f2c521fSLuc Verhaegen #else 3977f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 3987f2c521fSLuc Verhaegen "stdout=serial\0" \ 3997f2c521fSLuc Verhaegen "stderr=serial\0" 4007f2c521fSLuc Verhaegen #endif 4017f2c521fSLuc Verhaegen 4027f2c521fSLuc Verhaegen #define CONSOLE_ENV_SETTINGS \ 4037f2c521fSLuc Verhaegen CONSOLE_STDIN_SETTINGS \ 4047f2c521fSLuc Verhaegen CONSOLE_STDOUT_SETTINGS 4057f2c521fSLuc Verhaegen 4062ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \ 4077f2c521fSLuc Verhaegen CONSOLE_ENV_SETTINGS \ 408846e3254SHans de Goede MEM_LAYOUT_ENV_SETTINGS \ 40925acd33fSHans de Goede "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ 410846e3254SHans de Goede "console=ttyS0,115200\0" \ 4112ec3a612SHans de Goede BOOTENV 4122ec3a612SHans de Goede 4132ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */ 4142ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS 415cba69eeeSIan Campbell #endif 416cba69eeeSIan Campbell 417cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */ 418