1cba69eeeSIan Campbell /* 2cba69eeeSIan Campbell * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3cba69eeeSIan Campbell * 4cba69eeeSIan Campbell * (C) Copyright 2007-2011 5cba69eeeSIan Campbell * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6cba69eeeSIan Campbell * Tom Cubie <tangliang@allwinnertech.com> 7cba69eeeSIan Campbell * 8cba69eeeSIan Campbell * Configuration settings for the Allwinner sunxi series of boards. 9cba69eeeSIan Campbell * 10cba69eeeSIan Campbell * SPDX-License-Identifier: GPL-2.0+ 11cba69eeeSIan Campbell */ 12cba69eeeSIan Campbell 13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H 14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H 15cba69eeeSIan Campbell 16cba69eeeSIan Campbell /* 17cba69eeeSIan Campbell * High Level Configuration Options 18cba69eeeSIan Campbell */ 19cba69eeeSIan Campbell #define CONFIG_SUNXI /* sunxi family */ 2050827a59SIan Campbell #ifdef CONFIG_SPL_BUILD 2150827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 2250827a59SIan Campbell #endif 23cba69eeeSIan Campbell 24cba69eeeSIan Campbell #include <asm/arch/cpu.h> /* get chip and board defs */ 25cba69eeeSIan Campbell 26cba69eeeSIan Campbell #define CONFIG_SYS_TEXT_BASE 0x4a000000 27cba69eeeSIan Campbell 2857f878efSSimon Glass #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM) 2957f878efSSimon Glass # define CONFIG_CMD_DM 307aa97485SSimon Glass # define CONFIG_DM_GPIO 311a81cf83SSimon Glass # define CONFIG_DM_SERIAL 321a81cf83SSimon Glass # define CONFIG_DW_SERIAL 331a81cf83SSimon Glass # define CONFIG_SYS_MALLOC_F_LEN (1 << 10) 3457f878efSSimon Glass #endif 3557f878efSSimon Glass 36cba69eeeSIan Campbell /* 37cba69eeeSIan Campbell * Display CPU information 38cba69eeeSIan Campbell */ 39cba69eeeSIan Campbell #define CONFIG_DISPLAY_CPUINFO 40cba69eeeSIan Campbell 414e7c892dSIan Campbell #define CONFIG_SYS_PROMPT "sunxi# " 424e7c892dSIan Campbell 43cba69eeeSIan Campbell /* Serial & console */ 44cba69eeeSIan Campbell #define CONFIG_SYS_NS16550 45cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL 46cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */ 47cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK 24000000 481a81cf83SSimon Glass #ifndef CONFIG_DM_SERIAL 491a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE -4 50cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 51cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 52cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 53cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 54c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 551a81cf83SSimon Glass #endif 56cba69eeeSIan Campbell 57cba69eeeSIan Campbell /* DRAM Base */ 58cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE 0x40000000 59cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR 0x0 60cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 61cba69eeeSIan Campbell 62cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \ 63cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 64cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \ 65cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 66cba69eeeSIan Campbell 67cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS 1 68cba69eeeSIan Campbell #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 69cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 70cba69eeeSIan Campbell 71a6e50a88SIan Campbell #ifdef CONFIG_AHCI 72a6e50a88SIan Campbell #define CONFIG_LIBATA 73a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI 74a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT 75a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI 76a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 77a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN 1 78a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 79a6e50a88SIan Campbell CONFIG_SYS_SCSI_MAX_LUN) 80a6e50a88SIan Campbell #define CONFIG_CMD_SCSI 81a6e50a88SIan Campbell #endif 82a6e50a88SIan Campbell 83cba69eeeSIan Campbell #define CONFIG_CMD_MEMORY 84cba69eeeSIan Campbell #define CONFIG_CMD_SETEXPR 85cba69eeeSIan Campbell 86bd2a4888SHans de Goede #define CONFIG_PARTITION_UUIDS 87bd2a4888SHans de Goede #define CONFIG_CMD_PART 88bd2a4888SHans de Goede 89cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS 90cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG 91cba69eeeSIan Campbell #define CONFIG_INITRD_TAG 92cba69eeeSIan Campbell 93e24ea55cSIan Campbell /* mmc config */ 94ff2b47f6SChen-Yu Tsai #if !defined(CONFIG_UART0_PORT_F) 95e24ea55cSIan Campbell #define CONFIG_MMC 96e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC 97e24ea55cSIan Campbell #define CONFIG_CMD_MMC 98e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI 99e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT 0 100e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC 101e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 102ff2b47f6SChen-Yu Tsai #endif 103e24ea55cSIan Campbell 104cba69eeeSIan Campbell /* 4MB of malloc() pool */ 105cba69eeeSIan Campbell #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 106cba69eeeSIan Campbell 107cba69eeeSIan Campbell /* 108cba69eeeSIan Campbell * Miscellaneous configurable options 109cba69eeeSIan Campbell */ 110cba69eeeSIan Campbell #define CONFIG_CMD_ECHO 11106beadb0SIan Campbell #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 11206beadb0SIan Campbell #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 113cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 114cba69eeeSIan Campbell #define CONFIG_SYS_GENERIC_BOARD 115cba69eeeSIan Campbell 116cba69eeeSIan Campbell /* Boot Argument Buffer Size */ 117cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 118cba69eeeSIan Campbell 119846e3254SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 120cba69eeeSIan Campbell 121cba69eeeSIan Campbell /* standalone support */ 122846e3254SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR 0x42000000 123cba69eeeSIan Campbell 124cba69eeeSIan Campbell /* baudrate */ 125cba69eeeSIan Campbell #define CONFIG_BAUDRATE 115200 126cba69eeeSIan Campbell 127cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */ 128cba69eeeSIan Campbell #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 129cba69eeeSIan Campbell 130cba69eeeSIan Campbell /* FLASH and environment organization */ 131cba69eeeSIan Campbell 132cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH 133cba69eeeSIan Campbell 134cba69eeeSIan Campbell #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */ 135cba69eeeSIan Campbell #define CONFIG_IDENT_STRING " Allwinner Technology" 136cba69eeeSIan Campbell 137e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 138cba69eeeSIan Campbell #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 139cba69eeeSIan Campbell 140cba69eeeSIan Campbell #include <config_cmd_default.h> 141b9fb3b94SHans de Goede #undef CONFIG_CMD_FPGA 142cba69eeeSIan Campbell 143cba69eeeSIan Campbell #define CONFIG_FAT_WRITE /* enable write access */ 144cba69eeeSIan Campbell 145cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK 146cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT 147cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT 148cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT 149cba69eeeSIan Campbell 150*942cb0b6SSimon Glass #define CONFIG_SPL_BOARD_LOAD_IMAGE 151*942cb0b6SSimon Glass 15250827a59SIan Campbell #ifdef CONFIG_SPL_FEL 15350827a59SIan Campbell 154cba69eeeSIan Campbell #define CONFIG_SPL_TEXT_BASE 0x2000 155cba69eeeSIan Campbell #define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */ 15650827a59SIan Campbell 15750827a59SIan Campbell #else /* CONFIG_SPL */ 15850827a59SIan Campbell 15950827a59SIan Campbell #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 16050827a59SIan Campbell #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */ 16150827a59SIan Campbell 16250827a59SIan Campbell #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 16350827a59SIan Campbell #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 16450827a59SIan Campbell 16550827a59SIan Campbell #define CONFIG_SPL_LIBDISK_SUPPORT 166f0ce28e9SSiarhei Siamashka 167f0ce28e9SSiarhei Siamashka #if !defined(CONFIG_UART0_PORT_F) 16850827a59SIan Campbell #define CONFIG_SPL_MMC_SUPPORT 169f0ce28e9SSiarhei Siamashka #endif 17050827a59SIan Campbell 17150827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 17250827a59SIan Campbell 17350827a59SIan Campbell #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 17450827a59SIan Campbell #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 17550827a59SIan Campbell 17650827a59SIan Campbell #endif /* CONFIG_SPL */ 17750827a59SIan Campbell 178cba69eeeSIan Campbell /* end of 32 KiB in sram */ 179cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 180cba69eeeSIan Campbell #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 181cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 182cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 183cba69eeeSIan Campbell 1846620377eSHans de Goede /* I2C */ 185ad40610bSHans de Goede #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER 1866620377eSHans de Goede #define CONFIG_SPL_I2C_SUPPORT 187ad40610bSHans de Goede #endif 188ad40610bSHans de Goede 1896620377eSHans de Goede #define CONFIG_SYS_I2C 1906620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI 1916620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED 400000 1926620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE 0x7f 1936620377eSHans de Goede #define CONFIG_CMD_I2C 1946620377eSHans de Goede 19514bc66bdSHenrik Nordstrom /* PMU */ 19614bc66bdSHenrik Nordstrom #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER 19714bc66bdSHenrik Nordstrom #define CONFIG_SPL_POWER_SUPPORT 19814bc66bdSHenrik Nordstrom #endif 19914bc66bdSHenrik Nordstrom 200f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX 201cba69eeeSIan Campbell #define CONFIG_CONS_INDEX 1 /* UART0 */ 202f84269c5SHans de Goede #endif 203cba69eeeSIan Campbell 204abce2c62SIan Campbell /* GPIO */ 205abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO 206cd82113aSHans de Goede #define CONFIG_SPL_GPIO_SUPPORT 207abce2c62SIan Campbell #define CONFIG_CMD_GPIO 208abce2c62SIan Campbell 2097f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 2107f2c521fSLuc Verhaegen /* 2115633a296SHans de Goede * The amount of RAM to keep free at the top of RAM when relocating u-boot, 2125633a296SHans de Goede * to use as framebuffer. This must be a multiple of 4096. 2137f2c521fSLuc Verhaegen */ 2145633a296SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20) 2157f2c521fSLuc Verhaegen 2162d7a084bSLuc Verhaegen /* Do we want to initialize a simple FB? */ 2172d7a084bSLuc Verhaegen #define CONFIG_VIDEO_DT_SIMPLEFB 2182d7a084bSLuc Verhaegen 2197f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SUNXI 2207f2c521fSLuc Verhaegen 2217f2c521fSLuc Verhaegen #define CONFIG_CFB_CONSOLE 2227f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SW_CURSOR 2237f2c521fSLuc Verhaegen #define CONFIG_VIDEO_LOGO 224be8ec633SHans de Goede #define CONFIG_VIDEO_STD_TIMINGS 22575481607SHans de Goede #define CONFIG_I2C_EDID 2267f2c521fSLuc Verhaegen 2277f2c521fSLuc Verhaegen /* allow both serial and cfb console. */ 2287f2c521fSLuc Verhaegen #define CONFIG_CONSOLE_MUX 2297f2c521fSLuc Verhaegen /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ 2307f2c521fSLuc Verhaegen #define CONFIG_VGA_AS_SINGLE_DEVICE 2317f2c521fSLuc Verhaegen 2322d7a084bSLuc Verhaegen /* To be able to hook simplefb into dt */ 2332d7a084bSLuc Verhaegen #ifdef CONFIG_VIDEO_DT_SIMPLEFB 2342d7a084bSLuc Verhaegen #define CONFIG_OF_BOARD_SETUP 2352d7a084bSLuc Verhaegen #endif 2362d7a084bSLuc Verhaegen 2377f2c521fSLuc Verhaegen #endif /* CONFIG_VIDEO */ 2387f2c521fSLuc Verhaegen 239c26fb9dbSHans de Goede /* Ethernet support */ 240c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC 241c26fb9dbSHans de Goede #define CONFIG_MII /* MII PHY management */ 242c26fb9dbSHans de Goede #endif 243c26fb9dbSHans de Goede 2445835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC 2455835823dSIan Campbell #define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */ 2465835823dSIan Campbell #define CONFIG_DW_AUTONEG 2475835823dSIan Campbell #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 2485835823dSIan Campbell #define CONFIG_PHY_ADDR 1 2495835823dSIan Campbell #define CONFIG_MII /* MII PHY management */ 2505835823dSIan Campbell #define CONFIG_PHYLIB 2515835823dSIan Campbell #endif 2525835823dSIan Campbell 2533584f30cSRoman Byshko #ifdef CONFIG_USB_EHCI 2543584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 2551a800f7aSHans de Goede #endif 2561a800f7aSHans de Goede 2571a800f7aSHans de Goede #ifdef CONFIG_USB_MUSB_SUNXI 2581a800f7aSHans de Goede #define CONFIG_MUSB_HOST 2591a800f7aSHans de Goede #define CONFIG_MUSB_PIO_ONLY 2601a800f7aSHans de Goede #endif 2611a800f7aSHans de Goede 2621a800f7aSHans de Goede #if defined CONFIG_USB_EHCI || defined CONFIG_USB_MUSB_SUNXI 2631a800f7aSHans de Goede #define CONFIG_CMD_USB 2643584f30cSRoman Byshko #define CONFIG_USB_STORAGE 2653584f30cSRoman Byshko #endif 2663584f30cSRoman Byshko 26786b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 26886b49093SHans de Goede #define CONFIG_CONSOLE_MUX 26986b49093SHans de Goede #define CONFIG_PREBOOT 27086b49093SHans de Goede #define CONFIG_SYS_STDIO_DEREGISTER 27186b49093SHans de Goede #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 27286b49093SHans de Goede #endif 27386b49093SHans de Goede 274cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \ 275cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_NAND && \ 276cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_FAT && \ 277cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_SPI_FLASH 278cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE 279cba69eeeSIan Campbell #endif 280cba69eeeSIan Campbell 281b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R 2827f2c521fSLuc Verhaegen #define CONFIG_SYS_CONSOLE_IS_IN_ENV 283b41d7d05SJonathan Liu 284cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD 285cba69eeeSIan Campbell #include <config_distro_defaults.h> 2862ec3a612SHans de Goede 287a7925078SSiarhei Siamashka /* Enable pre-console buffer to get complete log on the VGA console */ 288a7925078SSiarhei Siamashka #define CONFIG_PRE_CONSOLE_BUFFER 289a7925078SSiarhei Siamashka #define CONFIG_PRE_CON_BUF_SZ (1024 * 1024) 290a7925078SSiarhei Siamashka /* Use the room between the end of bootm_size and the framebuffer */ 291a7925078SSiarhei Siamashka #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 292a7925078SSiarhei Siamashka 2938c95c556SHans de Goede /* 2948c95c556SHans de Goede * 240M RAM (256M minimum minus space for the framebuffer), 2958c95c556SHans de Goede * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 2968c95c556SHans de Goede * 1M script, 1M pxe and the ramdisk at the end. 2978c95c556SHans de Goede */ 298846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \ 2998c95c556SHans de Goede "bootm_size=0xf000000\0" \ 300846e3254SHans de Goede "kernel_addr_r=0x42000000\0" \ 301846e3254SHans de Goede "fdt_addr_r=0x43000000\0" \ 302846e3254SHans de Goede "scriptaddr=0x43100000\0" \ 303846e3254SHans de Goede "pxefile_addr_r=0x43200000\0" \ 304846e3254SHans de Goede "ramdisk_addr_r=0x43300000\0" 305846e3254SHans de Goede 30641f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC 30741f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 30841f8e9f5SChen-Yu Tsai #else 30941f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) 31041f8e9f5SChen-Yu Tsai #endif 31141f8e9f5SChen-Yu Tsai 3122ec3a612SHans de Goede #ifdef CONFIG_AHCI 3132ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 3142ec3a612SHans de Goede #else 3152ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) 3162ec3a612SHans de Goede #endif 3172ec3a612SHans de Goede 318859b3f14SChen-Yu Tsai #ifdef CONFIG_USB_EHCI 319859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 320859b3f14SChen-Yu Tsai #else 321859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) 322859b3f14SChen-Yu Tsai #endif 323859b3f14SChen-Yu Tsai 3242ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \ 32541f8e9f5SChen-Yu Tsai BOOT_TARGET_DEVICES_MMC(func) \ 3262ec3a612SHans de Goede BOOT_TARGET_DEVICES_SCSI(func) \ 327859b3f14SChen-Yu Tsai BOOT_TARGET_DEVICES_USB(func) \ 3282ec3a612SHans de Goede func(PXE, pxe, na) \ 3292ec3a612SHans de Goede func(DHCP, dhcp, na) 3302ec3a612SHans de Goede 3312ec3a612SHans de Goede #include <config_distro_bootcmd.h> 3322ec3a612SHans de Goede 33386b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 33486b49093SHans de Goede #define CONSOLE_STDIN_SETTINGS \ 33586b49093SHans de Goede "preboot=usb start\0" \ 33686b49093SHans de Goede "stdin=serial,usbkbd\0" 33786b49093SHans de Goede #else 3387f2c521fSLuc Verhaegen #define CONSOLE_STDIN_SETTINGS \ 3397f2c521fSLuc Verhaegen "stdin=serial\0" 34086b49093SHans de Goede #endif 3417f2c521fSLuc Verhaegen 3427f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 3437f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 3447f2c521fSLuc Verhaegen "stdout=serial,vga\0" \ 3457f2c521fSLuc Verhaegen "stderr=serial,vga\0" 3467f2c521fSLuc Verhaegen #else 3477f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 3487f2c521fSLuc Verhaegen "stdout=serial\0" \ 3497f2c521fSLuc Verhaegen "stderr=serial\0" 3507f2c521fSLuc Verhaegen #endif 3517f2c521fSLuc Verhaegen 3527f2c521fSLuc Verhaegen #define CONSOLE_ENV_SETTINGS \ 3537f2c521fSLuc Verhaegen CONSOLE_STDIN_SETTINGS \ 3547f2c521fSLuc Verhaegen CONSOLE_STDOUT_SETTINGS 3557f2c521fSLuc Verhaegen 3562ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \ 3577f2c521fSLuc Verhaegen CONSOLE_ENV_SETTINGS \ 358846e3254SHans de Goede MEM_LAYOUT_ENV_SETTINGS \ 35998e214ddSIan Campbell "fdtfile=" CONFIG_FDTFILE "\0" \ 360846e3254SHans de Goede "console=ttyS0,115200\0" \ 3612ec3a612SHans de Goede BOOTENV 3622ec3a612SHans de Goede 3632ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */ 3642ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS 365cba69eeeSIan Campbell #endif 366cba69eeeSIan Campbell 367cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */ 368