1cba69eeeSIan Campbell /* 2cba69eeeSIan Campbell * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3cba69eeeSIan Campbell * 4cba69eeeSIan Campbell * (C) Copyright 2007-2011 5cba69eeeSIan Campbell * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6cba69eeeSIan Campbell * Tom Cubie <tangliang@allwinnertech.com> 7cba69eeeSIan Campbell * 8cba69eeeSIan Campbell * Configuration settings for the Allwinner sunxi series of boards. 9cba69eeeSIan Campbell * 10cba69eeeSIan Campbell * SPDX-License-Identifier: GPL-2.0+ 11cba69eeeSIan Campbell */ 12cba69eeeSIan Campbell 13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H 14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H 15cba69eeeSIan Campbell 16cba69eeeSIan Campbell /* 17cba69eeeSIan Campbell * High Level Configuration Options 18cba69eeeSIan Campbell */ 19cba69eeeSIan Campbell #define CONFIG_SUNXI /* sunxi family */ 2050827a59SIan Campbell #ifdef CONFIG_SPL_BUILD 2150827a59SIan Campbell #ifndef CONFIG_SPL_FEL 2250827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 2350827a59SIan Campbell #endif 2450827a59SIan Campbell #endif 25cba69eeeSIan Campbell 26cba69eeeSIan Campbell #include <asm/arch/cpu.h> /* get chip and board defs */ 27cba69eeeSIan Campbell 28cba69eeeSIan Campbell #define CONFIG_SYS_TEXT_BASE 0x4a000000 29cba69eeeSIan Campbell 30*57f878efSSimon Glass #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM) 31*57f878efSSimon Glass # define CONFIG_CMD_DM 32*57f878efSSimon Glass #endif 33*57f878efSSimon Glass 34cba69eeeSIan Campbell /* 35cba69eeeSIan Campbell * Display CPU information 36cba69eeeSIan Campbell */ 37cba69eeeSIan Campbell #define CONFIG_DISPLAY_CPUINFO 38cba69eeeSIan Campbell 39cba69eeeSIan Campbell /* Serial & console */ 40cba69eeeSIan Campbell #define CONFIG_SYS_NS16550 41cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL 42cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */ 43cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_REG_SIZE -4 44cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK 24000000 45cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 46cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 47cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 48cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 49c757a50bSChen-Yu Tsai #define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 50cba69eeeSIan Campbell 51cba69eeeSIan Campbell /* DRAM Base */ 52cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE 0x40000000 53cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR 0x0 54cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 55cba69eeeSIan Campbell 56cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \ 57cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 58cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \ 59cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 60cba69eeeSIan Campbell 61cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS 1 62cba69eeeSIan Campbell #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 63cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 64cba69eeeSIan Campbell 65a6e50a88SIan Campbell #ifdef CONFIG_AHCI 66a6e50a88SIan Campbell #define CONFIG_LIBATA 67a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI 68a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT 69a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI 70a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 71a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN 1 72a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 73a6e50a88SIan Campbell CONFIG_SYS_SCSI_MAX_LUN) 74a6e50a88SIan Campbell #define CONFIG_CMD_SCSI 75a6e50a88SIan Campbell #endif 76a6e50a88SIan Campbell 77cba69eeeSIan Campbell #define CONFIG_CMD_MEMORY 78cba69eeeSIan Campbell #define CONFIG_CMD_SETEXPR 79cba69eeeSIan Campbell 80cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS 81cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG 82cba69eeeSIan Campbell #define CONFIG_INITRD_TAG 83cba69eeeSIan Campbell 84e24ea55cSIan Campbell /* mmc config */ 85ff2b47f6SChen-Yu Tsai #if !defined(CONFIG_UART0_PORT_F) 86e24ea55cSIan Campbell #define CONFIG_MMC 87e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC 88e24ea55cSIan Campbell #define CONFIG_CMD_MMC 89e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI 90e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT 0 91e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC 92e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 93ff2b47f6SChen-Yu Tsai #endif 94e24ea55cSIan Campbell 95cba69eeeSIan Campbell /* 4MB of malloc() pool */ 96cba69eeeSIan Campbell #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) 97cba69eeeSIan Campbell 98cba69eeeSIan Campbell /* 99cba69eeeSIan Campbell * Miscellaneous configurable options 100cba69eeeSIan Campbell */ 101cba69eeeSIan Campbell #define CONFIG_CMD_ECHO 10206beadb0SIan Campbell #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 10306beadb0SIan Campbell #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 104cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 105cba69eeeSIan Campbell #define CONFIG_SYS_GENERIC_BOARD 106cba69eeeSIan Campbell 107cba69eeeSIan Campbell /* Boot Argument Buffer Size */ 108cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 109cba69eeeSIan Campbell 110846e3254SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 111cba69eeeSIan Campbell 112cba69eeeSIan Campbell /* standalone support */ 113846e3254SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR 0x42000000 114cba69eeeSIan Campbell 115cba69eeeSIan Campbell /* baudrate */ 116cba69eeeSIan Campbell #define CONFIG_BAUDRATE 115200 117cba69eeeSIan Campbell 118cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */ 119cba69eeeSIan Campbell #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 120cba69eeeSIan Campbell 121cba69eeeSIan Campbell /* FLASH and environment organization */ 122cba69eeeSIan Campbell 123cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH 124cba69eeeSIan Campbell 125cba69eeeSIan Campbell #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */ 126cba69eeeSIan Campbell #define CONFIG_IDENT_STRING " Allwinner Technology" 127cba69eeeSIan Campbell 128e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 129cba69eeeSIan Campbell #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 130cba69eeeSIan Campbell 131cba69eeeSIan Campbell #include <config_cmd_default.h> 132b9fb3b94SHans de Goede #undef CONFIG_CMD_FPGA 133cba69eeeSIan Campbell 134cba69eeeSIan Campbell #define CONFIG_FAT_WRITE /* enable write access */ 135cba69eeeSIan Campbell 136cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK 137cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT 138cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT 139cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT 140cba69eeeSIan Campbell 14150827a59SIan Campbell #ifdef CONFIG_SPL_FEL 14250827a59SIan Campbell 143cba69eeeSIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds" 144cba69eeeSIan Campbell #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi" 145cba69eeeSIan Campbell #define CONFIG_SPL_TEXT_BASE 0x2000 146cba69eeeSIan Campbell #define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */ 14750827a59SIan Campbell 14850827a59SIan Campbell #else /* CONFIG_SPL */ 14950827a59SIan Campbell 15050827a59SIan Campbell #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 15150827a59SIan Campbell #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KiB */ 15250827a59SIan Campbell 15350827a59SIan Campbell #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 15450827a59SIan Campbell #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 15550827a59SIan Campbell 15650827a59SIan Campbell #define CONFIG_SPL_LIBDISK_SUPPORT 15750827a59SIan Campbell #define CONFIG_SPL_MMC_SUPPORT 15850827a59SIan Campbell 15950827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 16050827a59SIan Campbell 16150827a59SIan Campbell #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 16250827a59SIan Campbell #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 16350827a59SIan Campbell 16450827a59SIan Campbell #endif /* CONFIG_SPL */ 16550827a59SIan Campbell 166cba69eeeSIan Campbell /* end of 32 KiB in sram */ 167cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 168cba69eeeSIan Campbell #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 169cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000 170cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */ 171cba69eeeSIan Campbell 1726620377eSHans de Goede /* I2C */ 1736620377eSHans de Goede #define CONFIG_SPL_I2C_SUPPORT 1746620377eSHans de Goede #define CONFIG_SYS_I2C 1756620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI 1766620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED 400000 1776620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE 0x7f 1786620377eSHans de Goede #define CONFIG_CMD_I2C 1796620377eSHans de Goede 18014bc66bdSHenrik Nordstrom /* PMU */ 18114bc66bdSHenrik Nordstrom #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER 18214bc66bdSHenrik Nordstrom #define CONFIG_SPL_POWER_SUPPORT 18314bc66bdSHenrik Nordstrom #endif 18414bc66bdSHenrik Nordstrom 185f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX 186cba69eeeSIan Campbell #define CONFIG_CONS_INDEX 1 /* UART0 */ 187f84269c5SHans de Goede #endif 188cba69eeeSIan Campbell 189abce2c62SIan Campbell /* GPIO */ 190abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO 191cd82113aSHans de Goede #define CONFIG_SPL_GPIO_SUPPORT 192abce2c62SIan Campbell #define CONFIG_CMD_GPIO 193abce2c62SIan Campbell 194c26fb9dbSHans de Goede /* Ethernet support */ 195c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC 196c26fb9dbSHans de Goede #define CONFIG_MII /* MII PHY management */ 197c26fb9dbSHans de Goede #endif 198c26fb9dbSHans de Goede 1995835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC 2005835823dSIan Campbell #define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */ 2015835823dSIan Campbell #define CONFIG_DW_AUTONEG 2025835823dSIan Campbell #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 2035835823dSIan Campbell #define CONFIG_PHY_ADDR 1 2045835823dSIan Campbell #define CONFIG_MII /* MII PHY management */ 2055835823dSIan Campbell #define CONFIG_PHYLIB 2065835823dSIan Campbell #endif 2075835823dSIan Campbell 2083584f30cSRoman Byshko #ifdef CONFIG_USB_EHCI 2093584f30cSRoman Byshko #define CONFIG_CMD_USB 2103584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 2113584f30cSRoman Byshko #define CONFIG_USB_STORAGE 2123584f30cSRoman Byshko #endif 2133584f30cSRoman Byshko 214cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \ 215cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_NAND && \ 216cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_FAT && \ 217cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_SPI_FLASH 218cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE 219cba69eeeSIan Campbell #endif 220cba69eeeSIan Campbell 221b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R 222b41d7d05SJonathan Liu 223cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD 224cba69eeeSIan Campbell #include <config_distro_defaults.h> 2252ec3a612SHans de Goede 226846e3254SHans de Goede /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 227846e3254SHans de Goede * 1M script, 1M pxe and the ramdisk at the end */ 228846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \ 229846e3254SHans de Goede "bootm_size=0x10000000\0" \ 230846e3254SHans de Goede "kernel_addr_r=0x42000000\0" \ 231846e3254SHans de Goede "fdt_addr_r=0x43000000\0" \ 232846e3254SHans de Goede "scriptaddr=0x43100000\0" \ 233846e3254SHans de Goede "pxefile_addr_r=0x43200000\0" \ 234846e3254SHans de Goede "ramdisk_addr_r=0x43300000\0" 235846e3254SHans de Goede 23641f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC 23741f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 23841f8e9f5SChen-Yu Tsai #else 23941f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) 24041f8e9f5SChen-Yu Tsai #endif 24141f8e9f5SChen-Yu Tsai 2422ec3a612SHans de Goede #ifdef CONFIG_AHCI 2432ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 2442ec3a612SHans de Goede #else 2452ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) 2462ec3a612SHans de Goede #endif 2472ec3a612SHans de Goede 248859b3f14SChen-Yu Tsai #ifdef CONFIG_USB_EHCI 249859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 250859b3f14SChen-Yu Tsai #else 251859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) 252859b3f14SChen-Yu Tsai #endif 253859b3f14SChen-Yu Tsai 2542ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \ 25541f8e9f5SChen-Yu Tsai BOOT_TARGET_DEVICES_MMC(func) \ 2562ec3a612SHans de Goede BOOT_TARGET_DEVICES_SCSI(func) \ 257859b3f14SChen-Yu Tsai BOOT_TARGET_DEVICES_USB(func) \ 2582ec3a612SHans de Goede func(PXE, pxe, na) \ 2592ec3a612SHans de Goede func(DHCP, dhcp, na) 2602ec3a612SHans de Goede 2612ec3a612SHans de Goede #include <config_distro_bootcmd.h> 2622ec3a612SHans de Goede 2632ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \ 264846e3254SHans de Goede MEM_LAYOUT_ENV_SETTINGS \ 26598e214ddSIan Campbell "fdtfile=" CONFIG_FDTFILE "\0" \ 266846e3254SHans de Goede "console=ttyS0,115200\0" \ 2672ec3a612SHans de Goede BOOTENV 2682ec3a612SHans de Goede 2692ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */ 2702ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS 271cba69eeeSIan Campbell #endif 272cba69eeeSIan Campbell 273cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */ 274