xref: /rk3399_rockchip-uboot/include/configs/sunxi-common.h (revision 2ec3a612f440364fa0ed250f22e7d3c3a8d72b92)
1cba69eeeSIan Campbell /*
2cba69eeeSIan Campbell  * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3cba69eeeSIan Campbell  *
4cba69eeeSIan Campbell  * (C) Copyright 2007-2011
5cba69eeeSIan Campbell  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6cba69eeeSIan Campbell  * Tom Cubie <tangliang@allwinnertech.com>
7cba69eeeSIan Campbell  *
8cba69eeeSIan Campbell  * Configuration settings for the Allwinner sunxi series of boards.
9cba69eeeSIan Campbell  *
10cba69eeeSIan Campbell  * SPDX-License-Identifier:	GPL-2.0+
11cba69eeeSIan Campbell  */
12cba69eeeSIan Campbell 
13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H
14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H
15cba69eeeSIan Campbell 
16cba69eeeSIan Campbell /*
17cba69eeeSIan Campbell  * High Level Configuration Options
18cba69eeeSIan Campbell  */
19cba69eeeSIan Campbell #define CONFIG_SUNXI		/* sunxi family */
2050827a59SIan Campbell #ifdef CONFIG_SPL_BUILD
2150827a59SIan Campbell #ifndef CONFIG_SPL_FEL
2250827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD	/* Thumbs mode to save space in SPL */
2350827a59SIan Campbell #endif
2450827a59SIan Campbell #endif
25cba69eeeSIan Campbell 
26cba69eeeSIan Campbell #include <asm/arch/cpu.h>	/* get chip and board defs */
27cba69eeeSIan Campbell 
28cba69eeeSIan Campbell #define CONFIG_SYS_TEXT_BASE		0x4a000000
29cba69eeeSIan Campbell 
30cba69eeeSIan Campbell /*
31cba69eeeSIan Campbell  * Display CPU information
32cba69eeeSIan Campbell  */
33cba69eeeSIan Campbell #define CONFIG_DISPLAY_CPUINFO
34cba69eeeSIan Campbell 
35cba69eeeSIan Campbell /* Serial & console */
36cba69eeeSIan Campbell #define CONFIG_SYS_NS16550
37cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL
38cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */
39cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_REG_SIZE	-4
40cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK		24000000
41cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
42cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
43cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
44cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
45cba69eeeSIan Campbell 
46cba69eeeSIan Campbell /* DRAM Base */
47cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE		0x40000000
48cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR	0x0
49cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
50cba69eeeSIan Campbell 
51cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \
52cba69eeeSIan Campbell 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
53cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \
54cba69eeeSIan Campbell 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
55cba69eeeSIan Campbell 
56cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS		1
57cba69eeeSIan Campbell #define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
58cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */
59cba69eeeSIan Campbell 
60a6e50a88SIan Campbell #ifdef CONFIG_AHCI
61a6e50a88SIan Campbell #define CONFIG_LIBATA
62a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI
63a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT
64a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI
65a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
66a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN		1
67a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
68a6e50a88SIan Campbell 					 CONFIG_SYS_SCSI_MAX_LUN)
69a6e50a88SIan Campbell #define CONFIG_CMD_SCSI
70a6e50a88SIan Campbell #endif
71a6e50a88SIan Campbell 
72cba69eeeSIan Campbell #define CONFIG_CMD_MEMORY
73cba69eeeSIan Campbell #define CONFIG_CMD_SETEXPR
74cba69eeeSIan Campbell 
75cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS
76cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG
77cba69eeeSIan Campbell #define CONFIG_INITRD_TAG
78cba69eeeSIan Campbell 
79e24ea55cSIan Campbell /* mmc config */
80e24ea55cSIan Campbell #define CONFIG_MMC
81e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC
82e24ea55cSIan Campbell #define CONFIG_CMD_MMC
83e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI
84e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT		0
85e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC
86e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
87e24ea55cSIan Campbell 
88cba69eeeSIan Campbell /* 4MB of malloc() pool */
89cba69eeeSIan Campbell #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (4 << 20))
90cba69eeeSIan Campbell 
91cba69eeeSIan Campbell /*
92cba69eeeSIan Campbell  * Miscellaneous configurable options
93cba69eeeSIan Campbell  */
94cba69eeeSIan Campbell #define CONFIG_CMD_ECHO
95cba69eeeSIan Campbell #define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
96cba69eeeSIan Campbell #define CONFIG_SYS_PBSIZE	384	/* Print Buffer Size */
97cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
98cba69eeeSIan Campbell #define CONFIG_SYS_GENERIC_BOARD
99cba69eeeSIan Campbell 
100cba69eeeSIan Campbell /* Boot Argument Buffer Size */
101cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
102cba69eeeSIan Campbell 
103cba69eeeSIan Campbell #define CONFIG_SYS_LOAD_ADDR		0x48000000 /* default load address */
104cba69eeeSIan Campbell 
105cba69eeeSIan Campbell /* standalone support */
106cba69eeeSIan Campbell #define CONFIG_STANDALONE_LOAD_ADDR	0x48000000
107cba69eeeSIan Campbell 
108cba69eeeSIan Campbell #define CONFIG_SYS_HZ			1000
109cba69eeeSIan Campbell 
110cba69eeeSIan Campbell /* baudrate */
111cba69eeeSIan Campbell #define CONFIG_BAUDRATE			115200
112cba69eeeSIan Campbell 
113cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */
114cba69eeeSIan Campbell #define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */
115cba69eeeSIan Campbell 
116cba69eeeSIan Campbell /* FLASH and environment organization */
117cba69eeeSIan Campbell 
118cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH
119cba69eeeSIan Campbell 
120cba69eeeSIan Campbell #define CONFIG_SYS_MONITOR_LEN		(512 << 10)	/* 512 KiB */
121cba69eeeSIan Campbell #define CONFIG_IDENT_STRING		" Allwinner Technology"
122cba69eeeSIan Campbell 
123e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET		(544 << 10) /* (8 + 24 + 512) KiB */
124cba69eeeSIan Campbell #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
125cba69eeeSIan Campbell 
126cba69eeeSIan Campbell #include <config_cmd_default.h>
127b9fb3b94SHans de Goede #undef CONFIG_CMD_FPGA
128cba69eeeSIan Campbell 
129cba69eeeSIan Campbell #define CONFIG_FAT_WRITE	/* enable write access */
130cba69eeeSIan Campbell 
131cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK
132cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT
133cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT
134cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT
135cba69eeeSIan Campbell 
13650827a59SIan Campbell #ifdef CONFIG_SPL_FEL
13750827a59SIan Campbell 
138cba69eeeSIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
139cba69eeeSIan Campbell #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
140cba69eeeSIan Campbell #define CONFIG_SPL_TEXT_BASE		0x2000
141cba69eeeSIan Campbell #define CONFIG_SPL_MAX_SIZE		0x4000		/* 16 KiB */
14250827a59SIan Campbell 
14350827a59SIan Campbell #else /* CONFIG_SPL */
14450827a59SIan Campbell 
14550827a59SIan Campbell #define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
14650827a59SIan Campbell #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KiB */
14750827a59SIan Campbell 
14850827a59SIan Campbell #define CONFIG_SPL_TEXT_BASE		0x20		/* sram start+header */
14950827a59SIan Campbell #define CONFIG_SPL_MAX_SIZE		0x5fe0		/* 24KB on sun4i/sun7i */
15050827a59SIan Campbell 
15150827a59SIan Campbell #define CONFIG_SPL_LIBDISK_SUPPORT
15250827a59SIan Campbell #define CONFIG_SPL_MMC_SUPPORT
15350827a59SIan Campbell 
15450827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
15550827a59SIan Campbell 
15650827a59SIan Campbell #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	80	/* 40KiB */
15750827a59SIan Campbell #define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */
15850827a59SIan Campbell 
15950827a59SIan Campbell #endif /* CONFIG_SPL */
16050827a59SIan Campbell 
161cba69eeeSIan Campbell /* end of 32 KiB in sram */
162cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK		0x00008000 /* End of sram */
163cba69eeeSIan Campbell #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
164cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_START	0x4ff00000
165cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00080000	/* 512 KiB */
166cba69eeeSIan Campbell 
1676620377eSHans de Goede /* I2C */
1686620377eSHans de Goede #define CONFIG_SPL_I2C_SUPPORT
1696620377eSHans de Goede #define CONFIG_SYS_I2C
1706620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI
1716620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED		400000
1726620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE		0x7f
1736620377eSHans de Goede #define CONFIG_CMD_I2C
1746620377eSHans de Goede 
17514bc66bdSHenrik Nordstrom /* PMU */
17614bc66bdSHenrik Nordstrom #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
17714bc66bdSHenrik Nordstrom #define CONFIG_SPL_POWER_SUPPORT
17814bc66bdSHenrik Nordstrom #endif
17914bc66bdSHenrik Nordstrom 
180f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX
181cba69eeeSIan Campbell #define CONFIG_CONS_INDEX              1       /* UART0 */
182f84269c5SHans de Goede #endif
183cba69eeeSIan Campbell 
184abce2c62SIan Campbell /* GPIO */
185abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO
186abce2c62SIan Campbell #define CONFIG_CMD_GPIO
187abce2c62SIan Campbell 
188c26fb9dbSHans de Goede /* Ethernet support */
189c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC
190c26fb9dbSHans de Goede #define CONFIG_MII			/* MII PHY management		*/
191c26fb9dbSHans de Goede #endif
192c26fb9dbSHans de Goede 
1935835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC
1945835823dSIan Campbell #define CONFIG_DESIGNWARE_ETH		/* GMAC can use designware driver */
1955835823dSIan Campbell #define CONFIG_DW_AUTONEG
1965835823dSIan Campbell #define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
1975835823dSIan Campbell #define CONFIG_PHY_ADDR		1
1985835823dSIan Campbell #define CONFIG_MII			/* MII PHY management		*/
1995835823dSIan Campbell #define CONFIG_PHYLIB
2005835823dSIan Campbell #endif
2015835823dSIan Campbell 
2023584f30cSRoman Byshko #ifdef CONFIG_USB_EHCI
2033584f30cSRoman Byshko #define CONFIG_CMD_USB
2043584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
2053584f30cSRoman Byshko #define CONFIG_USB_STORAGE
2063584f30cSRoman Byshko #endif
2073584f30cSRoman Byshko 
208cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \
209cba69eeeSIan Campbell     !defined CONFIG_ENV_IS_IN_NAND && \
210cba69eeeSIan Campbell     !defined CONFIG_ENV_IS_IN_FAT && \
211cba69eeeSIan Campbell     !defined CONFIG_ENV_IS_IN_SPI_FLASH
212cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE
213cba69eeeSIan Campbell #endif
214cba69eeeSIan Campbell 
215b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R
216b41d7d05SJonathan Liu 
217cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD
218cba69eeeSIan Campbell #include <config_distro_defaults.h>
219*2ec3a612SHans de Goede 
220*2ec3a612SHans de Goede #ifdef CONFIG_AHCI
221*2ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
222*2ec3a612SHans de Goede #else
223*2ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func)
224*2ec3a612SHans de Goede #endif
225*2ec3a612SHans de Goede 
226*2ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \
227*2ec3a612SHans de Goede 	func(MMC, mmc, 0) \
228*2ec3a612SHans de Goede 	BOOT_TARGET_DEVICES_SCSI(func) \
229*2ec3a612SHans de Goede 	func(USB, usb, 0) \
230*2ec3a612SHans de Goede 	func(PXE, pxe, na) \
231*2ec3a612SHans de Goede 	func(DHCP, dhcp, na)
232*2ec3a612SHans de Goede 
233*2ec3a612SHans de Goede #include <config_distro_bootcmd.h>
234*2ec3a612SHans de Goede 
235*2ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \
236*2ec3a612SHans de Goede 	"bootm_size=0x10000000\0" \
237*2ec3a612SHans de Goede 	BOOTENV
238*2ec3a612SHans de Goede 
239*2ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */
240*2ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS
241cba69eeeSIan Campbell #endif
242cba69eeeSIan Campbell 
243cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */
244