1cba69eeeSIan Campbell /* 2cba69eeeSIan Campbell * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3cba69eeeSIan Campbell * 4cba69eeeSIan Campbell * (C) Copyright 2007-2011 5cba69eeeSIan Campbell * Allwinner Technology Co., Ltd. <www.allwinnertech.com> 6cba69eeeSIan Campbell * Tom Cubie <tangliang@allwinnertech.com> 7cba69eeeSIan Campbell * 8cba69eeeSIan Campbell * Configuration settings for the Allwinner sunxi series of boards. 9cba69eeeSIan Campbell * 10cba69eeeSIan Campbell * SPDX-License-Identifier: GPL-2.0+ 11cba69eeeSIan Campbell */ 12cba69eeeSIan Campbell 13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H 14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H 15cba69eeeSIan Campbell 16daf6d399SHans de Goede #include <asm/arch/cpu.h> 17e049fe28SHans de Goede #include <linux/stringify.h> 18e049fe28SHans de Goede 1977ef1369SSiarhei Siamashka #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 2077ef1369SSiarhei Siamashka /* 2177ef1369SSiarhei Siamashka * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the 2277ef1369SSiarhei Siamashka * expense of restricting some features, so the regular machine id values can 2377ef1369SSiarhei Siamashka * be used. 2477ef1369SSiarhei Siamashka */ 2577ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 0 2677ef1369SSiarhei Siamashka #else 2777ef1369SSiarhei Siamashka /* 2877ef1369SSiarhei Siamashka * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels. 2977ef1369SSiarhei Siamashka * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass 3077ef1369SSiarhei Siamashka * beyond the machine id check. 3177ef1369SSiarhei Siamashka */ 3277ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV 1 3377ef1369SSiarhei Siamashka #endif 3477ef1369SSiarhei Siamashka 35cba69eeeSIan Campbell /* 36cba69eeeSIan Campbell * High Level Configuration Options 37cba69eeeSIan Campbell */ 38cba69eeeSIan Campbell #define CONFIG_SUNXI /* sunxi family */ 3950827a59SIan Campbell #ifdef CONFIG_SPL_BUILD 4050827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ 4150827a59SIan Campbell #endif 42cba69eeeSIan Campbell 43cba69eeeSIan Campbell /* Serial & console */ 44cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL 45cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */ 46cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK 24000000 474fb60552SThomas Chou #ifndef CONFIG_DM_SERIAL 481a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE -4 49cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE 50cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE 51cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE 52cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE 53c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE 541a81cf83SSimon Glass #endif 55cba69eeeSIan Campbell 568a65f69cSPaul Kocialkowski /* CPU */ 57daf6d399SHans de Goede #define CONFIG_DISPLAY_CPUINFO 588a65f69cSPaul Kocialkowski #define CONFIG_SYS_CACHELINE_SIZE 64 598a65f69cSPaul Kocialkowski 60e049fe28SHans de Goede /* 61e049fe28SHans de Goede * The DRAM Base differs between some models. We cannot use macros for the 62e049fe28SHans de Goede * CONFIG_FOO defines which contain the DRAM base address since they end 63e049fe28SHans de Goede * up unexpanded in include/autoconf.mk . 64e049fe28SHans de Goede * 65e049fe28SHans de Goede * So we have to have this #ifdef #else #endif block for these. 66e049fe28SHans de Goede */ 67e049fe28SHans de Goede #ifdef CONFIG_MACH_SUN9I 68e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x2##x 69e049fe28SHans de Goede #define CONFIG_SYS_SDRAM_BASE 0x20000000 70e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */ 71e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE 0x2a000000 72e049fe28SHans de Goede #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000 73ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 74ff42d107SHans de Goede * since it needs to fit in with the other values. By also #defining it 75ff42d107SHans de Goede * we get warnings if the Kconfig value mismatches. */ 76ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000 77e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 78e049fe28SHans de Goede #else 79e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x4##x 80cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE 0x40000000 81e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ 82e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE 0x4a000000 83e049fe28SHans de Goede #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000 84ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 85ff42d107SHans de Goede * since it needs to fit in with the other values. By also #defining it 86ff42d107SHans de Goede * we get warnings if the Kconfig value mismatches. */ 87ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000 88e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 89e049fe28SHans de Goede #endif 90e049fe28SHans de Goede 91e049fe28SHans de Goede #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */ 92e049fe28SHans de Goede 9377fe9887SHans de Goede #ifdef CONFIG_MACH_SUN9I 9477fe9887SHans de Goede /* 9577fe9887SHans de Goede * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is 9677fe9887SHans de Goede * slightly bigger. Note that it is possible to map the first 32 KiB of the 9777fe9887SHans de Goede * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the 9877fe9887SHans de Goede * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and 9977fe9887SHans de Goede * the 1 actually activates the mapping of the first 32 KiB to 0x00000000. 10077fe9887SHans de Goede */ 10177fe9887SHans de Goede #define CONFIG_SYS_INIT_RAM_ADDR 0x10000 10277fe9887SHans de Goede #define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */ 10377fe9887SHans de Goede #else 104cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR 0x0 105cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ 10677fe9887SHans de Goede #endif 107cba69eeeSIan Campbell 108cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \ 109cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 110cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \ 111cba69eeeSIan Campbell (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 112cba69eeeSIan Campbell 113cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS 1 114cba69eeeSIan Campbell #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE 115cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ 116cba69eeeSIan Campbell 117a6e50a88SIan Campbell #ifdef CONFIG_AHCI 118a6e50a88SIan Campbell #define CONFIG_LIBATA 119a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI 120a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT 121a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI 1220751b138SBernhard Nortmann #define CONFIG_SYS_64BIT_LBA 123a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 124a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN 1 125a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 126a6e50a88SIan Campbell CONFIG_SYS_SCSI_MAX_LUN) 127a6e50a88SIan Campbell #define CONFIG_CMD_SCSI 128a6e50a88SIan Campbell #endif 129a6e50a88SIan Campbell 130cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS 131cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG 132cba69eeeSIan Campbell #define CONFIG_INITRD_TAG 1339f852211SPaul Kocialkowski #define CONFIG_SERIAL_TAG 134cba69eeeSIan Campbell 135e5268616SHans de Goede #ifdef CONFIG_NAND_SUNXI 13621d4d37aSHans de Goede #define CONFIG_SPL_NAND_SUPPORT 1 137960caebaSPiotr Zierhoffer #endif 138960caebaSPiotr Zierhoffer 139e24ea55cSIan Campbell /* mmc config */ 14044c79879SMaxime Ripard #ifdef CONFIG_MMC 141e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC 142e24ea55cSIan Campbell #define CONFIG_CMD_MMC 143e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI 144e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT 0 145e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC 146e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ 147ff2b47f6SChen-Yu Tsai #endif 148e24ea55cSIan Campbell 1495c965ed9SHans de Goede /* 64MB of malloc() pool */ 1505c965ed9SHans de Goede #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20)) 151cba69eeeSIan Campbell 152cba69eeeSIan Campbell /* 153cba69eeeSIan Campbell * Miscellaneous configurable options 154cba69eeeSIan Campbell */ 15506beadb0SIan Campbell #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 15606beadb0SIan Campbell #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ 157cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 158cba69eeeSIan Campbell 159cba69eeeSIan Campbell /* Boot Argument Buffer Size */ 160cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 161cba69eeeSIan Campbell 162cba69eeeSIan Campbell /* standalone support */ 163e049fe28SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR 164cba69eeeSIan Campbell 165cba69eeeSIan Campbell /* baudrate */ 166cba69eeeSIan Campbell #define CONFIG_BAUDRATE 115200 167cba69eeeSIan Campbell 168cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */ 169cba69eeeSIan Campbell #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ 170cba69eeeSIan Campbell 171cba69eeeSIan Campbell /* FLASH and environment organization */ 172cba69eeeSIan Campbell 173cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH 174cba69eeeSIan Campbell 175fa5e1020SBoris Brezillon #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ 176cba69eeeSIan Campbell #define CONFIG_IDENT_STRING " Allwinner Technology" 1772af25b74SSimon Glass #define CONFIG_DISPLAY_BOARDINFO 178cba69eeeSIan Campbell 179e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ 180cba69eeeSIan Campbell #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 181cba69eeeSIan Campbell 182cba69eeeSIan Campbell #define CONFIG_FAT_WRITE /* enable write access */ 183cba69eeeSIan Campbell 184cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK 185cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT 186cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT 187cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT 188cba69eeeSIan Campbell 189942cb0b6SSimon Glass #define CONFIG_SPL_BOARD_LOAD_IMAGE 190942cb0b6SSimon Glass 19150827a59SIan Campbell #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */ 19250827a59SIan Campbell #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */ 19350827a59SIan Campbell 19450827a59SIan Campbell #define CONFIG_SPL_LIBDISK_SUPPORT 195f0ce28e9SSiarhei Siamashka 19644c79879SMaxime Ripard #ifdef CONFIG_MMC 19750827a59SIan Campbell #define CONFIG_SPL_MMC_SUPPORT 198f0ce28e9SSiarhei Siamashka #endif 19950827a59SIan Campbell 20050827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" 20150827a59SIan Campbell 20250827a59SIan Campbell #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */ 20350827a59SIan Campbell #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ 20450827a59SIan Campbell 205cba69eeeSIan Campbell /* end of 32 KiB in sram */ 206cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ 207cba69eeeSIan Campbell #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 208cba69eeeSIan Campbell 2096620377eSHans de Goede /* I2C */ 2100d8382aeSJelle van der Waa #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ 2110d8382aeSJelle van der Waa defined CONFIG_SY8106A_POWER 2126620377eSHans de Goede #define CONFIG_SPL_I2C_SUPPORT 213ad40610bSHans de Goede #endif 214ad40610bSHans de Goede 2156c739c5dSPaul Kocialkowski #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ 2166c739c5dSPaul Kocialkowski defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ 2179d082687SJelle van der Waa defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE 2188b2db32aSHans de Goede #define CONFIG_SYS_I2C 2196620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI 2206620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED 400000 2216620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE 0x7f 2228b2db32aSHans de Goede #define CONFIG_CMD_I2C 2238b2db32aSHans de Goede #endif 22455410089SHans de Goede 22555410089SHans de Goede #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) 22655410089SHans de Goede #define CONFIG_SYS_I2C_SOFT 22755410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SPEED 50000 22855410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00 22955410089SHans de Goede /* We use pin names in Kconfig and sunxi_name_to_gpio() */ 23055410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda 23155410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl 23255410089SHans de Goede #ifndef __ASSEMBLY__ 23355410089SHans de Goede extern int soft_i2c_gpio_sda; 23455410089SHans de Goede extern int soft_i2c_gpio_scl; 23555410089SHans de Goede #endif 2361fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */ 2371fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */ 2381fc42018SHans de Goede #else 2391fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */ 2401fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */ 24155410089SHans de Goede #endif 24255410089SHans de Goede 24314bc66bdSHenrik Nordstrom /* PMU */ 24495ab8feeSvishnupatekar #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ 2450d8382aeSJelle van der Waa defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \ 2460d8382aeSJelle van der Waa defined CONFIG_SY8106A_POWER 24714bc66bdSHenrik Nordstrom #define CONFIG_SPL_POWER_SUPPORT 24814bc66bdSHenrik Nordstrom #endif 24914bc66bdSHenrik Nordstrom 250f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX 251cba69eeeSIan Campbell #define CONFIG_CONS_INDEX 1 /* UART0 */ 252f84269c5SHans de Goede #endif 253cba69eeeSIan Campbell 254a5da3c83SHans de Goede #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE 255f3133962SHans de Goede #if CONFIG_CONS_INDEX == 1 256f3133962SHans de Goede #ifdef CONFIG_MACH_SUN9I 257f3133962SHans de Goede #define OF_STDOUT_PATH "/soc/serial@07000000:115200" 258f3133962SHans de Goede #else 259f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200" 260f3133962SHans de Goede #endif 261f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) 262f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" 2635cd83b11SLaurent Itti #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) 2645cd83b11SLaurent Itti #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200" 265f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I) 266f3133962SHans de Goede #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" 267f3133962SHans de Goede #else 268f3133962SHans de Goede #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h. 269f3133962SHans de Goede #endif 270a5da3c83SHans de Goede #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */ 271f3133962SHans de Goede 272abce2c62SIan Campbell /* GPIO */ 273abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO 274cd82113aSHans de Goede #define CONFIG_SPL_GPIO_SUPPORT 275abce2c62SIan Campbell 2767f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 2777f2c521fSLuc Verhaegen /* 2785633a296SHans de Goede * The amount of RAM to keep free at the top of RAM when relocating u-boot, 2795633a296SHans de Goede * to use as framebuffer. This must be a multiple of 4096. 2807f2c521fSLuc Verhaegen */ 2815c965ed9SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20) 2827f2c521fSLuc Verhaegen 2832d7a084bSLuc Verhaegen /* Do we want to initialize a simple FB? */ 2842d7a084bSLuc Verhaegen #define CONFIG_VIDEO_DT_SIMPLEFB 2852d7a084bSLuc Verhaegen 2867f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SUNXI 2877f2c521fSLuc Verhaegen 2887f2c521fSLuc Verhaegen #define CONFIG_CFB_CONSOLE 2897f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SW_CURSOR 2907f2c521fSLuc Verhaegen #define CONFIG_VIDEO_LOGO 291be8ec633SHans de Goede #define CONFIG_VIDEO_STD_TIMINGS 29275481607SHans de Goede #define CONFIG_I2C_EDID 29358332f89SHans de Goede #define VIDEO_LINE_LEN (pGD->plnSizeX) 2947f2c521fSLuc Verhaegen 2957f2c521fSLuc Verhaegen /* allow both serial and cfb console. */ 2967f2c521fSLuc Verhaegen #define CONFIG_CONSOLE_MUX 2977f2c521fSLuc Verhaegen /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */ 2987f2c521fSLuc Verhaegen #define CONFIG_VGA_AS_SINGLE_DEVICE 2997f2c521fSLuc Verhaegen 3007f2c521fSLuc Verhaegen #endif /* CONFIG_VIDEO */ 3017f2c521fSLuc Verhaegen 302c26fb9dbSHans de Goede /* Ethernet support */ 303c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC 3048145dea4SHans de Goede #define CONFIG_PHY_ADDR 1 305c26fb9dbSHans de Goede #define CONFIG_MII /* MII PHY management */ 3068145dea4SHans de Goede #define CONFIG_PHYLIB 307c26fb9dbSHans de Goede #endif 308c26fb9dbSHans de Goede 3095835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC 3105835823dSIan Campbell #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ 3115835823dSIan Campbell #define CONFIG_PHY_ADDR 1 3125835823dSIan Campbell #define CONFIG_MII /* MII PHY management */ 313*1eae8f66SHans de Goede #define CONFIG_PHY_REALTEK 3145835823dSIan Campbell #endif 3155835823dSIan Campbell 3162582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_EHCI_HCD 3176a72e804SHans de Goede #define CONFIG_USB_OHCI_NEW 3186a72e804SHans de Goede #define CONFIG_USB_OHCI_SUNXI 3196a72e804SHans de Goede #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 3203584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 3211a800f7aSHans de Goede #endif 3221a800f7aSHans de Goede 3231a800f7aSHans de Goede #ifdef CONFIG_USB_MUSB_SUNXI 32495de1e2fSPaul Kocialkowski #define CONFIG_USB_MUSB_PIO_ONLY 3251a800f7aSHans de Goede #endif 3261a800f7aSHans de Goede 327b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_MUSB_GADGET 328b21144ebSPaul Kocialkowski #define CONFIG_USB_GADGET 329b21144ebSPaul Kocialkowski #define CONFIG_USB_GADGET_DUALSPEED 330b21144ebSPaul Kocialkowski #define CONFIG_USB_GADGET_VBUS_DRAW 0 331b21144ebSPaul Kocialkowski 332b21144ebSPaul Kocialkowski #define CONFIG_USB_GADGET_DOWNLOAD 3332a909c5fSSiarhei Siamashka #define CONFIG_USB_FUNCTION_DFU 334b21144ebSPaul Kocialkowski #define CONFIG_USB_FUNCTION_FASTBOOT 335b21144ebSPaul Kocialkowski #define CONFIG_USB_FUNCTION_MASS_STORAGE 336b21144ebSPaul Kocialkowski #endif 337b21144ebSPaul Kocialkowski 338b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_GADGET_DOWNLOAD 339b21144ebSPaul Kocialkowski #define CONFIG_G_DNL_VENDOR_NUM 0x1f3a 340b21144ebSPaul Kocialkowski #define CONFIG_G_DNL_PRODUCT_NUM 0x1010 341b21144ebSPaul Kocialkowski #define CONFIG_G_DNL_MANUFACTURER "Allwinner Technology" 342b21144ebSPaul Kocialkowski #endif 343b21144ebSPaul Kocialkowski 3442a909c5fSSiarhei Siamashka #ifdef CONFIG_USB_FUNCTION_DFU 3452a909c5fSSiarhei Siamashka #define CONFIG_CMD_DFU 3462a909c5fSSiarhei Siamashka #define CONFIG_DFU_RAM 3472a909c5fSSiarhei Siamashka #endif 3482a909c5fSSiarhei Siamashka 349b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_FASTBOOT 350b21144ebSPaul Kocialkowski #define CONFIG_CMD_FASTBOOT 351b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 352b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000 353bac83fb0SMaxime Ripard #define CONFIG_ANDROID_BOOT_IMAGE 354b21144ebSPaul Kocialkowski 355b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH 35644c79879SMaxime Ripard 35744c79879SMaxime Ripard #ifdef CONFIG_MMC 358b21144ebSPaul Kocialkowski #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 359b21144ebSPaul Kocialkowski #define CONFIG_EFI_PARTITION 360b21144ebSPaul Kocialkowski #endif 36144c79879SMaxime Ripard #endif 362b21144ebSPaul Kocialkowski 363b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE 364b21144ebSPaul Kocialkowski #define CONFIG_CMD_USB_MASS_STORAGE 365b21144ebSPaul Kocialkowski #endif 366b21144ebSPaul Kocialkowski 36786b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 36886b49093SHans de Goede #define CONFIG_CONSOLE_MUX 36986b49093SHans de Goede #define CONFIG_PREBOOT 37086b49093SHans de Goede #define CONFIG_SYS_STDIO_DEREGISTER 371eab9433aSHans de Goede #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE 37286b49093SHans de Goede #endif 37386b49093SHans de Goede 374cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \ 375cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_NAND && \ 376cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_FAT && \ 377cba69eeeSIan Campbell !defined CONFIG_ENV_IS_IN_SPI_FLASH 378cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE 379cba69eeeSIan Campbell #endif 380cba69eeeSIan Campbell 381b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R 3827f2c521fSLuc Verhaegen #define CONFIG_SYS_CONSOLE_IS_IN_ENV 383b41d7d05SJonathan Liu 384cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD 385cba69eeeSIan Campbell #include <config_distro_defaults.h> 3862ec3a612SHans de Goede 387a7925078SSiarhei Siamashka /* Enable pre-console buffer to get complete log on the VGA console */ 388a7925078SSiarhei Siamashka #define CONFIG_PRE_CONSOLE_BUFFER 389a8552c7cSHans de Goede #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */ 390a7925078SSiarhei Siamashka 3918c95c556SHans de Goede /* 3925c965ed9SHans de Goede * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. 3938c95c556SHans de Goede * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 3948c95c556SHans de Goede * 1M script, 1M pxe and the ramdisk at the end. 3958c95c556SHans de Goede */ 3962a909c5fSSiarhei Siamashka 3972a909c5fSSiarhei Siamashka #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) 3982a909c5fSSiarhei Siamashka #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) 3992a909c5fSSiarhei Siamashka #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) 4002a909c5fSSiarhei Siamashka #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) 4012a909c5fSSiarhei Siamashka #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000)) 4022a909c5fSSiarhei Siamashka 403846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \ 4045c965ed9SHans de Goede "bootm_size=0xa000000\0" \ 4052a909c5fSSiarhei Siamashka "kernel_addr_r=" KERNEL_ADDR_R "\0" \ 4062a909c5fSSiarhei Siamashka "fdt_addr_r=" FDT_ADDR_R "\0" \ 4072a909c5fSSiarhei Siamashka "scriptaddr=" SCRIPT_ADDR_R "\0" \ 4082a909c5fSSiarhei Siamashka "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ 4092a909c5fSSiarhei Siamashka "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" 4102a909c5fSSiarhei Siamashka 4112a909c5fSSiarhei Siamashka #define DFU_ALT_INFO_RAM \ 4122a909c5fSSiarhei Siamashka "dfu_alt_info_ram=" \ 4132a909c5fSSiarhei Siamashka "kernel ram " KERNEL_ADDR_R " 0x1000000;" \ 4142a909c5fSSiarhei Siamashka "fdt ram " FDT_ADDR_R " 0x100000;" \ 4152a909c5fSSiarhei Siamashka "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0" 416846e3254SHans de Goede 41741f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC 41841f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) 4195a37a400SKarsten Merker #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 4205a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1) 4215a37a400SKarsten Merker #else 4225a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) 4235a37a400SKarsten Merker #endif 42441f8e9f5SChen-Yu Tsai #else 42541f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) 4265a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) 42741f8e9f5SChen-Yu Tsai #endif 42841f8e9f5SChen-Yu Tsai 4292ec3a612SHans de Goede #ifdef CONFIG_AHCI 4302ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) 4312ec3a612SHans de Goede #else 4322ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) 4332ec3a612SHans de Goede #endif 4342ec3a612SHans de Goede 4352582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_STORAGE 436859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) 437859b3f14SChen-Yu Tsai #else 438859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) 439859b3f14SChen-Yu Tsai #endif 440859b3f14SChen-Yu Tsai 441f3b589c0SBernhard Nortmann /* FEL boot support, auto-execute boot.scr if a script address was provided */ 442f3b589c0SBernhard Nortmann #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \ 443f3b589c0SBernhard Nortmann "bootcmd_fel=" \ 444f3b589c0SBernhard Nortmann "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \ 445f3b589c0SBernhard Nortmann "echo '(FEL boot)'; " \ 446f3b589c0SBernhard Nortmann "source ${fel_scriptaddr}; " \ 447f3b589c0SBernhard Nortmann "fi\0" 448f3b589c0SBernhard Nortmann #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \ 449f3b589c0SBernhard Nortmann "fel " 450f3b589c0SBernhard Nortmann 4512ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \ 452f3b589c0SBernhard Nortmann func(FEL, fel, na) \ 45341f8e9f5SChen-Yu Tsai BOOT_TARGET_DEVICES_MMC(func) \ 4545a37a400SKarsten Merker BOOT_TARGET_DEVICES_MMC_EXTRA(func) \ 4552ec3a612SHans de Goede BOOT_TARGET_DEVICES_SCSI(func) \ 456859b3f14SChen-Yu Tsai BOOT_TARGET_DEVICES_USB(func) \ 4572ec3a612SHans de Goede func(PXE, pxe, na) \ 4582ec3a612SHans de Goede func(DHCP, dhcp, na) 4592ec3a612SHans de Goede 4603b824025SHans de Goede #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT 4613b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT \ 4623b824025SHans de Goede "bootcmd_sunxi_compat=" \ 4633b824025SHans de Goede "setenv root /dev/mmcblk0p3 rootwait; " \ 4643b824025SHans de Goede "if ext2load mmc 0 0x44000000 uEnv.txt; then " \ 4653b824025SHans de Goede "echo Loaded environment from uEnv.txt; " \ 4663b824025SHans de Goede "env import -t 0x44000000 ${filesize}; " \ 4673b824025SHans de Goede "fi; " \ 4683b824025SHans de Goede "setenv bootargs console=${console} root=${root} ${extraargs}; " \ 4693b824025SHans de Goede "ext2load mmc 0 0x43000000 script.bin && " \ 4703b824025SHans de Goede "ext2load mmc 0 0x48000000 uImage && " \ 4713b824025SHans de Goede "bootm 0x48000000\0" 4723b824025SHans de Goede #else 4733b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT 4743b824025SHans de Goede #endif 4753b824025SHans de Goede 4762ec3a612SHans de Goede #include <config_distro_bootcmd.h> 4772ec3a612SHans de Goede 47886b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD 47986b49093SHans de Goede #define CONSOLE_STDIN_SETTINGS \ 48086b49093SHans de Goede "preboot=usb start\0" \ 48186b49093SHans de Goede "stdin=serial,usbkbd\0" 48286b49093SHans de Goede #else 4837f2c521fSLuc Verhaegen #define CONSOLE_STDIN_SETTINGS \ 4847f2c521fSLuc Verhaegen "stdin=serial\0" 48586b49093SHans de Goede #endif 4867f2c521fSLuc Verhaegen 4877f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO 4887f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 4897f2c521fSLuc Verhaegen "stdout=serial,vga\0" \ 4907f2c521fSLuc Verhaegen "stderr=serial,vga\0" 4917f2c521fSLuc Verhaegen #else 4927f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \ 4937f2c521fSLuc Verhaegen "stdout=serial\0" \ 4947f2c521fSLuc Verhaegen "stderr=serial\0" 4957f2c521fSLuc Verhaegen #endif 4967f2c521fSLuc Verhaegen 4977f2c521fSLuc Verhaegen #define CONSOLE_ENV_SETTINGS \ 4987f2c521fSLuc Verhaegen CONSOLE_STDIN_SETTINGS \ 4997f2c521fSLuc Verhaegen CONSOLE_STDOUT_SETTINGS 5007f2c521fSLuc Verhaegen 5012ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \ 5027f2c521fSLuc Verhaegen CONSOLE_ENV_SETTINGS \ 503846e3254SHans de Goede MEM_LAYOUT_ENV_SETTINGS \ 5042a909c5fSSiarhei Siamashka DFU_ALT_INFO_RAM \ 50525acd33fSHans de Goede "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ 506846e3254SHans de Goede "console=ttyS0,115200\0" \ 5073b824025SHans de Goede BOOTCMD_SUNXI_COMPAT \ 5082ec3a612SHans de Goede BOOTENV 5092ec3a612SHans de Goede 5102ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */ 5112ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS 512cba69eeeSIan Campbell #endif 513cba69eeeSIan Campbell 514cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */ 515