xref: /rk3399_rockchip-uboot/include/configs/sunxi-common.h (revision 1a81cf8399675056beef5e76be8a9380d88c4ebf)
1cba69eeeSIan Campbell /*
2cba69eeeSIan Campbell  * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3cba69eeeSIan Campbell  *
4cba69eeeSIan Campbell  * (C) Copyright 2007-2011
5cba69eeeSIan Campbell  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6cba69eeeSIan Campbell  * Tom Cubie <tangliang@allwinnertech.com>
7cba69eeeSIan Campbell  *
8cba69eeeSIan Campbell  * Configuration settings for the Allwinner sunxi series of boards.
9cba69eeeSIan Campbell  *
10cba69eeeSIan Campbell  * SPDX-License-Identifier:	GPL-2.0+
11cba69eeeSIan Campbell  */
12cba69eeeSIan Campbell 
13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H
14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H
15cba69eeeSIan Campbell 
16cba69eeeSIan Campbell /*
17cba69eeeSIan Campbell  * High Level Configuration Options
18cba69eeeSIan Campbell  */
19cba69eeeSIan Campbell #define CONFIG_SUNXI		/* sunxi family */
2050827a59SIan Campbell #ifdef CONFIG_SPL_BUILD
2150827a59SIan Campbell #ifndef CONFIG_SPL_FEL
2250827a59SIan Campbell #define CONFIG_SYS_THUMB_BUILD	/* Thumbs mode to save space in SPL */
2350827a59SIan Campbell #endif
2450827a59SIan Campbell #endif
25cba69eeeSIan Campbell 
26cba69eeeSIan Campbell #include <asm/arch/cpu.h>	/* get chip and board defs */
27cba69eeeSIan Campbell 
28cba69eeeSIan Campbell #define CONFIG_SYS_TEXT_BASE		0x4a000000
29cba69eeeSIan Campbell 
3057f878efSSimon Glass #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM)
3157f878efSSimon Glass # define CONFIG_CMD_DM
327aa97485SSimon Glass # define CONFIG_DM_GPIO
33*1a81cf83SSimon Glass # define CONFIG_DM_SERIAL
34*1a81cf83SSimon Glass # define CONFIG_DW_SERIAL
35*1a81cf83SSimon Glass # define CONFIG_SYS_MALLOC_F_LEN	(1 << 10)
3657f878efSSimon Glass #endif
3757f878efSSimon Glass 
38cba69eeeSIan Campbell /*
39cba69eeeSIan Campbell  * Display CPU information
40cba69eeeSIan Campbell  */
41cba69eeeSIan Campbell #define CONFIG_DISPLAY_CPUINFO
42cba69eeeSIan Campbell 
43cba69eeeSIan Campbell /* Serial & console */
44cba69eeeSIan Campbell #define CONFIG_SYS_NS16550
45cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL
46cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */
47cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK		24000000
48*1a81cf83SSimon Glass #ifndef CONFIG_DM_SERIAL
49*1a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE	-4
50cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
51cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
52cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
53cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
54c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
55*1a81cf83SSimon Glass #endif
56cba69eeeSIan Campbell 
57cba69eeeSIan Campbell /* DRAM Base */
58cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE		0x40000000
59cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR	0x0
60cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
61cba69eeeSIan Campbell 
62cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \
63cba69eeeSIan Campbell 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
64cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \
65cba69eeeSIan Campbell 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
66cba69eeeSIan Campbell 
67cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS		1
68cba69eeeSIan Campbell #define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
69cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */
70cba69eeeSIan Campbell 
71a6e50a88SIan Campbell #ifdef CONFIG_AHCI
72a6e50a88SIan Campbell #define CONFIG_LIBATA
73a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI
74a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT
75a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI
76a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
77a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN		1
78a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
79a6e50a88SIan Campbell 					 CONFIG_SYS_SCSI_MAX_LUN)
80a6e50a88SIan Campbell #define CONFIG_CMD_SCSI
81a6e50a88SIan Campbell #endif
82a6e50a88SIan Campbell 
83cba69eeeSIan Campbell #define CONFIG_CMD_MEMORY
84cba69eeeSIan Campbell #define CONFIG_CMD_SETEXPR
85cba69eeeSIan Campbell 
86cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS
87cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG
88cba69eeeSIan Campbell #define CONFIG_INITRD_TAG
89cba69eeeSIan Campbell 
90e24ea55cSIan Campbell /* mmc config */
91ff2b47f6SChen-Yu Tsai #if !defined(CONFIG_UART0_PORT_F)
92e24ea55cSIan Campbell #define CONFIG_MMC
93e24ea55cSIan Campbell #define CONFIG_GENERIC_MMC
94e24ea55cSIan Campbell #define CONFIG_CMD_MMC
95e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI
96e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT		0
97e24ea55cSIan Campbell #define CONFIG_ENV_IS_IN_MMC
98e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
99ff2b47f6SChen-Yu Tsai #endif
100e24ea55cSIan Campbell 
101cba69eeeSIan Campbell /* 4MB of malloc() pool */
102cba69eeeSIan Campbell #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (4 << 20))
103cba69eeeSIan Campbell 
104cba69eeeSIan Campbell /*
105cba69eeeSIan Campbell  * Miscellaneous configurable options
106cba69eeeSIan Campbell  */
107cba69eeeSIan Campbell #define CONFIG_CMD_ECHO
10806beadb0SIan Campbell #define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
10906beadb0SIan Campbell #define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
110cba69eeeSIan Campbell #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
111cba69eeeSIan Campbell #define CONFIG_SYS_GENERIC_BOARD
112cba69eeeSIan Campbell 
113cba69eeeSIan Campbell /* Boot Argument Buffer Size */
114cba69eeeSIan Campbell #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
115cba69eeeSIan Campbell 
116846e3254SHans de Goede #define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
117cba69eeeSIan Campbell 
118cba69eeeSIan Campbell /* standalone support */
119846e3254SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR	0x42000000
120cba69eeeSIan Campbell 
121cba69eeeSIan Campbell /* baudrate */
122cba69eeeSIan Campbell #define CONFIG_BAUDRATE			115200
123cba69eeeSIan Campbell 
124cba69eeeSIan Campbell /* The stack sizes are set up in start.S using the settings below */
125cba69eeeSIan Campbell #define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */
126cba69eeeSIan Campbell 
127cba69eeeSIan Campbell /* FLASH and environment organization */
128cba69eeeSIan Campbell 
129cba69eeeSIan Campbell #define CONFIG_SYS_NO_FLASH
130cba69eeeSIan Campbell 
131cba69eeeSIan Campbell #define CONFIG_SYS_MONITOR_LEN		(512 << 10)	/* 512 KiB */
132cba69eeeSIan Campbell #define CONFIG_IDENT_STRING		" Allwinner Technology"
133cba69eeeSIan Campbell 
134e24ea55cSIan Campbell #define CONFIG_ENV_OFFSET		(544 << 10) /* (8 + 24 + 512) KiB */
135cba69eeeSIan Campbell #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
136cba69eeeSIan Campbell 
137cba69eeeSIan Campbell #include <config_cmd_default.h>
138b9fb3b94SHans de Goede #undef CONFIG_CMD_FPGA
139cba69eeeSIan Campbell 
140cba69eeeSIan Campbell #define CONFIG_FAT_WRITE	/* enable write access */
141cba69eeeSIan Campbell 
142cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK
143cba69eeeSIan Campbell #define CONFIG_SPL_LIBCOMMON_SUPPORT
144cba69eeeSIan Campbell #define CONFIG_SPL_SERIAL_SUPPORT
145cba69eeeSIan Campbell #define CONFIG_SPL_LIBGENERIC_SUPPORT
146cba69eeeSIan Campbell 
14750827a59SIan Campbell #ifdef CONFIG_SPL_FEL
14850827a59SIan Campbell 
149cba69eeeSIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
150cba69eeeSIan Campbell #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
151cba69eeeSIan Campbell #define CONFIG_SPL_TEXT_BASE		0x2000
152cba69eeeSIan Campbell #define CONFIG_SPL_MAX_SIZE		0x4000		/* 16 KiB */
15350827a59SIan Campbell 
15450827a59SIan Campbell #else /* CONFIG_SPL */
15550827a59SIan Campbell 
15650827a59SIan Campbell #define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
15750827a59SIan Campbell #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KiB */
15850827a59SIan Campbell 
15950827a59SIan Campbell #define CONFIG_SPL_TEXT_BASE		0x20		/* sram start+header */
16050827a59SIan Campbell #define CONFIG_SPL_MAX_SIZE		0x5fe0		/* 24KB on sun4i/sun7i */
16150827a59SIan Campbell 
16250827a59SIan Campbell #define CONFIG_SPL_LIBDISK_SUPPORT
16350827a59SIan Campbell #define CONFIG_SPL_MMC_SUPPORT
16450827a59SIan Campbell 
16550827a59SIan Campbell #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
16650827a59SIan Campbell 
16750827a59SIan Campbell #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	80	/* 40KiB */
16850827a59SIan Campbell #define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */
16950827a59SIan Campbell 
17050827a59SIan Campbell #endif /* CONFIG_SPL */
17150827a59SIan Campbell 
172cba69eeeSIan Campbell /* end of 32 KiB in sram */
173cba69eeeSIan Campbell #define LOW_LEVEL_SRAM_STACK		0x00008000 /* End of sram */
174cba69eeeSIan Campbell #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
175cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_START	0x4ff00000
176cba69eeeSIan Campbell #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00080000	/* 512 KiB */
177cba69eeeSIan Campbell 
1786620377eSHans de Goede /* I2C */
1796620377eSHans de Goede #define CONFIG_SPL_I2C_SUPPORT
1806620377eSHans de Goede #define CONFIG_SYS_I2C
1816620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI
1826620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED		400000
1836620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE		0x7f
1846620377eSHans de Goede #define CONFIG_CMD_I2C
1856620377eSHans de Goede 
18614bc66bdSHenrik Nordstrom /* PMU */
18714bc66bdSHenrik Nordstrom #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
18814bc66bdSHenrik Nordstrom #define CONFIG_SPL_POWER_SUPPORT
18914bc66bdSHenrik Nordstrom #endif
19014bc66bdSHenrik Nordstrom 
191f84269c5SHans de Goede #ifndef CONFIG_CONS_INDEX
192cba69eeeSIan Campbell #define CONFIG_CONS_INDEX              1       /* UART0 */
193f84269c5SHans de Goede #endif
194cba69eeeSIan Campbell 
195abce2c62SIan Campbell /* GPIO */
196abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO
197cd82113aSHans de Goede #define CONFIG_SPL_GPIO_SUPPORT
198abce2c62SIan Campbell #define CONFIG_CMD_GPIO
199abce2c62SIan Campbell 
200c26fb9dbSHans de Goede /* Ethernet support */
201c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC
202c26fb9dbSHans de Goede #define CONFIG_MII			/* MII PHY management		*/
203c26fb9dbSHans de Goede #endif
204c26fb9dbSHans de Goede 
2055835823dSIan Campbell #ifdef CONFIG_SUNXI_GMAC
2065835823dSIan Campbell #define CONFIG_DESIGNWARE_ETH		/* GMAC can use designware driver */
2075835823dSIan Campbell #define CONFIG_DW_AUTONEG
2085835823dSIan Campbell #define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
2095835823dSIan Campbell #define CONFIG_PHY_ADDR		1
2105835823dSIan Campbell #define CONFIG_MII			/* MII PHY management		*/
2115835823dSIan Campbell #define CONFIG_PHYLIB
2125835823dSIan Campbell #endif
2135835823dSIan Campbell 
2143584f30cSRoman Byshko #ifdef CONFIG_USB_EHCI
2153584f30cSRoman Byshko #define CONFIG_CMD_USB
2163584f30cSRoman Byshko #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
2173584f30cSRoman Byshko #define CONFIG_USB_STORAGE
2183584f30cSRoman Byshko #endif
2193584f30cSRoman Byshko 
220cba69eeeSIan Campbell #if !defined CONFIG_ENV_IS_IN_MMC && \
221cba69eeeSIan Campbell     !defined CONFIG_ENV_IS_IN_NAND && \
222cba69eeeSIan Campbell     !defined CONFIG_ENV_IS_IN_FAT && \
223cba69eeeSIan Campbell     !defined CONFIG_ENV_IS_IN_SPI_FLASH
224cba69eeeSIan Campbell #define CONFIG_ENV_IS_NOWHERE
225cba69eeeSIan Campbell #endif
226cba69eeeSIan Campbell 
227b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R
228b41d7d05SJonathan Liu 
229cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD
230cba69eeeSIan Campbell #include <config_distro_defaults.h>
2312ec3a612SHans de Goede 
232846e3254SHans de Goede /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
233846e3254SHans de Goede  * 1M script, 1M pxe and the ramdisk at the end */
234846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \
235846e3254SHans de Goede 	"bootm_size=0x10000000\0" \
236846e3254SHans de Goede 	"kernel_addr_r=0x42000000\0" \
237846e3254SHans de Goede 	"fdt_addr_r=0x43000000\0" \
238846e3254SHans de Goede 	"scriptaddr=0x43100000\0" \
239846e3254SHans de Goede 	"pxefile_addr_r=0x43200000\0" \
240846e3254SHans de Goede 	"ramdisk_addr_r=0x43300000\0"
241846e3254SHans de Goede 
24241f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC
24341f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
24441f8e9f5SChen-Yu Tsai #else
24541f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func)
24641f8e9f5SChen-Yu Tsai #endif
24741f8e9f5SChen-Yu Tsai 
2482ec3a612SHans de Goede #ifdef CONFIG_AHCI
2492ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
2502ec3a612SHans de Goede #else
2512ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func)
2522ec3a612SHans de Goede #endif
2532ec3a612SHans de Goede 
254859b3f14SChen-Yu Tsai #ifdef CONFIG_USB_EHCI
255859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
256859b3f14SChen-Yu Tsai #else
257859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func)
258859b3f14SChen-Yu Tsai #endif
259859b3f14SChen-Yu Tsai 
2602ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \
26141f8e9f5SChen-Yu Tsai 	BOOT_TARGET_DEVICES_MMC(func) \
2622ec3a612SHans de Goede 	BOOT_TARGET_DEVICES_SCSI(func) \
263859b3f14SChen-Yu Tsai 	BOOT_TARGET_DEVICES_USB(func) \
2642ec3a612SHans de Goede 	func(PXE, pxe, na) \
2652ec3a612SHans de Goede 	func(DHCP, dhcp, na)
2662ec3a612SHans de Goede 
2672ec3a612SHans de Goede #include <config_distro_bootcmd.h>
2682ec3a612SHans de Goede 
2692ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \
270846e3254SHans de Goede 	MEM_LAYOUT_ENV_SETTINGS \
27198e214ddSIan Campbell 	"fdtfile=" CONFIG_FDTFILE "\0" \
272846e3254SHans de Goede 	"console=ttyS0,115200\0" \
2732ec3a612SHans de Goede 	BOOTENV
2742ec3a612SHans de Goede 
2752ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */
2762ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS
277cba69eeeSIan Campbell #endif
278cba69eeeSIan Campbell 
279cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */
280