xref: /rk3399_rockchip-uboot/include/configs/sunxi-common.h (revision 577968e5669858e1d5bcb651ab28d60d20166252)
1cba69eeeSIan Campbell /*
2cba69eeeSIan Campbell  * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3cba69eeeSIan Campbell  *
4cba69eeeSIan Campbell  * (C) Copyright 2007-2011
5cba69eeeSIan Campbell  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6cba69eeeSIan Campbell  * Tom Cubie <tangliang@allwinnertech.com>
7cba69eeeSIan Campbell  *
8cba69eeeSIan Campbell  * Configuration settings for the Allwinner sunxi series of boards.
9cba69eeeSIan Campbell  *
10cba69eeeSIan Campbell  * SPDX-License-Identifier:	GPL-2.0+
11cba69eeeSIan Campbell  */
12cba69eeeSIan Campbell 
13cba69eeeSIan Campbell #ifndef _SUNXI_COMMON_CONFIG_H
14cba69eeeSIan Campbell #define _SUNXI_COMMON_CONFIG_H
15cba69eeeSIan Campbell 
16daf6d399SHans de Goede #include <asm/arch/cpu.h>
17e049fe28SHans de Goede #include <linux/stringify.h>
18e049fe28SHans de Goede 
1977ef1369SSiarhei Siamashka #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
2077ef1369SSiarhei Siamashka /*
2177ef1369SSiarhei Siamashka  * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
2277ef1369SSiarhei Siamashka  * expense of restricting some features, so the regular machine id values can
2377ef1369SSiarhei Siamashka  * be used.
2477ef1369SSiarhei Siamashka  */
2577ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV	0
2677ef1369SSiarhei Siamashka #else
2777ef1369SSiarhei Siamashka /*
2877ef1369SSiarhei Siamashka  * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
2977ef1369SSiarhei Siamashka  * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
3077ef1369SSiarhei Siamashka  * beyond the machine id check.
3177ef1369SSiarhei Siamashka  */
3277ef1369SSiarhei Siamashka # define CONFIG_MACH_TYPE_COMPAT_REV	1
3377ef1369SSiarhei Siamashka #endif
3477ef1369SSiarhei Siamashka 
35d29adf8eSAndre Przywara #ifdef CONFIG_ARM64
36d29adf8eSAndre Przywara #define CONFIG_BUILD_TARGET "u-boot.itb"
37d29adf8eSAndre Przywara #endif
38d29adf8eSAndre Przywara 
39cba69eeeSIan Campbell /* Serial & console */
40cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_SERIAL
41cba69eeeSIan Campbell /* ns16550 reg in the low bits of cpu reg */
42cba69eeeSIan Campbell #define CONFIG_SYS_NS16550_CLK		24000000
434fb60552SThomas Chou #ifndef CONFIG_DM_SERIAL
441a81cf83SSimon Glass # define CONFIG_SYS_NS16550_REG_SIZE	-4
45cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
46cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
47cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
48cba69eeeSIan Campbell # define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
49c757a50bSChen-Yu Tsai # define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
501a81cf83SSimon Glass #endif
51cba69eeeSIan Campbell 
528a65f69cSPaul Kocialkowski /* CPU */
53e4916e85SAndre Przywara #define COUNTER_FREQUENCY		24000000
548a65f69cSPaul Kocialkowski 
55e049fe28SHans de Goede /*
56e049fe28SHans de Goede  * The DRAM Base differs between some models. We cannot use macros for the
57e049fe28SHans de Goede  * CONFIG_FOO defines which contain the DRAM base address since they end
58e049fe28SHans de Goede  * up unexpanded in include/autoconf.mk .
59e049fe28SHans de Goede  *
60e049fe28SHans de Goede  * So we have to have this #ifdef #else #endif block for these.
61e049fe28SHans de Goede  */
62e049fe28SHans de Goede #ifdef CONFIG_MACH_SUN9I
63e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x2##x
64e049fe28SHans de Goede #define CONFIG_SYS_SDRAM_BASE		0x20000000
65e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR		0x22000000 /* default load address */
66e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE		0x2a000000
67ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
68ff42d107SHans de Goede  * since it needs to fit in with the other values. By also #defining it
69ff42d107SHans de Goede  * we get warnings if the Kconfig value mismatches. */
70ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR		0x2fe00000
71e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR	0x2ff80000
72e049fe28SHans de Goede #else
73e049fe28SHans de Goede #define SDRAM_OFFSET(x) 0x4##x
74cba69eeeSIan Campbell #define CONFIG_SYS_SDRAM_BASE		0x40000000
75e049fe28SHans de Goede #define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
76c199489fSIcenowy Zheng /* V3s do not have enough memory to place code at 0x4a000000 */
77c199489fSIcenowy Zheng #ifndef CONFIG_MACH_SUN8I_V3S
78e049fe28SHans de Goede #define CONFIG_SYS_TEXT_BASE		0x4a000000
79c199489fSIcenowy Zheng #else
80c199489fSIcenowy Zheng #define CONFIG_SYS_TEXT_BASE		0x42e00000
81c199489fSIcenowy Zheng #endif
82ff42d107SHans de Goede /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
83ff42d107SHans de Goede  * since it needs to fit in with the other values. By also #defining it
84ff42d107SHans de Goede  * we get warnings if the Kconfig value mismatches. */
85ff42d107SHans de Goede #define CONFIG_SPL_STACK_R_ADDR		0x4fe00000
86e049fe28SHans de Goede #define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
87e049fe28SHans de Goede #endif
88e049fe28SHans de Goede 
89e049fe28SHans de Goede #define CONFIG_SPL_BSS_MAX_SIZE		0x00080000 /* 512 KiB */
90e049fe28SHans de Goede 
91bc613d85SAndre Przywara #ifdef CONFIG_SUNXI_HIGH_SRAM
9277fe9887SHans de Goede /*
9377fe9887SHans de Goede  * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
9477fe9887SHans de Goede  * slightly bigger. Note that it is possible to map the first 32 KiB of the
9577fe9887SHans de Goede  * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
9677fe9887SHans de Goede  * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
9777fe9887SHans de Goede  * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
9877fe9887SHans de Goede  */
9977fe9887SHans de Goede #define CONFIG_SYS_INIT_RAM_ADDR	0x10000
100eb504fa1SAndre Przywara #define CONFIG_SYS_INIT_RAM_SIZE	0x08000	/* FIXME: 40 KiB ? */
10177fe9887SHans de Goede #else
102cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_ADDR	0x0
103cba69eeeSIan Campbell #define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
10477fe9887SHans de Goede #endif
105cba69eeeSIan Campbell 
106cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_OFFSET \
107cba69eeeSIan Campbell 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
108cba69eeeSIan Campbell #define CONFIG_SYS_INIT_SP_ADDR \
109cba69eeeSIan Campbell 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
110cba69eeeSIan Campbell 
111cba69eeeSIan Campbell #define CONFIG_NR_DRAM_BANKS		1
112cba69eeeSIan Campbell #define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
113cba69eeeSIan Campbell #define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */
114cba69eeeSIan Campbell 
115a6e50a88SIan Campbell #ifdef CONFIG_AHCI
116a6e50a88SIan Campbell #define CONFIG_LIBATA
117a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI
118a6e50a88SIan Campbell #define CONFIG_SCSI_AHCI_PLAT
119a6e50a88SIan Campbell #define CONFIG_SUNXI_AHCI
1200751b138SBernhard Nortmann #define CONFIG_SYS_64BIT_LBA
121a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
122a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_LUN		1
123a6e50a88SIan Campbell #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
124a6e50a88SIan Campbell 					 CONFIG_SYS_SCSI_MAX_LUN)
125a6e50a88SIan Campbell #endif
126a6e50a88SIan Campbell 
127cba69eeeSIan Campbell #define CONFIG_SETUP_MEMORY_TAGS
128cba69eeeSIan Campbell #define CONFIG_CMDLINE_TAG
129cba69eeeSIan Campbell #define CONFIG_INITRD_TAG
1309f852211SPaul Kocialkowski #define CONFIG_SERIAL_TAG
131cba69eeeSIan Campbell 
132e5268616SHans de Goede #ifdef CONFIG_NAND_SUNXI
133a0dfa88bSBoris Brezillon #define CONFIG_SYS_NAND_MAX_ECCPOS 1664
1344ccae81cSBoris Brezillon #define CONFIG_SYS_NAND_ONFI_DETECTION
1354ccae81cSBoris Brezillon #define CONFIG_SYS_MAX_NAND_DEVICE 8
136960caebaSPiotr Zierhoffer #endif
137960caebaSPiotr Zierhoffer 
13819e99fb4SSiarhei Siamashka #ifdef CONFIG_SPL_SPI_SUNXI
13919e99fb4SSiarhei Siamashka #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
14019e99fb4SSiarhei Siamashka #endif
14119e99fb4SSiarhei Siamashka 
142e24ea55cSIan Campbell /* mmc config */
14344c79879SMaxime Ripard #ifdef CONFIG_MMC
144e24ea55cSIan Campbell #define CONFIG_MMC_SUNXI_SLOT		0
145fb1c43ccSMaxime Ripard #endif
146fb1c43ccSMaxime Ripard 
147fb1c43ccSMaxime Ripard #if defined(CONFIG_ENV_IS_IN_MMC)
148e24ea55cSIan Campbell #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
149ae042bebSEmmanuel Vadot #define CONFIG_SYS_MMC_MAX_DEVICE	4
150d6a7e0cbSMaxime Ripard #elif defined(CONFIG_ENV_IS_NOWHERE)
151d6a7e0cbSMaxime Ripard #define CONFIG_ENV_SIZE			(128 << 10)
152ff2b47f6SChen-Yu Tsai #endif
153e24ea55cSIan Campbell 
154c199489fSIcenowy Zheng #ifndef CONFIG_MACH_SUN8I_V3S
1555c965ed9SHans de Goede /* 64MB of malloc() pool */
1565c965ed9SHans de Goede #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (64 << 20))
157c199489fSIcenowy Zheng #else
158c199489fSIcenowy Zheng /* 2MB of malloc() pool */
159c199489fSIcenowy Zheng #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (2 << 20))
160c199489fSIcenowy Zheng #endif
161cba69eeeSIan Campbell 
162cba69eeeSIan Campbell /*
163cba69eeeSIan Campbell  * Miscellaneous configurable options
164cba69eeeSIan Campbell  */
16506beadb0SIan Campbell #define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
16606beadb0SIan Campbell #define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
167cba69eeeSIan Campbell 
168cba69eeeSIan Campbell /* standalone support */
169e049fe28SHans de Goede #define CONFIG_STANDALONE_LOAD_ADDR	CONFIG_SYS_LOAD_ADDR
170cba69eeeSIan Campbell 
171cba69eeeSIan Campbell /* FLASH and environment organization */
172cba69eeeSIan Campbell 
173fa5e1020SBoris Brezillon #define CONFIG_SYS_MONITOR_LEN		(768 << 10)	/* 768 KiB */
174cba69eeeSIan Campbell 
175cba69eeeSIan Campbell #define CONFIG_SPL_FRAMEWORK
176cba69eeeSIan Campbell 
177eb77f5c9SAndre Przywara #ifndef CONFIG_ARM64		/* AArch64 FEL support is not ready yet */
178942cb0b6SSimon Glass #define CONFIG_SPL_BOARD_LOAD_IMAGE
179eb77f5c9SAndre Przywara #endif
180942cb0b6SSimon Glass 
181bc613d85SAndre Przywara #ifdef CONFIG_SUNXI_HIGH_SRAM
1827f0ef5a9SSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE		0x10060		/* sram start+header */
1837f0ef5a9SSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE		0x7fa0		/* 32 KiB */
18454522c92SAndre Przywara #ifdef CONFIG_ARM64
18554522c92SAndre Przywara /* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
18654522c92SAndre Przywara #define LOW_LEVEL_SRAM_STACK		0x00054000
18754522c92SAndre Przywara #else
188bc613d85SAndre Przywara #define LOW_LEVEL_SRAM_STACK		0x00018000
18954522c92SAndre Przywara #endif /* !CONFIG_ARM64 */
190d96ebc46SSiarhei Siamashka #else
1917f0ef5a9SSiarhei Siamashka #define CONFIG_SPL_TEXT_BASE		0x60		/* sram start+header */
1927f0ef5a9SSiarhei Siamashka #define CONFIG_SPL_MAX_SIZE		0x5fa0		/* 24KB on sun4i/sun7i */
193bc613d85SAndre Przywara #define LOW_LEVEL_SRAM_STACK		0x00008000	/* End of sram */
194d96ebc46SSiarhei Siamashka #endif
19550827a59SIan Campbell 
196bc613d85SAndre Przywara #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
197bc613d85SAndre Przywara 
19850827a59SIan Campbell #define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */
19950827a59SIan Campbell 
200cba69eeeSIan Campbell 
2016620377eSHans de Goede /* I2C */
2020d8382aeSJelle van der Waa #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
2030d8382aeSJelle van der Waa     defined CONFIG_SY8106A_POWER
204ad40610bSHans de Goede #endif
205ad40610bSHans de Goede 
2066c739c5dSPaul Kocialkowski #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
2076c739c5dSPaul Kocialkowski     defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
2089d082687SJelle van der Waa     defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
2096620377eSHans de Goede #define CONFIG_SYS_I2C_MVTWSI
210a8f01ccfSJernej Skrabec #ifndef CONFIG_DM_I2C
211a8f01ccfSJernej Skrabec #define CONFIG_SYS_I2C
2126620377eSHans de Goede #define CONFIG_SYS_I2C_SPEED		400000
2136620377eSHans de Goede #define CONFIG_SYS_I2C_SLAVE		0x7f
2148b2db32aSHans de Goede #endif
215a8f01ccfSJernej Skrabec #endif
21655410089SHans de Goede 
21755410089SHans de Goede #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
21855410089SHans de Goede #define CONFIG_SYS_I2C_SOFT
21955410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SPEED	50000
22055410089SHans de Goede #define CONFIG_SYS_I2C_SOFT_SLAVE	0x00
22155410089SHans de Goede /* We use pin names in Kconfig and sunxi_name_to_gpio() */
22255410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SDA	soft_i2c_gpio_sda
22355410089SHans de Goede #define CONFIG_SOFT_I2C_GPIO_SCL	soft_i2c_gpio_scl
22455410089SHans de Goede #ifndef __ASSEMBLY__
22555410089SHans de Goede extern int soft_i2c_gpio_sda;
22655410089SHans de Goede extern int soft_i2c_gpio_scl;
22755410089SHans de Goede #endif
2281fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS	0 /* The lcd panel soft i2c is bus 0 */
2291fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM		1 /* And the axp209 i2c bus is bus 1 */
2301fc42018SHans de Goede #else
2311fc42018SHans de Goede #define CONFIG_SYS_SPD_BUS_NUM		0 /* The axp209 i2c bus is bus 0 */
2321fc42018SHans de Goede #define CONFIG_VIDEO_LCD_I2C_BUS	-1 /* NA, but necessary to compile */
23355410089SHans de Goede #endif
23455410089SHans de Goede 
23514bc66bdSHenrik Nordstrom /* PMU */
23695ab8feeSvishnupatekar #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
2370d8382aeSJelle van der Waa     defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
2380d8382aeSJelle van der Waa     defined CONFIG_SY8106A_POWER
23914bc66bdSHenrik Nordstrom #endif
24014bc66bdSHenrik Nordstrom 
241a5da3c83SHans de Goede #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
242f3133962SHans de Goede #if CONFIG_CONS_INDEX == 1
243f3133962SHans de Goede #ifdef CONFIG_MACH_SUN9I
244f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc/serial@07000000:115200"
245f3133962SHans de Goede #else
246f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28000:115200"
247f3133962SHans de Goede #endif
248f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
249f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
2505cd83b11SLaurent Itti #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
2515cd83b11SLaurent Itti #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
252f3133962SHans de Goede #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
253f3133962SHans de Goede #define OF_STDOUT_PATH		"/soc@01c00000/serial@01f02800:115200"
254f3133962SHans de Goede #else
255f3133962SHans de Goede #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
256f3133962SHans de Goede #endif
257a5da3c83SHans de Goede #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
258f3133962SHans de Goede 
259abce2c62SIan Campbell /* GPIO */
260abce2c62SIan Campbell #define CONFIG_SUNXI_GPIO
261abce2c62SIan Campbell 
2627f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO
2637f2c521fSLuc Verhaegen /*
2645633a296SHans de Goede  * The amount of RAM to keep free at the top of RAM when relocating u-boot,
2655633a296SHans de Goede  * to use as framebuffer. This must be a multiple of 4096.
2667f2c521fSLuc Verhaegen  */
2675c965ed9SHans de Goede #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
2687f2c521fSLuc Verhaegen 
2692d7a084bSLuc Verhaegen /* Do we want to initialize a simple FB? */
2702d7a084bSLuc Verhaegen #define CONFIG_VIDEO_DT_SIMPLEFB
2712d7a084bSLuc Verhaegen 
2727f2c521fSLuc Verhaegen #define CONFIG_VIDEO_SUNXI
2737f2c521fSLuc Verhaegen 
2747f2c521fSLuc Verhaegen #define CONFIG_VIDEO_LOGO
275be8ec633SHans de Goede #define CONFIG_VIDEO_STD_TIMINGS
27675481607SHans de Goede #define CONFIG_I2C_EDID
27758332f89SHans de Goede #define VIDEO_LINE_LEN (pGD->plnSizeX)
2787f2c521fSLuc Verhaegen 
2797f2c521fSLuc Verhaegen /* allow both serial and cfb console. */
2807f2c521fSLuc Verhaegen /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
2817f2c521fSLuc Verhaegen 
2827f2c521fSLuc Verhaegen #endif /* CONFIG_VIDEO */
2837f2c521fSLuc Verhaegen 
284c26fb9dbSHans de Goede /* Ethernet support */
285c26fb9dbSHans de Goede #ifdef CONFIG_SUNXI_EMAC
2868145dea4SHans de Goede #define CONFIG_PHY_ADDR		1
287c26fb9dbSHans de Goede #define CONFIG_MII			/* MII PHY management		*/
288c26fb9dbSHans de Goede #endif
289c26fb9dbSHans de Goede 
290*6ff005cfSDave Prue #ifdef CONFIG_SUN7I_GMAC
2915835823dSIan Campbell #define CONFIG_PHY_ADDR		1
2925835823dSIan Campbell #define CONFIG_MII			/* MII PHY management		*/
2931eae8f66SHans de Goede #define CONFIG_PHY_REALTEK
2945835823dSIan Campbell #endif
2955835823dSIan Campbell 
2962582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_EHCI_HCD
2976a72e804SHans de Goede #define CONFIG_USB_OHCI_NEW
2986a72e804SHans de Goede #define CONFIG_USB_OHCI_SUNXI
2996a72e804SHans de Goede #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
3001a800f7aSHans de Goede #endif
3011a800f7aSHans de Goede 
3021a800f7aSHans de Goede #ifdef CONFIG_USB_MUSB_SUNXI
30395de1e2fSPaul Kocialkowski #define CONFIG_USB_MUSB_PIO_ONLY
3041a800f7aSHans de Goede #endif
3051a800f7aSHans de Goede 
306b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_MUSB_GADGET
307aaa4a9e3SSam Protsenko #define CONFIG_USB_FUNCTION_MASS_STORAGE
308b21144ebSPaul Kocialkowski #endif
309b21144ebSPaul Kocialkowski 
310b21144ebSPaul Kocialkowski #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
311b21144ebSPaul Kocialkowski #endif
312b21144ebSPaul Kocialkowski 
31386b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD
31486b49093SHans de Goede #define CONFIG_PREBOOT
31586b49093SHans de Goede #endif
31686b49093SHans de Goede 
317b41d7d05SJonathan Liu #define CONFIG_MISC_INIT_R
318b41d7d05SJonathan Liu 
319cba69eeeSIan Campbell #ifndef CONFIG_SPL_BUILD
320cba69eeeSIan Campbell #include <config_distro_defaults.h>
3212ec3a612SHans de Goede 
322671f9ad8SAndre Przywara #ifdef CONFIG_ARM64
323671f9ad8SAndre Przywara /*
324671f9ad8SAndre Przywara  * Boards seem to come with at least 512MB of DRAM.
325671f9ad8SAndre Przywara  * The kernel should go at 512K, which is the default text offset (that will
326671f9ad8SAndre Przywara  * be adjusted at runtime if needed).
327671f9ad8SAndre Przywara  * There is no compression for arm64 kernels (yet), so leave some space
328671f9ad8SAndre Przywara  * for really big kernels, say 256MB for now.
329671f9ad8SAndre Przywara  * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
330671f9ad8SAndre Przywara  * Align the initrd to a 2MB page.
331671f9ad8SAndre Przywara  */
332c199489fSIcenowy Zheng #define BOOTM_SIZE	__stringify(0xa000000)
333671f9ad8SAndre Przywara #define KERNEL_ADDR_R	__stringify(SDRAM_OFFSET(0080000))
334671f9ad8SAndre Przywara #define FDT_ADDR_R	__stringify(SDRAM_OFFSET(FA00000))
335671f9ad8SAndre Przywara #define SCRIPT_ADDR_R	__stringify(SDRAM_OFFSET(FC00000))
336671f9ad8SAndre Przywara #define PXEFILE_ADDR_R	__stringify(SDRAM_OFFSET(FD00000))
337671f9ad8SAndre Przywara #define RAMDISK_ADDR_R	__stringify(SDRAM_OFFSET(FE00000))
338671f9ad8SAndre Przywara 
339671f9ad8SAndre Przywara #else
3408c95c556SHans de Goede /*
3415c965ed9SHans de Goede  * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
3428c95c556SHans de Goede  * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
3438c95c556SHans de Goede  * 1M script, 1M pxe and the ramdisk at the end.
3448c95c556SHans de Goede  */
345c199489fSIcenowy Zheng #ifndef CONFIG_MACH_SUN8I_V3S
346c199489fSIcenowy Zheng #define BOOTM_SIZE     __stringify(0xa000000)
3472a909c5fSSiarhei Siamashka #define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(2000000))
3482a909c5fSSiarhei Siamashka #define FDT_ADDR_R     __stringify(SDRAM_OFFSET(3000000))
3492a909c5fSSiarhei Siamashka #define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(3100000))
3502a909c5fSSiarhei Siamashka #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
3512a909c5fSSiarhei Siamashka #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
352c199489fSIcenowy Zheng #else
353c199489fSIcenowy Zheng /*
354c199489fSIcenowy Zheng  * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
355c199489fSIcenowy Zheng  * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
356c199489fSIcenowy Zheng  * 1M script, 1M pxe and the ramdisk at the end.
357c199489fSIcenowy Zheng  */
358c199489fSIcenowy Zheng #define BOOTM_SIZE     __stringify(0x2e00000)
359c199489fSIcenowy Zheng #define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(1000000))
360c199489fSIcenowy Zheng #define FDT_ADDR_R     __stringify(SDRAM_OFFSET(1800000))
361c199489fSIcenowy Zheng #define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(1900000))
362c199489fSIcenowy Zheng #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
363c199489fSIcenowy Zheng #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
364c199489fSIcenowy Zheng #endif
365671f9ad8SAndre Przywara #endif
3662a909c5fSSiarhei Siamashka 
367846e3254SHans de Goede #define MEM_LAYOUT_ENV_SETTINGS \
368c199489fSIcenowy Zheng 	"bootm_size=" BOOTM_SIZE "\0" \
3692a909c5fSSiarhei Siamashka 	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
3702a909c5fSSiarhei Siamashka 	"fdt_addr_r=" FDT_ADDR_R "\0" \
3712a909c5fSSiarhei Siamashka 	"scriptaddr=" SCRIPT_ADDR_R "\0" \
3722a909c5fSSiarhei Siamashka 	"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
3732a909c5fSSiarhei Siamashka 	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
3742a909c5fSSiarhei Siamashka 
3752a909c5fSSiarhei Siamashka #define DFU_ALT_INFO_RAM \
3762a909c5fSSiarhei Siamashka 	"dfu_alt_info_ram=" \
3772a909c5fSSiarhei Siamashka 	"kernel ram " KERNEL_ADDR_R " 0x1000000;" \
3782a909c5fSSiarhei Siamashka 	"fdt ram " FDT_ADDR_R " 0x100000;" \
3792a909c5fSSiarhei Siamashka 	"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
380846e3254SHans de Goede 
38141f8e9f5SChen-Yu Tsai #ifdef CONFIG_MMC
38241f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
3835a37a400SKarsten Merker #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
3845a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
3855a37a400SKarsten Merker #else
3865a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
3875a37a400SKarsten Merker #endif
38841f8e9f5SChen-Yu Tsai #else
38941f8e9f5SChen-Yu Tsai #define BOOT_TARGET_DEVICES_MMC(func)
3905a37a400SKarsten Merker #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
39141f8e9f5SChen-Yu Tsai #endif
39241f8e9f5SChen-Yu Tsai 
3932ec3a612SHans de Goede #ifdef CONFIG_AHCI
3942ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
3952ec3a612SHans de Goede #else
3962ec3a612SHans de Goede #define BOOT_TARGET_DEVICES_SCSI(func)
3972ec3a612SHans de Goede #endif
3982ec3a612SHans de Goede 
3992582ca0dSPaul Kocialkowski #ifdef CONFIG_USB_STORAGE
400859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
401859b3f14SChen-Yu Tsai #else
402859b3f14SChen-Yu Tsai #define BOOT_TARGET_DEVICES_USB(func)
403859b3f14SChen-Yu Tsai #endif
404859b3f14SChen-Yu Tsai 
405f3b589c0SBernhard Nortmann /* FEL boot support, auto-execute boot.scr if a script address was provided */
406f3b589c0SBernhard Nortmann #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
407f3b589c0SBernhard Nortmann 	"bootcmd_fel=" \
408f3b589c0SBernhard Nortmann 		"if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
409f3b589c0SBernhard Nortmann 			"echo '(FEL boot)'; " \
410f3b589c0SBernhard Nortmann 			"source ${fel_scriptaddr}; " \
411f3b589c0SBernhard Nortmann 		"fi\0"
412f3b589c0SBernhard Nortmann #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
413f3b589c0SBernhard Nortmann 	"fel "
414f3b589c0SBernhard Nortmann 
4152ec3a612SHans de Goede #define BOOT_TARGET_DEVICES(func) \
416f3b589c0SBernhard Nortmann 	func(FEL, fel, na) \
41741f8e9f5SChen-Yu Tsai 	BOOT_TARGET_DEVICES_MMC(func) \
4185a37a400SKarsten Merker 	BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
4192ec3a612SHans de Goede 	BOOT_TARGET_DEVICES_SCSI(func) \
420859b3f14SChen-Yu Tsai 	BOOT_TARGET_DEVICES_USB(func) \
4212ec3a612SHans de Goede 	func(PXE, pxe, na) \
4222ec3a612SHans de Goede 	func(DHCP, dhcp, na)
4232ec3a612SHans de Goede 
4243b824025SHans de Goede #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
4253b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT \
4263b824025SHans de Goede 	"bootcmd_sunxi_compat=" \
4273b824025SHans de Goede 		"setenv root /dev/mmcblk0p3 rootwait; " \
4283b824025SHans de Goede 		"if ext2load mmc 0 0x44000000 uEnv.txt; then " \
4293b824025SHans de Goede 			"echo Loaded environment from uEnv.txt; " \
4303b824025SHans de Goede 			"env import -t 0x44000000 ${filesize}; " \
4313b824025SHans de Goede 		"fi; " \
4323b824025SHans de Goede 		"setenv bootargs console=${console} root=${root} ${extraargs}; " \
4333b824025SHans de Goede 		"ext2load mmc 0 0x43000000 script.bin && " \
4343b824025SHans de Goede 		"ext2load mmc 0 0x48000000 uImage && " \
4353b824025SHans de Goede 		"bootm 0x48000000\0"
4363b824025SHans de Goede #else
4373b824025SHans de Goede #define BOOTCMD_SUNXI_COMPAT
4383b824025SHans de Goede #endif
4393b824025SHans de Goede 
4402ec3a612SHans de Goede #include <config_distro_bootcmd.h>
4412ec3a612SHans de Goede 
44286b49093SHans de Goede #ifdef CONFIG_USB_KEYBOARD
44386b49093SHans de Goede #define CONSOLE_STDIN_SETTINGS \
44486b49093SHans de Goede 	"preboot=usb start\0" \
44586b49093SHans de Goede 	"stdin=serial,usbkbd\0"
44686b49093SHans de Goede #else
4477f2c521fSLuc Verhaegen #define CONSOLE_STDIN_SETTINGS \
4487f2c521fSLuc Verhaegen 	"stdin=serial\0"
44986b49093SHans de Goede #endif
4507f2c521fSLuc Verhaegen 
4517f2c521fSLuc Verhaegen #ifdef CONFIG_VIDEO
4527f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \
4537f2c521fSLuc Verhaegen 	"stdout=serial,vga\0" \
4547f2c521fSLuc Verhaegen 	"stderr=serial,vga\0"
45556009451SJernej Skrabec #elif CONFIG_DM_VIDEO
45656009451SJernej Skrabec #define CONFIG_SYS_WHITE_ON_BLACK
45756009451SJernej Skrabec #define CONSOLE_STDOUT_SETTINGS \
45856009451SJernej Skrabec 	"stdout=serial,vidconsole\0" \
45956009451SJernej Skrabec 	"stderr=serial,vidconsole\0"
4607f2c521fSLuc Verhaegen #else
4617f2c521fSLuc Verhaegen #define CONSOLE_STDOUT_SETTINGS \
4627f2c521fSLuc Verhaegen 	"stdout=serial\0" \
4637f2c521fSLuc Verhaegen 	"stderr=serial\0"
4647f2c521fSLuc Verhaegen #endif
4657f2c521fSLuc Verhaegen 
466c8564b24SMaxime Ripard #ifdef CONFIG_MTDIDS_DEFAULT
467c8564b24SMaxime Ripard #define SUNXI_MTDIDS_DEFAULT \
468c8564b24SMaxime Ripard 	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
469c8564b24SMaxime Ripard #else
470c8564b24SMaxime Ripard #define SUNXI_MTDIDS_DEFAULT
471c8564b24SMaxime Ripard #endif
472c8564b24SMaxime Ripard 
473c8564b24SMaxime Ripard #ifdef CONFIG_MTDPARTS_DEFAULT
474c8564b24SMaxime Ripard #define SUNXI_MTDPARTS_DEFAULT \
475c8564b24SMaxime Ripard 	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
476c8564b24SMaxime Ripard #else
477c8564b24SMaxime Ripard #define SUNXI_MTDPARTS_DEFAULT
478c8564b24SMaxime Ripard #endif
479c8564b24SMaxime Ripard 
4807f2c521fSLuc Verhaegen #define CONSOLE_ENV_SETTINGS \
4817f2c521fSLuc Verhaegen 	CONSOLE_STDIN_SETTINGS \
4827f2c521fSLuc Verhaegen 	CONSOLE_STDOUT_SETTINGS
4837f2c521fSLuc Verhaegen 
4842eff3b71SAndreas Färber #ifdef CONFIG_ARM64
4852eff3b71SAndreas Färber #define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
4862eff3b71SAndreas Färber #else
4872eff3b71SAndreas Färber #define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
4882eff3b71SAndreas Färber #endif
4892eff3b71SAndreas Färber 
4902ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS \
4917f2c521fSLuc Verhaegen 	CONSOLE_ENV_SETTINGS \
492846e3254SHans de Goede 	MEM_LAYOUT_ENV_SETTINGS \
4932a909c5fSSiarhei Siamashka 	DFU_ALT_INFO_RAM \
4942eff3b71SAndreas Färber 	"fdtfile=" FDTFILE "\0" \
495846e3254SHans de Goede 	"console=ttyS0,115200\0" \
496c8564b24SMaxime Ripard 	SUNXI_MTDIDS_DEFAULT \
497c8564b24SMaxime Ripard 	SUNXI_MTDPARTS_DEFAULT \
4983b824025SHans de Goede 	BOOTCMD_SUNXI_COMPAT \
4992ec3a612SHans de Goede 	BOOTENV
5002ec3a612SHans de Goede 
5012ec3a612SHans de Goede #else /* ifndef CONFIG_SPL_BUILD */
5022ec3a612SHans de Goede #define CONFIG_EXTRA_ENV_SETTINGS
503cba69eeeSIan Campbell #endif
504cba69eeeSIan Campbell 
505cba69eeeSIan Campbell #endif /* _SUNXI_COMMON_CONFIG_H */
506