19fa32b12SVikas Manocha /* 29fa32b12SVikas Manocha * (C) Copyright 2014 39fa32b12SVikas Manocha * Vikas Manocha, STMicroelectronics, <vikas.manocha@st.com> 49fa32b12SVikas Manocha * 59fa32b12SVikas Manocha * SPDX-License-Identifier: GPL-2.0+ 69fa32b12SVikas Manocha */ 79fa32b12SVikas Manocha 89fa32b12SVikas Manocha #ifndef __CONFIG_STV0991_H 99fa32b12SVikas Manocha #define __CONFIG_STV0991_H 109fa32b12SVikas Manocha #define CONFIG_SYS_DCACHE_OFF 119fa32b12SVikas Manocha #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH 129fa32b12SVikas Manocha #define CONFIG_BOARD_EARLY_INIT_F 132ce4eaf4SVikas Manocha 149fa32b12SVikas Manocha #define CONFIG_SYS_CORTEX_R4 159fa32b12SVikas Manocha 169fa32b12SVikas Manocha #define CONFIG_SYS_GENERIC_BOARD 179fa32b12SVikas Manocha #define CONFIG_SYS_NO_FLASH 189fa32b12SVikas Manocha 199fa32b12SVikas Manocha /* ram memory-related information */ 209fa32b12SVikas Manocha #define CONFIG_NR_DRAM_BANKS 1 219fa32b12SVikas Manocha #define PHYS_SDRAM_1 0x00000000 229fa32b12SVikas Manocha #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 239fa32b12SVikas Manocha #define PHYS_SDRAM_1_SIZE 0x00198000 249fa32b12SVikas Manocha 259fa32b12SVikas Manocha #define CONFIG_ENV_SIZE 0x10000 26137d5b91SVikas Manocha #define CONFIG_ENV_IS_IN_SPI_FLASH 27137d5b91SVikas Manocha #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 28137d5b91SVikas Manocha #define CONFIG_ENV_OFFSET 0x30000 299fa32b12SVikas Manocha #define CONFIG_ENV_ADDR \ 309fa32b12SVikas Manocha (PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE) 319fa32b12SVikas Manocha #define CONFIG_SYS_MAXARGS 16 329fa32b12SVikas Manocha #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024) 339fa32b12SVikas Manocha 349fa32b12SVikas Manocha /* serial port (PL011) configuration */ 359fa32b12SVikas Manocha #define CONFIG_BAUDRATE 115200 3639e4795aSVikas Manocha #define CONFIG_PL01X_SERIAL 379fa32b12SVikas Manocha 389fa32b12SVikas Manocha /* user interface */ 399fa32b12SVikas Manocha #define CONFIG_SYS_PROMPT "STV0991> " 40c55e7591SVikas Manocha #define CONFIG_SYS_CBSIZE 1024 419fa32b12SVikas Manocha #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 429fa32b12SVikas Manocha +sizeof(CONFIG_SYS_PROMPT) + 16) 439fa32b12SVikas Manocha 449fa32b12SVikas Manocha /* MISC */ 459fa32b12SVikas Manocha #define CONFIG_SYS_LOAD_ADDR 0x00000000 46498b7c2eSVikas Manocha #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 479fa32b12SVikas Manocha #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 489fa32b12SVikas Manocha #define CONFIG_SYS_INIT_SP_OFFSET \ 499fa32b12SVikas Manocha (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 509fa32b12SVikas Manocha /* U-boot Load Address */ 519fa32b12SVikas Manocha #define CONFIG_SYS_TEXT_BASE 0x00010000 529fa32b12SVikas Manocha #define CONFIG_SYS_INIT_SP_ADDR \ 539fa32b12SVikas Manocha (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 549fa32b12SVikas Manocha 552ce4eaf4SVikas Manocha /* GMAC related configs */ 562ce4eaf4SVikas Manocha 572ce4eaf4SVikas Manocha #define CONFIG_MII 582ce4eaf4SVikas Manocha #define CONFIG_PHYLIB 592ce4eaf4SVikas Manocha #define CONFIG_DW_ALTDESCRIPTOR 602ce4eaf4SVikas Manocha #define CONFIG_PHY_MICREL 612ce4eaf4SVikas Manocha 622ce4eaf4SVikas Manocha /* Command support defines */ 632ce4eaf4SVikas Manocha #define CONFIG_CMD_PING 642ce4eaf4SVikas Manocha #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ 652ce4eaf4SVikas Manocha 66c55e7591SVikas Manocha #define CONFIG_SYS_MEMTEST_START 0x0000 67c55e7591SVikas Manocha #define CONFIG_SYS_MEMTEST_END 1024*1024 68c55e7591SVikas Manocha #define CONFIG_CMD_MEMTEST 69c55e7591SVikas Manocha 70c55e7591SVikas Manocha /* Misc configuration */ 71c55e7591SVikas Manocha #define CONFIG_SYS_LONGHELP 72c55e7591SVikas Manocha #define CONFIG_CMDLINE_EDITING 73c55e7591SVikas Manocha 74c55e7591SVikas Manocha #define CONFIG_BOOTDELAY 3 75c55e7591SVikas Manocha #define CONFIG_BOOTCOMMAND "go 0x40040000" 76d126e016SStefan Roese 770a836cebSVikas Manocha #define CONFIG_OF_LIBFDT 78*e67abcaaSVikas Manocha 79*e67abcaaSVikas Manocha /* 80*e67abcaaSVikas Manocha + * QSPI support 81*e67abcaaSVikas Manocha + */ 82*e67abcaaSVikas Manocha #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ 83*e67abcaaSVikas Manocha #define CONFIG_CADENCE_QSPI 84*e67abcaaSVikas Manocha #define CONFIG_CQSPI_DECODER 0 85*e67abcaaSVikas Manocha #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 86*e67abcaaSVikas Manocha #define CONFIG_CMD_SPI 87*e67abcaaSVikas Manocha 88*e67abcaaSVikas Manocha #define CONFIG_SPI_FLASH_STMICRO /* Micron/Numonyx flash */ 89*e67abcaaSVikas Manocha #define CONFIG_SPI_FLASH_WINBOND /* WINBOND */ 90*e67abcaaSVikas Manocha #define CONFIG_CMD_SF 91*e67abcaaSVikas Manocha #endif 92*e67abcaaSVikas Manocha 939fa32b12SVikas Manocha #endif /* __CONFIG_H */ 94