xref: /rk3399_rockchip-uboot/include/configs/stv0991.h (revision 2ce4eaf4c89e371aeb69392b68dbb2f705c28144)
19fa32b12SVikas Manocha /*
29fa32b12SVikas Manocha  * (C) Copyright 2014
39fa32b12SVikas Manocha  * Vikas Manocha, STMicroelectronics, <vikas.manocha@st.com>
49fa32b12SVikas Manocha  *
59fa32b12SVikas Manocha  * SPDX-License-Identifier:	GPL-2.0+
69fa32b12SVikas Manocha  */
79fa32b12SVikas Manocha 
89fa32b12SVikas Manocha #ifndef __CONFIG_STV0991_H
99fa32b12SVikas Manocha #define __CONFIG_STV0991_H
109fa32b12SVikas Manocha #define CONFIG_SYS_DCACHE_OFF
119fa32b12SVikas Manocha #define CONFIG_SYS_ICACHE_OFF
129fa32b12SVikas Manocha #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
139fa32b12SVikas Manocha #define CONFIG_BOARD_EARLY_INIT_F
14*2ce4eaf4SVikas Manocha 
159fa32b12SVikas Manocha #define CONFIG_SYS_CORTEX_R4
169fa32b12SVikas Manocha 
179fa32b12SVikas Manocha #define CONFIG_SYS_GENERIC_BOARD
189fa32b12SVikas Manocha #define CONFIG_SYS_NO_FLASH
199fa32b12SVikas Manocha 
209fa32b12SVikas Manocha /* ram memory-related information */
219fa32b12SVikas Manocha #define CONFIG_NR_DRAM_BANKS			1
229fa32b12SVikas Manocha #define PHYS_SDRAM_1				0x00000000
239fa32b12SVikas Manocha #define CONFIG_SYS_SDRAM_BASE			PHYS_SDRAM_1
249fa32b12SVikas Manocha #define PHYS_SDRAM_1_SIZE			0x00198000
259fa32b12SVikas Manocha 
269fa32b12SVikas Manocha #define CONFIG_ENV_SIZE				0x10000
279fa32b12SVikas Manocha #define CONFIG_ENV_IS_IN_FLASH
289fa32b12SVikas Manocha #define CONFIG_ENV_ADDR				\
299fa32b12SVikas Manocha 	(PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE)
309fa32b12SVikas Manocha #define CONFIG_SYS_MAXARGS			16
319fa32b12SVikas Manocha #define CONFIG_SYS_MALLOC_LEN			(CONFIG_ENV_SIZE + 16 * 1024)
329fa32b12SVikas Manocha 
339fa32b12SVikas Manocha /* serial port (PL011) configuration */
349fa32b12SVikas Manocha #define CONFIG_SYS_SERIAL0			0x80406000
359fa32b12SVikas Manocha #define CONFIG_PL011_SERIAL
369fa32b12SVikas Manocha #define CONFIG_CONS_INDEX			0
379fa32b12SVikas Manocha #define CONFIG_BAUDRATE				115200
389fa32b12SVikas Manocha #define CONFIG_PL01x_PORTS			{(void *)CONFIG_SYS_SERIAL0}
399fa32b12SVikas Manocha #define CONFIG_PL011_CLOCK			(2700 * 1000)
409fa32b12SVikas Manocha 
419fa32b12SVikas Manocha /* user interface */
429fa32b12SVikas Manocha #define CONFIG_SYS_PROMPT			"STV0991> "
439fa32b12SVikas Manocha #define CONFIG_SYS_CBSIZE			256/* Console I/O Buffer Size */
449fa32b12SVikas Manocha #define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE \
459fa32b12SVikas Manocha 						+sizeof(CONFIG_SYS_PROMPT) + 16)
469fa32b12SVikas Manocha 
479fa32b12SVikas Manocha /* MISC */
489fa32b12SVikas Manocha #define CONFIG_SYS_LOAD_ADDR			0x00000000
499fa32b12SVikas Manocha #define CONFIG_SYS_INIT_RAM_SIZE		0x2000
509fa32b12SVikas Manocha #define CONFIG_SYS_INIT_RAM_ADDR		0x00190000
519fa32b12SVikas Manocha #define CONFIG_SYS_INIT_SP_OFFSET		\
529fa32b12SVikas Manocha 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
539fa32b12SVikas Manocha /* U-boot Load Address */
549fa32b12SVikas Manocha #define CONFIG_SYS_TEXT_BASE			0x00010000
559fa32b12SVikas Manocha #define CONFIG_SYS_INIT_SP_ADDR			\
569fa32b12SVikas Manocha 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
579fa32b12SVikas Manocha 
58*2ce4eaf4SVikas Manocha /* GMAC related configs */
59*2ce4eaf4SVikas Manocha 
60*2ce4eaf4SVikas Manocha #define CONFIG_MII
61*2ce4eaf4SVikas Manocha #define CONFIG_PHYLIB
62*2ce4eaf4SVikas Manocha #define CONFIG_CMD_NET
63*2ce4eaf4SVikas Manocha #define CONFIG_DESIGNWARE_ETH
64*2ce4eaf4SVikas Manocha #define CONFIG_DW_ALTDESCRIPTOR
65*2ce4eaf4SVikas Manocha #define CONFIG_PHY_MICREL
66*2ce4eaf4SVikas Manocha 
67*2ce4eaf4SVikas Manocha /* Command support defines */
68*2ce4eaf4SVikas Manocha #define CONFIG_CMD_PING
69*2ce4eaf4SVikas Manocha #define CONFIG_PHY_RESET_DELAY			10000		/* in usec */
70*2ce4eaf4SVikas Manocha 
719fa32b12SVikas Manocha #endif /* __CONFIG_H */
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