1*21871138SVladimir Barinov /* 2*21871138SVladimir Barinov * include/configs/stout.h 3*21871138SVladimir Barinov * This file is Stout board configuration. 4*21871138SVladimir Barinov * 5*21871138SVladimir Barinov * Copyright (C) 2015 Renesas Electronics Europe GmbH 6*21871138SVladimir Barinov * Copyright (C) 2015 Renesas Electronics Corporation 7*21871138SVladimir Barinov * Copyright (C) 2015 Cogent Embedded, Inc. 8*21871138SVladimir Barinov * 9*21871138SVladimir Barinov * SPDX-License-Identifier: GPL-2.0 10*21871138SVladimir Barinov */ 11*21871138SVladimir Barinov 12*21871138SVladimir Barinov #ifndef __STOUT_H 13*21871138SVladimir Barinov #define __STOUT_H 14*21871138SVladimir Barinov 15*21871138SVladimir Barinov #undef DEBUG 16*21871138SVladimir Barinov #define CONFIG_R8A7790 17*21871138SVladimir Barinov #define CONFIG_RMOBILE_BOARD_STRING "Stout" 18*21871138SVladimir Barinov 19*21871138SVladimir Barinov #include "rcar-gen2-common.h" 20*21871138SVladimir Barinov 21*21871138SVladimir Barinov /* #define CONFIG_BOARD_LATE_INIT */ 22*21871138SVladimir Barinov 23*21871138SVladimir Barinov #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 24*21871138SVladimir Barinov #define CONFIG_SYS_TEXT_BASE 0xB0000000 25*21871138SVladimir Barinov #else 26*21871138SVladimir Barinov #define CONFIG_SYS_TEXT_BASE 0xE8080000 27*21871138SVladimir Barinov #endif 28*21871138SVladimir Barinov 29*21871138SVladimir Barinov /* STACK */ 30*21871138SVladimir Barinov #if defined(CONFIGF_RMOBILE_EXTRAM_BOOT) 31*21871138SVladimir Barinov #define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC 32*21871138SVladimir Barinov #else 33*21871138SVladimir Barinov #define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC 34*21871138SVladimir Barinov #endif 35*21871138SVladimir Barinov #define STACK_AREA_SIZE 0xC000 36*21871138SVladimir Barinov #define LOW_LEVEL_MERAM_STACK \ 37*21871138SVladimir Barinov (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 38*21871138SVladimir Barinov 39*21871138SVladimir Barinov /* MEMORY */ 40*21871138SVladimir Barinov #define RCAR_GEN2_SDRAM_BASE 0x40000000 41*21871138SVladimir Barinov #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) 42*21871138SVladimir Barinov #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 43*21871138SVladimir Barinov 44*21871138SVladimir Barinov /* SCIF */ 45*21871138SVladimir Barinov #define CONFIG_SCIF_CONSOLE 46*21871138SVladimir Barinov #define CONFIG_SCIF_A 47*21871138SVladimir Barinov 48*21871138SVladimir Barinov /* SPI */ 49*21871138SVladimir Barinov #define CONFIG_SPI 50*21871138SVladimir Barinov #define CONFIG_SH_QSPI 51*21871138SVladimir Barinov #define CONFIG_SPI_FLASH_SPANSION 52*21871138SVladimir Barinov #define CONFIG_SPI_FLASH_QUAD 53*21871138SVladimir Barinov #define CONFIG_SYS_NO_FLASH 54*21871138SVladimir Barinov 55*21871138SVladimir Barinov /* SH Ether */ 56*21871138SVladimir Barinov #define CONFIG_SH_ETHER 57*21871138SVladimir Barinov #define CONFIG_SH_ETHER_USE_PORT 0 58*21871138SVladimir Barinov #define CONFIG_SH_ETHER_PHY_ADDR 0x1 59*21871138SVladimir Barinov #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 60*21871138SVladimir Barinov #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 61*21871138SVladimir Barinov #define CONFIG_SH_ETHER_CACHE_WRITEBACK 62*21871138SVladimir Barinov #define CONFIG_SH_ETHER_CACHE_INVALIDATE 63*21871138SVladimir Barinov #define CONFIG_PHYLIB 64*21871138SVladimir Barinov #define CONFIG_PHY_MICREL 65*21871138SVladimir Barinov #define CONFIG_BITBANGMII 66*21871138SVladimir Barinov #define CONFIG_BITBANGMII_MULTI 67*21871138SVladimir Barinov 68*21871138SVladimir Barinov /* I2C */ 69*21871138SVladimir Barinov #define CONFIG_SYS_I2C 70*21871138SVladimir Barinov #define CONFIG_SYS_I2C_RCAR 71*21871138SVladimir Barinov #define CONFIG_SYS_RCAR_I2C0_SPEED 400000 72*21871138SVladimir Barinov #define CONFIG_SYS_RCAR_I2C1_SPEED 400000 73*21871138SVladimir Barinov #define CONFIG_SYS_RCAR_I2C2_SPEED 400000 74*21871138SVladimir Barinov #define CONFIG_SYS_RCAR_I2C3_SPEED 400000 75*21871138SVladimir Barinov #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4 76*21871138SVladimir Barinov 77*21871138SVladimir Barinov #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 78*21871138SVladimir Barinov 79*21871138SVladimir Barinov /* Board Clock */ 80*21871138SVladimir Barinov #define RMOBILE_XTAL_CLK 20000000u 81*21871138SVladimir Barinov #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 82*21871138SVladimir Barinov #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 83*21871138SVladimir Barinov #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 84*21871138SVladimir Barinov #define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2) 85*21871138SVladimir Barinov #define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15) 86*21871138SVladimir Barinov #define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12) 87*21871138SVladimir Barinov 88*21871138SVladimir Barinov #define CONFIG_SYS_TMU_CLK_DIV 4 89*21871138SVladimir Barinov 90*21871138SVladimir Barinov /* USB */ 91*21871138SVladimir Barinov #define CONFIG_USB_EHCI 92*21871138SVladimir Barinov #define CONFIG_USB_EHCI_RMOBILE 93*21871138SVladimir Barinov #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 94*21871138SVladimir Barinov #define CONFIG_USB_STORAGE 95*21871138SVladimir Barinov 96*21871138SVladimir Barinov /* MMC */ 97*21871138SVladimir Barinov #define CONFIG_MMC 98*21871138SVladimir Barinov #define CONFIG_CMD_MMC 99*21871138SVladimir Barinov #define CONFIG_GENERIC_MMC 100*21871138SVladimir Barinov 101*21871138SVladimir Barinov /* Module stop status bits */ 102*21871138SVladimir Barinov /* INTC-RT */ 103*21871138SVladimir Barinov #define CONFIG_SMSTP0_ENA 0x00400000 104*21871138SVladimir Barinov /* MSIF, SCIFA0 */ 105*21871138SVladimir Barinov #define CONFIG_SMSTP2_ENA 0x00002010 106*21871138SVladimir Barinov /* INTC-SYS, IRQC */ 107*21871138SVladimir Barinov #define CONFIG_SMSTP4_ENA 0x00000180 108*21871138SVladimir Barinov 109*21871138SVladimir Barinov /* SDHI */ 110*21871138SVladimir Barinov #define CONFIG_SH_SDHI_FREQ 97500000 111*21871138SVladimir Barinov 112*21871138SVladimir Barinov #endif /* __STOUT_H */ 113