121871138SVladimir Barinov /* 221871138SVladimir Barinov * include/configs/stout.h 321871138SVladimir Barinov * This file is Stout board configuration. 421871138SVladimir Barinov * 521871138SVladimir Barinov * Copyright (C) 2015 Renesas Electronics Europe GmbH 621871138SVladimir Barinov * Copyright (C) 2015 Renesas Electronics Corporation 721871138SVladimir Barinov * Copyright (C) 2015 Cogent Embedded, Inc. 821871138SVladimir Barinov * 921871138SVladimir Barinov * SPDX-License-Identifier: GPL-2.0 1021871138SVladimir Barinov */ 1121871138SVladimir Barinov 1221871138SVladimir Barinov #ifndef __STOUT_H 1321871138SVladimir Barinov #define __STOUT_H 1421871138SVladimir Barinov 1521871138SVladimir Barinov #undef DEBUG 1621871138SVladimir Barinov #define CONFIG_R8A7790 17*1cc95f6eSNobuhiro Iwamatsu #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Stout" 1821871138SVladimir Barinov 1921871138SVladimir Barinov #include "rcar-gen2-common.h" 2021871138SVladimir Barinov 21*1cc95f6eSNobuhiro Iwamatsu #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) 2221871138SVladimir Barinov #define CONFIG_SYS_TEXT_BASE 0xB0000000 2321871138SVladimir Barinov #else 2421871138SVladimir Barinov #define CONFIG_SYS_TEXT_BASE 0xE8080000 2521871138SVladimir Barinov #endif 2621871138SVladimir Barinov 2721871138SVladimir Barinov /* STACK */ 2821871138SVladimir Barinov #if defined(CONFIGF_RMOBILE_EXTRAM_BOOT) 2921871138SVladimir Barinov #define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC 3021871138SVladimir Barinov #else 3121871138SVladimir Barinov #define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC 3221871138SVladimir Barinov #endif 3321871138SVladimir Barinov #define STACK_AREA_SIZE 0xC000 3421871138SVladimir Barinov #define LOW_LEVEL_MERAM_STACK \ 3521871138SVladimir Barinov (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 3621871138SVladimir Barinov 3721871138SVladimir Barinov /* MEMORY */ 3821871138SVladimir Barinov #define RCAR_GEN2_SDRAM_BASE 0x40000000 3921871138SVladimir Barinov #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) 4021871138SVladimir Barinov #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 4121871138SVladimir Barinov 4221871138SVladimir Barinov /* SCIF */ 4321871138SVladimir Barinov #define CONFIG_SCIF_A 4421871138SVladimir Barinov 4521871138SVladimir Barinov /* SPI */ 4621871138SVladimir Barinov #define CONFIG_SPI_FLASH_QUAD 4721871138SVladimir Barinov 4821871138SVladimir Barinov /* SH Ether */ 4921871138SVladimir Barinov #define CONFIG_SH_ETHER 5021871138SVladimir Barinov #define CONFIG_SH_ETHER_USE_PORT 0 5121871138SVladimir Barinov #define CONFIG_SH_ETHER_PHY_ADDR 0x1 5221871138SVladimir Barinov #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 5321871138SVladimir Barinov #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 5421871138SVladimir Barinov #define CONFIG_SH_ETHER_CACHE_WRITEBACK 5521871138SVladimir Barinov #define CONFIG_SH_ETHER_CACHE_INVALIDATE 5621871138SVladimir Barinov #define CONFIG_BITBANGMII 5721871138SVladimir Barinov #define CONFIG_BITBANGMII_MULTI 5821871138SVladimir Barinov 5921871138SVladimir Barinov /* I2C */ 6021871138SVladimir Barinov #define CONFIG_SYS_I2C 6121871138SVladimir Barinov #define CONFIG_SYS_I2C_RCAR 6221871138SVladimir Barinov #define CONFIG_SYS_RCAR_I2C0_SPEED 400000 6321871138SVladimir Barinov #define CONFIG_SYS_RCAR_I2C1_SPEED 400000 6421871138SVladimir Barinov #define CONFIG_SYS_RCAR_I2C2_SPEED 400000 6521871138SVladimir Barinov #define CONFIG_SYS_RCAR_I2C3_SPEED 400000 6621871138SVladimir Barinov #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4 6721871138SVladimir Barinov 6821871138SVladimir Barinov #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 6921871138SVladimir Barinov 7021871138SVladimir Barinov /* Board Clock */ 7121871138SVladimir Barinov #define RMOBILE_XTAL_CLK 20000000u 7221871138SVladimir Barinov #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 7321871138SVladimir Barinov #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 7421871138SVladimir Barinov #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 7521871138SVladimir Barinov #define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2) 7621871138SVladimir Barinov #define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15) 7721871138SVladimir Barinov #define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12) 7821871138SVladimir Barinov 7921871138SVladimir Barinov #define CONFIG_SYS_TMU_CLK_DIV 4 8021871138SVladimir Barinov 8121871138SVladimir Barinov /* USB */ 8221871138SVladimir Barinov #define CONFIG_USB_EHCI_RMOBILE 8321871138SVladimir Barinov #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 8421871138SVladimir Barinov 8521871138SVladimir Barinov /* Module stop status bits */ 8621871138SVladimir Barinov /* INTC-RT */ 8721871138SVladimir Barinov #define CONFIG_SMSTP0_ENA 0x00400000 8821871138SVladimir Barinov /* MSIF, SCIFA0 */ 8921871138SVladimir Barinov #define CONFIG_SMSTP2_ENA 0x00002010 9021871138SVladimir Barinov /* INTC-SYS, IRQC */ 9121871138SVladimir Barinov #define CONFIG_SMSTP4_ENA 0x00000180 9221871138SVladimir Barinov 9321871138SVladimir Barinov /* SDHI */ 9421871138SVladimir Barinov #define CONFIG_SH_SDHI_FREQ 97500000 9521871138SVladimir Barinov 9621871138SVladimir Barinov #endif /* __STOUT_H */ 97