xref: /rk3399_rockchip-uboot/include/configs/spear-common.h (revision 08166e19217cdcfd268760ecb7e94a3b1bdc4783)
1 /*
2  * (C) Copyright 2009
3  * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23 
24 #ifndef _SPEAR_COMMON_H
25 #define _SPEAR_COMMON_H
26 /*
27  * Common configurations used for both spear3xx as well as spear6xx
28  */
29 
30 /* U-boot Load Address */
31 #define CONFIG_SYS_TEXT_BASE			0x00700000
32 
33 /* Ethernet driver configuration */
34 #define CONFIG_MII
35 #define CONFIG_DESIGNWARE_ETH
36 #define CONFIG_DW_SEARCH_PHY
37 #define CONFIG_DW0_PHY				1
38 #define CONFIG_NET_MULTI
39 #define CONFIG_PHY_RESET_DELAY			10000		/* in usec */
40 
41 /* USBD driver configuration */
42 #define CONFIG_DW_UDC
43 #define CONFIG_USB_DEVICE
44 #define CONFIG_USB_TTY
45 
46 #define CONFIG_USBD_PRODUCT_NAME		"SPEAr SoC"
47 #define CONFIG_USBD_MANUFACTURER		"ST Microelectronics"
48 
49 #if defined(CONFIG_USB_TTY)
50 #define CONFIG_EXTRA_ENV_USBTTY			"usbtty=cdc_acm\0"
51 #endif
52 
53 /* I2C driver configuration */
54 #define CONFIG_HARD_I2C
55 #define CONFIG_DW_I2C
56 #define CONFIG_SYS_I2C_SPEED			400000
57 #define CONFIG_SYS_I2C_SLAVE			0x02
58 
59 #define CONFIG_I2C_CHIPADDRESS			0x50
60 
61 /* Timer, HZ specific defines */
62 #define CONFIG_SYS_HZ				(1000)
63 
64 /* Flash configuration */
65 #if defined(CONFIG_FLASH_PNOR)
66 #define CONFIG_SPEAR_EMI			1
67 #else
68 #define CONFIG_ST_SMI
69 #endif
70 
71 #if defined(CONFIG_ST_SMI)
72 
73 #define CONFIG_SYS_MAX_FLASH_BANKS		2
74 #define CONFIG_SYS_FLASH_BASE			(0xF8000000)
75 #define CONFIG_SYS_CS1_FLASH_BASE		(0xF9000000)
76 #define CONFIG_SYS_FLASH_BANK_SIZE		(0x01000000)
77 #define CONFIG_SYS_FLASH_ADDR_BASE		{CONFIG_SYS_FLASH_BASE, \
78 						CONFIG_SYS_CS1_FLASH_BASE}
79 #define CONFIG_SYS_MAX_FLASH_SECT		128
80 
81 #define CONFIG_SYS_FLASH_EMPTY_INFO		1
82 #define CONFIG_SYS_FLASH_ERASE_TOUT		(3 * CONFIG_SYS_HZ)
83 #define CONFIG_SYS_FLASH_WRITE_TOUT		(3 * CONFIG_SYS_HZ)
84 
85 #endif
86 
87 /*
88  * Serial Configuration (PL011)
89  * CONFIG_PL01x_PORTS is defined in specific files
90  */
91 #define CONFIG_PL011_SERIAL
92 #define CONFIG_PL011_CLOCK			(48 * 1000 * 1000)
93 #define CONFIG_CONS_INDEX			0
94 #define CONFIG_BAUDRATE				115200
95 #define CONFIG_SYS_BAUDRATE_TABLE		{ 9600, 19200, 38400, \
96 						57600, 115200 }
97 
98 #define CONFIG_SYS_LOADS_BAUD_CHANGE
99 
100 /* NAND FLASH Configuration */
101 #define CONFIG_SYS_NAND_SELF_INIT
102 #define CONFIG_MTD_DEVICE
103 #define CONFIG_MTD_PARTITIONS
104 #define CONFIG_NAND_FSMC
105 #define CONFIG_SYS_MAX_NAND_DEVICE		1
106 #define CONFIG_MTD_NAND_VERIFY_WRITE		1
107 
108 /*
109  * Command support defines
110  */
111 #define CONFIG_CMD_I2C
112 #define CONFIG_CMD_NAND
113 #define CONFIG_CMD_ENV
114 #define CONFIG_CMD_MEMORY
115 #define CONFIG_CMD_RUN
116 #define CONFIG_CMD_SAVES
117 #define CONFIG_CMD_NET
118 #define CONFIG_CMD_MII
119 #define CONFIG_CMD_PING
120 #define CONFIG_CMD_DHCP
121 
122 /* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
123 #include <config_cmd_default.h>
124 
125 /*
126  * Default Environment Varible definitions
127  */
128 #if defined(CONFIG_SPEAR_USBTTY)
129 #define CONFIG_BOOTDELAY			-1
130 #else
131 #define CONFIG_BOOTDELAY			1
132 #endif
133 
134 #define CONFIG_ENV_OVERWRITE
135 
136 /*
137  * U-Boot Environment placing definitions.
138  */
139 #if defined(CONFIG_ENV_IS_IN_FLASH)
140 #ifdef CONFIG_ST_SMI
141 /*
142  * Environment is in serial NOR flash
143  */
144 #define CONFIG_SYS_MONITOR_LEN			0x00040000
145 #define CONFIG_ENV_SECT_SIZE			0x00010000
146 #define CONFIG_FSMTDBLK				"/dev/mtdblock8 "
147 
148 #define CONFIG_BOOTCOMMAND			"bootm 0xf8050000"
149 
150 #elif defined(CONFIG_SPEAR_EMI)
151 /*
152  * Environment is in parallel NOR flash
153  */
154 #define CONFIG_SYS_MONITOR_LEN			0x00060000
155 #define CONFIG_ENV_SECT_SIZE			0x00020000
156 #define CONFIG_FSMTDBLK				"/dev/mtdblock3 "
157 
158 #define CONFIG_BOOTCOMMAND			"cp.b 0x50080000 0x1600000 " \
159 						"0x4C0000; bootm 0x1600000"
160 #endif
161 
162 #define CONFIG_SYS_MONITOR_BASE			CONFIG_SYS_FLASH_BASE
163 #define CONFIG_ENV_ADDR				(CONFIG_SYS_MONITOR_BASE + \
164 						CONFIG_SYS_MONITOR_LEN)
165 #elif defined(CONFIG_ENV_IS_IN_NAND)
166 /*
167  * Environment is in NAND
168  */
169 
170 #define CONFIG_ENV_OFFSET			0x60000
171 #define CONFIG_ENV_RANGE			0x10000
172 #define CONFIG_FSMTDBLK				"/dev/mtdblock12 "
173 
174 #define CONFIG_BOOTCOMMAND			"nand read.jffs2 0x1600000 " \
175 						"0x80000 0x4C0000; " \
176 						"bootm 0x1600000"
177 #endif
178 
179 #define CONFIG_BOOTARGS_NFS			"root=/dev/nfs ip=dhcp " \
180 						"console=ttyS0 init=/bin/sh"
181 #define CONFIG_BOOTARGS				"console=ttyS0 mem=128M "  \
182 						"root="CONFIG_FSMTDBLK \
183 						"rootfstype=jffs2"
184 
185 #define CONFIG_ENV_SIZE				0x02000
186 
187 /* Miscellaneous configurable options */
188 #define CONFIG_ARCH_CPU_INIT
189 #define CONFIG_DISPLAY_CPUINFO
190 #define CONFIG_BOOT_PARAMS_ADDR			0x00000100
191 #define CONFIG_CMDLINE_TAG			1
192 #define CONFIG_SETUP_MEMORY_TAGS		1
193 #define CONFIG_MISC_INIT_R			1
194 #define CONFIG_ZERO_BOOTDELAY_CHECK		1
195 #define CONFIG_AUTOBOOT_KEYED			1
196 #define CONFIG_AUTOBOOT_STOP_STR		" "
197 #define CONFIG_AUTOBOOT_PROMPT			\
198 		"Hit SPACE in %d seconds to stop autoboot.\n", bootdelay
199 
200 #define CONFIG_SYS_MEMTEST_START		0x00800000
201 #define CONFIG_SYS_MEMTEST_END			0x04000000
202 #define CONFIG_SYS_MALLOC_LEN			(1024*1024)
203 #define CONFIG_IDENT_STRING			"-SPEAr"
204 #define CONFIG_SYS_LONGHELP
205 #define CONFIG_SYS_PROMPT			"u-boot> "
206 #define CONFIG_CMDLINE_EDITING
207 #define CONFIG_SYS_CBSIZE			256
208 #define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE + \
209 						sizeof(CONFIG_SYS_PROMPT) + 16)
210 #define CONFIG_SYS_MAXARGS			16
211 #define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE
212 #define CONFIG_SYS_LOAD_ADDR			0x00800000
213 #define CONFIG_SYS_CONSOLE_INFO_QUIET		1
214 
215 #define CONFIG_EXTRA_ENV_SETTINGS		CONFIG_EXTRA_ENV_USBTTY
216 
217 /* Stack sizes */
218 #define CONFIG_STACKSIZE			(128*1024)
219 
220 #ifdef CONFIG_USE_IRQ
221 #define CONFIG_STACKSIZE_IRQ			(4*1024)
222 #define CONFIG_STACKSIZE_FIQ			(4*1024)
223 #endif
224 
225 /* Physical Memory Map */
226 #define CONFIG_NR_DRAM_BANKS			1
227 #define PHYS_SDRAM_1				0x00000000
228 #define PHYS_SDRAM_1_MAXSIZE			0x40000000
229 
230 #define CONFIG_SYS_SDRAM_BASE			PHYS_SDRAM_1
231 #define CONFIG_SYS_INIT_RAM_ADDR		0xD2800000
232 #define CONFIG_SYS_INIT_RAM_SIZE		0x2000
233 
234 #define CONFIG_SYS_INIT_SP_OFFSET		\
235 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
236 
237 #define CONFIG_SYS_INIT_SP_ADDR			\
238 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
239 
240 #endif
241