xref: /rk3399_rockchip-uboot/include/configs/socfpga_socrates.h (revision 856b30dae54a9fa76a7457b6c891b3efd9a8a397)
1*856b30daSMarek Vasut /*
2*856b30daSMarek Vasut  * Copyright (C) 2015 Marek Vasut <marex@denx.de>
3*856b30daSMarek Vasut  *
4*856b30daSMarek Vasut  * SPDX-License-Identifier:	GPL-2.0+
5*856b30daSMarek Vasut  */
6*856b30daSMarek Vasut #ifndef __CONFIG_SOCFPGA_SOCRATES_H__
7*856b30daSMarek Vasut #define __CONFIG_SOCFPGA_SOCRATES_H__
8*856b30daSMarek Vasut 
9*856b30daSMarek Vasut #include <asm/arch/base_addr_ac5.h>
10*856b30daSMarek Vasut 
11*856b30daSMarek Vasut /* U-Boot Commands */
12*856b30daSMarek Vasut #define CONFIG_SYS_NO_FLASH
13*856b30daSMarek Vasut #define CONFIG_DOS_PARTITION
14*856b30daSMarek Vasut #define CONFIG_FAT_WRITE
15*856b30daSMarek Vasut #define CONFIG_HW_WATCHDOG
16*856b30daSMarek Vasut 
17*856b30daSMarek Vasut #define CONFIG_CMD_ASKENV
18*856b30daSMarek Vasut #define CONFIG_CMD_BOOTZ
19*856b30daSMarek Vasut #define CONFIG_CMD_CACHE
20*856b30daSMarek Vasut #define CONFIG_CMD_DFU
21*856b30daSMarek Vasut #define CONFIG_CMD_DHCP
22*856b30daSMarek Vasut #define CONFIG_CMD_EXT4
23*856b30daSMarek Vasut #define CONFIG_CMD_EXT4_WRITE
24*856b30daSMarek Vasut #define CONFIG_CMD_FAT
25*856b30daSMarek Vasut #define CONFIG_CMD_FS_GENERIC
26*856b30daSMarek Vasut #define CONFIG_CMD_GREPENV
27*856b30daSMarek Vasut #define CONFIG_CMD_MII
28*856b30daSMarek Vasut #define CONFIG_CMD_MMC
29*856b30daSMarek Vasut #define CONFIG_CMD_PING
30*856b30daSMarek Vasut #define CONFIG_CMD_USB
31*856b30daSMarek Vasut #define CONFIG_CMD_USB_MASS_STORAGE
32*856b30daSMarek Vasut 
33*856b30daSMarek Vasut /* Memory configurations */
34*856b30daSMarek Vasut #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on SoCrates */
35*856b30daSMarek Vasut 
36*856b30daSMarek Vasut /* Booting Linux */
37*856b30daSMarek Vasut #define CONFIG_BOOTDELAY	3
38*856b30daSMarek Vasut #define CONFIG_BOOTFILE		"zImage"
39*856b30daSMarek Vasut #define CONFIG_BOOTARGS		"console=ttyS0," __stringify(CONFIG_BAUDRATE)
40*856b30daSMarek Vasut #define CONFIG_BOOTCOMMAND	"run mmcload; run mmcboot"
41*856b30daSMarek Vasut #define CONFIG_LOADADDR		0x01000000
42*856b30daSMarek Vasut #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
43*856b30daSMarek Vasut 
44*856b30daSMarek Vasut /* Ethernet on SoC (EMAC) */
45*856b30daSMarek Vasut #if defined(CONFIG_CMD_NET)
46*856b30daSMarek Vasut 
47*856b30daSMarek Vasut /* PHY */
48*856b30daSMarek Vasut #define CONFIG_PHY_MICREL
49*856b30daSMarek Vasut #define CONFIG_PHY_MICREL_KSZ9021
50*856b30daSMarek Vasut #define CONFIG_KSZ9021_CLK_SKEW_ENV	"micrel-ksz9021-clk-skew"
51*856b30daSMarek Vasut #define CONFIG_KSZ9021_CLK_SKEW_VAL	0xf0f0
52*856b30daSMarek Vasut #define CONFIG_KSZ9021_DATA_SKEW_ENV	"micrel-ksz9021-data-skew"
53*856b30daSMarek Vasut #define CONFIG_KSZ9021_DATA_SKEW_VAL	0x0
54*856b30daSMarek Vasut 
55*856b30daSMarek Vasut #endif
56*856b30daSMarek Vasut 
57*856b30daSMarek Vasut #define CONFIG_ENV_IS_IN_MMC
58*856b30daSMarek Vasut #define CONFIG_SYS_MMC_ENV_DEV		0	/* device 0 */
59*856b30daSMarek Vasut #define CONFIG_ENV_OFFSET		512	/* just after the MBR */
60*856b30daSMarek Vasut 
61*856b30daSMarek Vasut /* USB */
62*856b30daSMarek Vasut #ifdef CONFIG_CMD_USB
63*856b30daSMarek Vasut #define CONFIG_USB_DWC2_REG_ADDR	SOCFPGA_USB1_ADDRESS
64*856b30daSMarek Vasut #endif
65*856b30daSMarek Vasut #define CONFIG_G_DNL_MANUFACTURER      "EBV"
66*856b30daSMarek Vasut 
67*856b30daSMarek Vasut /* Extra Environment */
68*856b30daSMarek Vasut #define CONFIG_HOSTNAME		socfpga_socrates
69*856b30daSMarek Vasut 
70*856b30daSMarek Vasut #define CONFIG_EXTRA_ENV_SETTINGS \
71*856b30daSMarek Vasut 	"verify=n\0" \
72*856b30daSMarek Vasut 	"loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
73*856b30daSMarek Vasut 	"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
74*856b30daSMarek Vasut 		"bootm ${loadaddr} - ${fdt_addr}\0" \
75*856b30daSMarek Vasut 	"bootimage=zImage\0" \
76*856b30daSMarek Vasut 	"fdt_addr=100\0" \
77*856b30daSMarek Vasut 	"fdtimage=socfpga.dtb\0" \
78*856b30daSMarek Vasut 		"fsloadcmd=ext2load\0" \
79*856b30daSMarek Vasut 	"bootm ${loadaddr} - ${fdt_addr}\0" \
80*856b30daSMarek Vasut 	"mmcroot=/dev/mmcblk0p2\0" \
81*856b30daSMarek Vasut 	"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
82*856b30daSMarek Vasut 		" root=${mmcroot} rw rootwait;" \
83*856b30daSMarek Vasut 		"bootz ${loadaddr} - ${fdt_addr}\0" \
84*856b30daSMarek Vasut 	"mmcload=mmc rescan;" \
85*856b30daSMarek Vasut 		"load mmc 0:1 ${loadaddr} ${bootimage};" \
86*856b30daSMarek Vasut 		"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
87*856b30daSMarek Vasut 	"qspiroot=/dev/mtdblock0\0" \
88*856b30daSMarek Vasut 	"qspirootfstype=jffs2\0" \
89*856b30daSMarek Vasut 	"qspiboot=setenv bootargs " CONFIG_BOOTARGS \
90*856b30daSMarek Vasut 		" root=${qspiroot} rw rootfstype=${qspirootfstype};"\
91*856b30daSMarek Vasut 		"bootm ${loadaddr} - ${fdt_addr}\0"
92*856b30daSMarek Vasut 
93*856b30daSMarek Vasut /* The rest of the configuration is shared */
94*856b30daSMarek Vasut #include <configs/socfpga_common.h>
95*856b30daSMarek Vasut 
96*856b30daSMarek Vasut #endif	/* __CONFIG_SOCFPGA_SOCRATES_H__ */
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