xref: /rk3399_rockchip-uboot/include/configs/socfpga_cyclone5_socdk.h (revision 6e7adf7037c76f081b149685fa5e978e2ddf2a22)
13cbc7b87SDinh Nguyen /*
23cbc7b87SDinh Nguyen  * Copyright (C) 2014 Marek Vasut <marex@denx.de>
33cbc7b87SDinh Nguyen  *
43cbc7b87SDinh Nguyen  * SPDX-License-Identifier:	GPL-2.0+
53cbc7b87SDinh Nguyen  */
63cbc7b87SDinh Nguyen #ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
73cbc7b87SDinh Nguyen #define __CONFIG_SOCFPGA_CYCLONE5_H__
83cbc7b87SDinh Nguyen 
9*871c24bcSDinh Nguyen #include <asm/arch/base_addr_ac5.h>
103cbc7b87SDinh Nguyen 
113cbc7b87SDinh Nguyen #define CONFIG_HW_WATCHDOG
123cbc7b87SDinh Nguyen 
133cbc7b87SDinh Nguyen /* Memory configurations */
143cbc7b87SDinh Nguyen #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on SoCDK */
153cbc7b87SDinh Nguyen 
163cbc7b87SDinh Nguyen /* Booting Linux */
173cbc7b87SDinh Nguyen #define CONFIG_LOADADDR		0x01000000
183cbc7b87SDinh Nguyen #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
193cbc7b87SDinh Nguyen 
203cbc7b87SDinh Nguyen /* Ethernet on SoC (EMAC) */
213cbc7b87SDinh Nguyen 
223cbc7b87SDinh Nguyen /* The rest of the configuration is shared */
233cbc7b87SDinh Nguyen #include <configs/socfpga_common.h>
243cbc7b87SDinh Nguyen 
253cbc7b87SDinh Nguyen #endif	/* __CONFIG_SOCFPGA_CYCLONE5_H__ */
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