1 /* 2 * Bluewater Systems Snapper 9260 and 9G20 modules 3 * 4 * (C) Copyright 2011 Bluewater Systems 5 * Author: Andre Renaud <andre@bluewatersys.com> 6 * Author: Ryan Mallon <ryan@bluewatersys.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* SoC type is defined in boards.cfg */ 15 #include <asm/hardware.h> 16 #include <linux/sizes.h> 17 18 #define CONFIG_SYS_TEXT_BASE 0x21f00000 19 20 /* ARM asynchronous clock */ 21 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */ 22 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 23 #define CONFIG_SYS_GENERIC_BOARD 24 #define CONFIG_SYS_MALLOC_F_LEN (1 << 10) 25 26 /* CPU */ 27 #define CONFIG_ARCH_CPU_INIT 28 29 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 30 #define CONFIG_SETUP_MEMORY_TAGS 31 #define CONFIG_INITRD_TAG 32 #define CONFIG_SKIP_LOWLEVEL_INIT 33 #define CONFIG_DISPLAY_CPUINFO 34 #define CONFIG_FIT 35 36 /* SDRAM */ 37 #define CONFIG_NR_DRAM_BANKS 1 38 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 39 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */ 40 #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \ 41 GENERATED_GBL_DATA_SIZE) 42 43 /* Mem test settings */ 44 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 45 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024)) 46 47 /* NAND Flash */ 48 #define CONFIG_NAND_ATMEL 49 #define CONFIG_SYS_NO_FLASH 50 #define CONFIG_SYS_MAX_NAND_DEVICE 1 51 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 52 #define CONFIG_SYS_NAND_DBW_8 53 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */ 54 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */ 55 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 56 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 57 58 /* Ethernet */ 59 #define CONFIG_MACB 60 #define CONFIG_RMII 61 #define CONFIG_NET_RETRY_COUNT 20 62 #define CONFIG_RESET_PHY_R 63 #define CONFIG_AT91_WANTS_COMMON_PHY 64 #define CONFIG_TFTP_PORT 65 #define CONFIG_TFTP_TSIZE 66 67 /* USB */ 68 #define CONFIG_USB_ATMEL 69 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 70 #define CONFIG_USB_OHCI_NEW 71 #define CONFIG_DOS_PARTITION 72 #define CONFIG_SYS_USB_OHCI_CPU_INIT 73 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE 74 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 75 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 76 #define CONFIG_USB_STORAGE 77 78 /* GPIOs and IO expander */ 79 #define CONFIG_ATMEL_LEGACY 80 #define CONFIG_AT91_GPIO 81 #define CONFIG_AT91_GPIO_PULLUP 1 82 #define CONFIG_PCA953X 83 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x28 84 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} } 85 86 /* UARTs/Serial console */ 87 #define CONFIG_ATMEL_USART 88 #ifndef CONFIG_DM_SERIAL 89 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 90 #define CONFIG_USART_ID ATMEL_ID_SYS 91 #endif 92 #define CONFIG_BAUDRATE 115200 93 #define CONFIG_SYS_PROMPT "Snapper> " 94 95 /* I2C - Bit-bashed */ 96 #define CONFIG_SYS_I2C 97 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 98 #define CONFIG_SYS_I2C_SOFT_SPEED 100000 99 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F 100 #define CONFIG_SOFT_I2C_READ_REPEATED_START 101 #define I2C_INIT do { \ 102 at91_set_gpio_output(AT91_PIN_PA23, 1); \ 103 at91_set_gpio_output(AT91_PIN_PA24, 1); \ 104 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \ 105 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \ 106 } while (0) 107 #define I2C_SOFT_DECLARATIONS 108 #define I2C_ACTIVE 109 #define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PA23, 1); 110 #define I2C_READ at91_get_gpio_value(AT91_PIN_PA23); 111 #define I2C_SDA(bit) do { \ 112 if (bit) { \ 113 at91_set_gpio_input(AT91_PIN_PA23, 1); \ 114 } else { \ 115 at91_set_gpio_output(AT91_PIN_PA23, 1); \ 116 at91_set_gpio_value(AT91_PIN_PA23, bit); \ 117 } \ 118 } while (0) 119 #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit) 120 #define I2C_DELAY udelay(2) 121 122 /* Boot options */ 123 #define CONFIG_SYS_LOAD_ADDR 0x23000000 124 #define CONFIG_BOOTDELAY 3 125 #define CONFIG_ZERO_BOOTDELAY_CHECK 126 127 #define CONFIG_BOOTP_BOOTFILESIZE 128 #define CONFIG_BOOTP_BOOTPATH 129 #define CONFIG_BOOTP_GATEWAY 130 #define CONFIG_BOOTP_HOSTNAME 131 132 /* Environment settings */ 133 #define CONFIG_ENV_IS_IN_NAND 134 #define CONFIG_ENV_OFFSET (512 << 10) 135 #define CONFIG_ENV_SIZE (256 << 10) 136 #define CONFIG_ENV_OVERWRITE 137 #define CONFIG_BOOTARGS "console=ttyS0,115200 ip=any" 138 139 /* Console settings */ 140 #define CONFIG_SYS_CBSIZE 256 141 #define CONFIG_SYS_MAXARGS 16 142 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 143 sizeof(CONFIG_SYS_PROMPT) + 16) 144 #define CONFIG_SYS_LONGHELP 145 #define CONFIG_CMDLINE_EDITING 146 #define CONFIG_AUTO_COMPLETE 147 #define CONFIG_SYS_HUSH_PARSER 148 149 /* U-Boot memory settings */ 150 #define CONFIG_SYS_MALLOC_LEN (1 << 20) 151 152 /* Command line configuration */ 153 #include <config_cmd_default.h> 154 #undef CONFIG_CMD_BDI 155 #undef CONFIG_CMD_FPGA 156 #undef CONFIG_CMD_IMI 157 #undef CONFIG_CMD_IMLS 158 #undef CONFIG_CMD_LOADS 159 #undef CONFIG_CMD_SOURCE 160 161 #define CONFIG_CMD_PING 162 #define CONFIG_CMD_DHCP 163 #define CONFIG_CMD_FAT 164 #define CONFIG_CMD_I2C 165 #define CONFIG_CMD_GPIO 166 #define CONFIG_CMD_USB 167 #define CONFIG_CMD_MII 168 #define CONFIG_CMD_NAND 169 #define CONFIG_CMD_PCA953X 170 #define CONFIG_CMD_PCA953X_INFO 171 172 #endif /* __CONFIG_H */ 173