xref: /rk3399_rockchip-uboot/include/configs/smdkv310.h (revision 643be9c07e1c2abcc45d0efd4bbe562c4cb8dcaa)
1e21185baSChander Kashyap /*
2e21185baSChander Kashyap  * Copyright (C) 2011 Samsung Electronics
3e21185baSChander Kashyap  *
4393cb361SChander Kashyap  * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
5e21185baSChander Kashyap  *
6e21185baSChander Kashyap  * See file CREDITS for list of people who contributed to this
7e21185baSChander Kashyap  * project.
8e21185baSChander Kashyap  *
9e21185baSChander Kashyap  * This program is free software; you can redistribute it and/or
10e21185baSChander Kashyap  * modify it under the terms of the GNU General Public License as
11e21185baSChander Kashyap  * published by the Free Software Foundation; either version 2 of
12e21185baSChander Kashyap  * the License, or (at your option) any later version.
13e21185baSChander Kashyap  *
14e21185baSChander Kashyap  * This program is distributed in the hope that it will be useful,
15e21185baSChander Kashyap  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16e21185baSChander Kashyap  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17e21185baSChander Kashyap  * GNU General Public License for more details.
18e21185baSChander Kashyap  *
19e21185baSChander Kashyap  * You should have received a copy of the GNU General Public License
20e21185baSChander Kashyap  * along with this program; if not, write to the Free Software
21e21185baSChander Kashyap  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22e21185baSChander Kashyap  * MA 02111-1307 USA
23e21185baSChander Kashyap  */
24e21185baSChander Kashyap 
25e21185baSChander Kashyap #ifndef __CONFIG_H
26e21185baSChander Kashyap #define __CONFIG_H
27e21185baSChander Kashyap 
28e21185baSChander Kashyap /* High Level Configuration Options */
29e21185baSChander Kashyap #define CONFIG_SAMSUNG			1	/* in a SAMSUNG core */
30e21185baSChander Kashyap #define CONFIG_S5P			1	/* S5P Family */
31393cb361SChander Kashyap #define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
32e21185baSChander Kashyap #define CONFIG_SMDKV310			1	/* working with SMDKV310*/
33e21185baSChander Kashyap 
34e21185baSChander Kashyap #include <asm/arch/cpu.h>		/* get chip and board defs */
35e21185baSChander Kashyap 
36e21185baSChander Kashyap #define CONFIG_ARCH_CPU_INIT
37e21185baSChander Kashyap #define CONFIG_DISPLAY_CPUINFO
38e21185baSChander Kashyap #define CONFIG_DISPLAY_BOARDINFO
39198a40b9SRajeshwari Shinde #define CONFIG_BOARD_EARLY_INIT_F
40e21185baSChander Kashyap 
41b3c5a49bSChander Kashyap /* Mach Type */
42b3c5a49bSChander Kashyap #define CONFIG_MACH_TYPE		MACH_TYPE_SMDKV310
43b3c5a49bSChander Kashyap 
44e21185baSChander Kashyap /* Keep L2 Cache Disabled */
45e21185baSChander Kashyap #define CONFIG_L2_OFF			1
46e21185baSChander Kashyap 
47e21185baSChander Kashyap #define CONFIG_SYS_SDRAM_BASE		0x40000000
48e21185baSChander Kashyap #define CONFIG_SYS_TEXT_BASE		0x43E00000
49e21185baSChander Kashyap 
50e21185baSChander Kashyap /* input clock of PLL: SMDKV310 has 24MHz input clock */
51e21185baSChander Kashyap #define CONFIG_SYS_CLK_FREQ		24000000
52e21185baSChander Kashyap 
53e21185baSChander Kashyap #define CONFIG_SETUP_MEMORY_TAGS
54e21185baSChander Kashyap #define CONFIG_CMDLINE_TAG
55e21185baSChander Kashyap #define CONFIG_INITRD_TAG
56e21185baSChander Kashyap #define CONFIG_CMDLINE_EDITING
57e21185baSChander Kashyap 
58e21185baSChander Kashyap /* Handling Sleep Mode*/
59e21185baSChander Kashyap #define S5P_CHECK_SLEEP			0x00000BAD
60e21185baSChander Kashyap #define S5P_CHECK_DIDLE			0xBAD00000
61*643be9c0SRajeshwari Shinde #define S5P_CHECK_LPA			0xABAD0000
62e21185baSChander Kashyap 
63e21185baSChander Kashyap /* Size of malloc() pool */
64e21185baSChander Kashyap #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (1 << 20))
65e21185baSChander Kashyap 
66e21185baSChander Kashyap /* select serial console configuration */
67e21185baSChander Kashyap #define CONFIG_SERIAL1			1	/* use SERIAL 1 */
68e21185baSChander Kashyap #define CONFIG_BAUDRATE			115200
69393cb361SChander Kashyap #define EXYNOS4_DEFAULT_UART_OFFSET	0x010000
70e21185baSChander Kashyap 
71e21185baSChander Kashyap /* SD/MMC configuration */
727d2d58b4SJaehoon Chung #define CONFIG_GENERIC_MMC
737d2d58b4SJaehoon Chung #define CONFIG_MMC
747d2d58b4SJaehoon Chung #define CONFIG_SDHCI
757d2d58b4SJaehoon Chung #define CONFIG_S5P_SDHCI
76e21185baSChander Kashyap 
77e21185baSChander Kashyap /* PWM */
78e21185baSChander Kashyap #define CONFIG_PWM			1
79e21185baSChander Kashyap 
80e21185baSChander Kashyap /* allow to overwrite serial and ethaddr */
81e21185baSChander Kashyap #define CONFIG_ENV_OVERWRITE
82e21185baSChander Kashyap 
83e21185baSChander Kashyap /* Command definition*/
84e21185baSChander Kashyap #include <config_cmd_default.h>
85e21185baSChander Kashyap 
86e21185baSChander Kashyap #define CONFIG_CMD_PING
87e21185baSChander Kashyap #define CONFIG_CMD_ELF
88e21185baSChander Kashyap #define CONFIG_CMD_DHCP
89e21185baSChander Kashyap #define CONFIG_CMD_MMC
90e21185baSChander Kashyap #define CONFIG_CMD_NET
91e21185baSChander Kashyap #define CONFIG_CMD_FAT
92e21185baSChander Kashyap 
93e21185baSChander Kashyap #define CONFIG_BOOTDELAY		3
94e21185baSChander Kashyap #define CONFIG_ZERO_BOOTDELAY_CHECK
955187d8ddSChander Kashyap 
965187d8ddSChander Kashyap /* MMC SPL */
975187d8ddSChander Kashyap #define CONFIG_SPL
98*643be9c0SRajeshwari Shinde #define CONFIG_SKIP_LOWLEVEL_INIT
999b3ab1c9SChander Kashyap #define COPY_BL2_FNPTR_ADDR	0x00002488
100e21185baSChander Kashyap 
1018a00061eSInderpal Singh #define CONFIG_SPL_TEXT_BASE	0x02021410
1028a00061eSInderpal Singh 
103e21185baSChander Kashyap #define CONFIG_BOOTCOMMAND	"fatload mmc 0 40007000 uImage; bootm 40007000"
104e21185baSChander Kashyap 
105e21185baSChander Kashyap /* Miscellaneous configurable options */
106e21185baSChander Kashyap #define CONFIG_SYS_LONGHELP		/* undef to save memory */
107e21185baSChander Kashyap #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser	*/
108e21185baSChander Kashyap #define CONFIG_SYS_PROMPT		"SMDKV310 # "
109e21185baSChander Kashyap #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size*/
110e21185baSChander Kashyap #define CONFIG_SYS_PBSIZE		384	/* Print Buffer Size */
111e21185baSChander Kashyap #define CONFIG_SYS_MAXARGS		16	/* max number of command args */
112e21185baSChander Kashyap #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC2,115200n8\0"
113e21185baSChander Kashyap /* Boot Argument Buffer Size */
114e21185baSChander Kashyap #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
115e21185baSChander Kashyap /* memtest works on */
116e21185baSChander Kashyap #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
117e21185baSChander Kashyap #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x6000000)
118e21185baSChander Kashyap #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
119e21185baSChander Kashyap 
120e21185baSChander Kashyap #define CONFIG_SYS_HZ			1000
121e21185baSChander Kashyap 
122e21185baSChander Kashyap /* SMDKV310 has 4 bank of DRAM */
123e21185baSChander Kashyap #define CONFIG_NR_DRAM_BANKS	4
124e21185baSChander Kashyap #define SDRAM_BANK_SIZE		(512UL << 20UL)	/* 512 MB */
125e21185baSChander Kashyap #define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
126e21185baSChander Kashyap #define PHYS_SDRAM_1_SIZE	SDRAM_BANK_SIZE
127e21185baSChander Kashyap #define PHYS_SDRAM_2		(CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
128e21185baSChander Kashyap #define PHYS_SDRAM_2_SIZE	SDRAM_BANK_SIZE
129e21185baSChander Kashyap #define PHYS_SDRAM_3		(CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
130e21185baSChander Kashyap #define PHYS_SDRAM_3_SIZE	SDRAM_BANK_SIZE
131e21185baSChander Kashyap #define PHYS_SDRAM_4		(CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
132e21185baSChander Kashyap #define PHYS_SDRAM_4_SIZE	SDRAM_BANK_SIZE
133e21185baSChander Kashyap 
134e21185baSChander Kashyap /* FLASH and environment organization */
135e21185baSChander Kashyap #define CONFIG_SYS_NO_FLASH		1
136e21185baSChander Kashyap #undef	CONFIG_CMD_IMLS
137e21185baSChander Kashyap #define CONFIG_IDENT_STRING		" for SMDKC210/V310"
138e21185baSChander Kashyap 
139e21185baSChander Kashyap #define CONFIG_CLK_1000_400_200
140e21185baSChander Kashyap 
141e21185baSChander Kashyap /* MIU (Memory Interleaving Unit) */
142e21185baSChander Kashyap #define CONFIG_MIU_2BIT_INTERLEAVED
143e21185baSChander Kashyap 
144e21185baSChander Kashyap #define CONFIG_ENV_IS_IN_MMC		1
145e21185baSChander Kashyap #define CONFIG_SYS_MMC_ENV_DEV		0
146e21185baSChander Kashyap #define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KB */
147e21185baSChander Kashyap #define RESERVE_BLOCK_SIZE		(512)
148e21185baSChander Kashyap #define BL1_SIZE			(16 << 10) /*16 K reserved for BL1*/
149e21185baSChander Kashyap #define CONFIG_ENV_OFFSET		(RESERVE_BLOCK_SIZE + BL1_SIZE)
150e21185baSChander Kashyap #define CONFIG_DOS_PARTITION		1
151e21185baSChander Kashyap 
152*643be9c0SRajeshwari Shinde #define CONFIG_SPL_LDSCRIPT	"board/samsung/common/exynos-uboot-spl.lds"
153*643be9c0SRajeshwari Shinde #define CONFIG_SPL_MAX_FOOTPRINT	(14 * 1024)
154*643be9c0SRajeshwari Shinde 
155*643be9c0SRajeshwari Shinde #define CONFIG_SYS_INIT_SP_ADDR		0x02040000
156e21185baSChander Kashyap 
157e21185baSChander Kashyap /* U-boot copy size from boot Media to DRAM.*/
158e21185baSChander Kashyap #define	COPY_BL2_SIZE		0x80000
159e21185baSChander Kashyap #define BL2_START_OFFSET	((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
160e21185baSChander Kashyap #define BL2_SIZE_BLOC_COUNT	(COPY_BL2_SIZE/512)
161e21185baSChander Kashyap 
162e21185baSChander Kashyap /* Ethernet Controllor Driver */
163e21185baSChander Kashyap #ifdef CONFIG_CMD_NET
164e21185baSChander Kashyap #define CONFIG_SMC911X
165e21185baSChander Kashyap #define CONFIG_SMC911X_BASE		0x5000000
166e21185baSChander Kashyap #define CONFIG_SMC911X_16_BIT
167e21185baSChander Kashyap #define CONFIG_ENV_SROM_BANK		1
168e21185baSChander Kashyap #endif /*CONFIG_CMD_NET*/
16907407d97SThomas Abraham 
17007407d97SThomas Abraham /* Enable devicetree support */
17107407d97SThomas Abraham #define CONFIG_OF_LIBFDT
172e21185baSChander Kashyap #endif	/* __CONFIG_H */
173