xref: /rk3399_rockchip-uboot/include/configs/smdkc100.h (revision 577968e5669858e1d5bcb651ab28d60d20166252)
18bc4ee9eSMinkyu Kang /*
28bc4ee9eSMinkyu Kang  * (C) Copyright 2009 Samsung Electronics
38bc4ee9eSMinkyu Kang  * Minkyu Kang <mk7.kang@samsung.com>
48bc4ee9eSMinkyu Kang  * HeungJun Kim <riverful.kim@samsung.com>
58bc4ee9eSMinkyu Kang  * Inki Dae <inki.dae@samsung.com>
68bc4ee9eSMinkyu Kang  *
78bc4ee9eSMinkyu Kang  * Configuation settings for the SAMSUNG SMDKC100 board.
88bc4ee9eSMinkyu Kang  *
91a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
108bc4ee9eSMinkyu Kang  */
118bc4ee9eSMinkyu Kang 
128bc4ee9eSMinkyu Kang #ifndef __CONFIG_H
138bc4ee9eSMinkyu Kang #define __CONFIG_H
148bc4ee9eSMinkyu Kang 
158bc4ee9eSMinkyu Kang /*
168bc4ee9eSMinkyu Kang  * High Level Configuration Options
178bc4ee9eSMinkyu Kang  * (easy to change)
188bc4ee9eSMinkyu Kang  */
198bc4ee9eSMinkyu Kang #define CONFIG_SAMSUNG		1	/* in a SAMSUNG core */
20889a275dSMinkyu Kang #define CONFIG_S5P		1	/* which is in a S5P Family */
218bc4ee9eSMinkyu Kang #define CONFIG_S5PC100		1	/* which is in a S5PC100 */
228bc4ee9eSMinkyu Kang #define CONFIG_SMDKC100		1	/* working with SMDKC100 */
238bc4ee9eSMinkyu Kang 
248bc4ee9eSMinkyu Kang #include <asm/arch/cpu.h>		/* get chip and board defs */
258bc4ee9eSMinkyu Kang 
268bc4ee9eSMinkyu Kang #define CONFIG_ARCH_CPU_INIT
278bc4ee9eSMinkyu Kang 
288bc4ee9eSMinkyu Kang /* input clock of PLL: SMDKC100 has 12MHz input clock */
298bc4ee9eSMinkyu Kang #define CONFIG_SYS_CLK_FREQ		12000000
308bc4ee9eSMinkyu Kang 
318bc4ee9eSMinkyu Kang /* DRAM Base */
328bc4ee9eSMinkyu Kang #define CONFIG_SYS_SDRAM_BASE		0x30000000
338bc4ee9eSMinkyu Kang 
3408bcbc4aSMinkyu Kang /* Text Base */
3508bcbc4aSMinkyu Kang #define CONFIG_SYS_TEXT_BASE		0x34800000
3608bcbc4aSMinkyu Kang 
378bc4ee9eSMinkyu Kang #define CONFIG_SETUP_MEMORY_TAGS
388bc4ee9eSMinkyu Kang #define CONFIG_CMDLINE_TAG
398bc4ee9eSMinkyu Kang #define CONFIG_INITRD_TAG
408bc4ee9eSMinkyu Kang #define CONFIG_CMDLINE_EDITING
418bc4ee9eSMinkyu Kang 
428bc4ee9eSMinkyu Kang /*
438bc4ee9eSMinkyu Kang  * Size of malloc() pool
448bc4ee9eSMinkyu Kang  * 1MB = 0x100000, 0x100000 = 1024 * 1024
458bc4ee9eSMinkyu Kang  */
468bc4ee9eSMinkyu Kang #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (1 << 20))
47*2ecd7797SSimon Glass 
488bc4ee9eSMinkyu Kang /*
498bc4ee9eSMinkyu Kang  * select serial console configuration
508bc4ee9eSMinkyu Kang  */
518bc4ee9eSMinkyu Kang #define CONFIG_SERIAL0			1	/* use SERIAL 0 on SMDKC100 */
528bc4ee9eSMinkyu Kang 
53dc795a88SMinkyu Kang /* PWM */
54dc795a88SMinkyu Kang #define CONFIG_PWM			1
55dc795a88SMinkyu Kang 
568bc4ee9eSMinkyu Kang /* allow to overwrite serial and ethaddr */
578bc4ee9eSMinkyu Kang #define CONFIG_ENV_OVERWRITE
588bc4ee9eSMinkyu Kang 
598bc4ee9eSMinkyu Kang #define CONFIG_BOOTCOMMAND	"run ubifsboot"
608bc4ee9eSMinkyu Kang 
618bc4ee9eSMinkyu Kang #define CONFIG_RAMDISK_BOOT	"root=/dev/ram0 rw rootfstype=ext2" \
628bc4ee9eSMinkyu Kang 				" console=ttySAC0,115200n8" \
638bc4ee9eSMinkyu Kang 				" mem=128M"
648bc4ee9eSMinkyu Kang 
658bc4ee9eSMinkyu Kang #define CONFIG_COMMON_BOOT	"console=ttySAC0,115200n8" \
668bc4ee9eSMinkyu Kang 				" mem=128M " \
678bc4ee9eSMinkyu Kang 				" " MTDPARTS_DEFAULT
688bc4ee9eSMinkyu Kang 
698bc4ee9eSMinkyu Kang #define CONFIG_UPDATEB	"updateb=onenand erase 0x0 0x40000;" \
708bc4ee9eSMinkyu Kang 			" onenand write 0x32008000 0x0 0x40000\0"
718bc4ee9eSMinkyu Kang 
728bc4ee9eSMinkyu Kang #define CONFIG_ENV_OVERWRITE
738bc4ee9eSMinkyu Kang #define CONFIG_EXTRA_ENV_SETTINGS					\
748bc4ee9eSMinkyu Kang 	CONFIG_UPDATEB \
758bc4ee9eSMinkyu Kang 	"updatek=" \
768bc4ee9eSMinkyu Kang 		"onenand erase 0x60000 0x300000;" \
778bc4ee9eSMinkyu Kang 		"onenand write 0x31008000 0x60000 0x300000\0" \
788bc4ee9eSMinkyu Kang 	"updateu=" \
798bc4ee9eSMinkyu Kang 		"onenand erase block 147-4095;" \
808bc4ee9eSMinkyu Kang 		"onenand write 0x32000000 0x1260000 0x8C0000\0" \
818bc4ee9eSMinkyu Kang 	"bootk=" \
828bc4ee9eSMinkyu Kang 		"onenand read 0x30007FC0 0x60000 0x300000;" \
838bc4ee9eSMinkyu Kang 		"bootm 0x30007FC0\0" \
848bc4ee9eSMinkyu Kang 	"flashboot=" \
858bc4ee9eSMinkyu Kang 		"set bootargs root=/dev/mtdblock${bootblock} " \
868bc4ee9eSMinkyu Kang 		"rootfstype=${rootfstype} " \
878bc4ee9eSMinkyu Kang 		"ubi.mtd=${ubiblock} ${opts} " CONFIG_COMMON_BOOT ";" \
888bc4ee9eSMinkyu Kang 		"run bootk\0" \
898bc4ee9eSMinkyu Kang 	"ubifsboot=" \
908bc4ee9eSMinkyu Kang 		"set bootargs root=ubi0!rootfs rootfstype=ubifs " \
918bc4ee9eSMinkyu Kang 		" ubi.mtd=${ubiblock} ${opts} " CONFIG_COMMON_BOOT "; " \
928bc4ee9eSMinkyu Kang 		"run bootk\0" \
938bc4ee9eSMinkyu Kang 	"boottrace=setenv opts initcall_debug; run bootcmd\0" \
948bc4ee9eSMinkyu Kang 	"android=" \
958bc4ee9eSMinkyu Kang 		"set bootargs root=ubi0!ramdisk ubi.mtd=${ubiblock} " \
968bc4ee9eSMinkyu Kang 		"rootfstype=ubifs init=/init.sh " CONFIG_COMMON_BOOT "; " \
978bc4ee9eSMinkyu Kang 		"run bootk\0" \
988bc4ee9eSMinkyu Kang 	"nfsboot=" \
998bc4ee9eSMinkyu Kang 		"set bootargs root=/dev/nfs ubi.mtd=${ubiblock} " \
1008bc4ee9eSMinkyu Kang 		"nfsroot=${nfsroot},nolock " \
1018bc4ee9eSMinkyu Kang 		"ip=${ipaddr}:${serverip}:${gatewayip}:" \
1028bc4ee9eSMinkyu Kang 		"${netmask}:nowplus:usb0:off " CONFIG_COMMON_BOOT "; " \
1038bc4ee9eSMinkyu Kang 		"run bootk\0" \
1048bc4ee9eSMinkyu Kang 	"ramboot=" \
1058bc4ee9eSMinkyu Kang 		"set bootargs " CONFIG_RAMDISK_BOOT \
1068bc4ee9eSMinkyu Kang 		" initrd=0x33000000,8M ramdisk=8192\0" \
1078bc4ee9eSMinkyu Kang 	"rootfstype=cramfs\0" \
1088bc4ee9eSMinkyu Kang 	"mtdparts=" MTDPARTS_DEFAULT "\0" \
1098bc4ee9eSMinkyu Kang 	"meminfo=mem=128M\0" \
1108bc4ee9eSMinkyu Kang 	"nfsroot=/nfsroot/arm\0" \
1118bc4ee9eSMinkyu Kang 	"bootblock=5\0" \
1128bc4ee9eSMinkyu Kang 	"ubiblock=4\0" \
1138bc4ee9eSMinkyu Kang 	"ubi=enabled"
1148bc4ee9eSMinkyu Kang 
1158bc4ee9eSMinkyu Kang /*
1168bc4ee9eSMinkyu Kang  * Miscellaneous configurable options
1178bc4ee9eSMinkyu Kang  */
1188bc4ee9eSMinkyu Kang #define CONFIG_SYS_LONGHELP		/* undef to save memory */
1198bc4ee9eSMinkyu Kang #define CONFIG_SYS_PBSIZE	384	/* Print Buffer Size */
1208bc4ee9eSMinkyu Kang /* memtest works on */
1218bc4ee9eSMinkyu Kang #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
1228bc4ee9eSMinkyu Kang #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5e00000)
1238bc4ee9eSMinkyu Kang #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE
1248bc4ee9eSMinkyu Kang 
1258bc4ee9eSMinkyu Kang /* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */
1268bc4ee9eSMinkyu Kang #define CONFIG_NR_DRAM_BANKS	1
1278bc4ee9eSMinkyu Kang #define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE	/* SDRAM Bank #1 */
1288bc4ee9eSMinkyu Kang #define PHYS_SDRAM_1_SIZE	(128 << 20)	/* 0x8000000, 128 MB Bank #1 */
1298bc4ee9eSMinkyu Kang 
1308bc4ee9eSMinkyu Kang #define CONFIG_SYS_MONITOR_BASE	0x00000000
1318bc4ee9eSMinkyu Kang 
1328bc4ee9eSMinkyu Kang /*-----------------------------------------------------------------------
1338bc4ee9eSMinkyu Kang  * FLASH and environment organization
1348bc4ee9eSMinkyu Kang  */
1358bc4ee9eSMinkyu Kang 
1368bc4ee9eSMinkyu Kang #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* 256 KiB */
1378bc4ee9eSMinkyu Kang 
13814d0a02aSWolfgang Denk #if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000)
1398bc4ee9eSMinkyu Kang #define CONFIG_ENABLE_MMU
1408bc4ee9eSMinkyu Kang #endif
1418bc4ee9eSMinkyu Kang 
1428bc4ee9eSMinkyu Kang #ifdef CONFIG_ENABLE_MMU
1438bc4ee9eSMinkyu Kang #define CONFIG_SYS_MAPPED_RAM_BASE	0xc0000000
1448bc4ee9eSMinkyu Kang #else
1458bc4ee9eSMinkyu Kang #define CONFIG_SYS_MAPPED_RAM_BASE	CONFIG_SYS_SDRAM_BASE
1468bc4ee9eSMinkyu Kang #endif
1478bc4ee9eSMinkyu Kang 
1488bc4ee9eSMinkyu Kang /*-----------------------------------------------------------------------
1498bc4ee9eSMinkyu Kang  * Boot configuration
1508bc4ee9eSMinkyu Kang  */
1518bc4ee9eSMinkyu Kang #define CONFIG_ENV_SIZE			(128 << 10)	/* 128KiB, 0x20000 */
1528bc4ee9eSMinkyu Kang #define CONFIG_ENV_ADDR			(256 << 10)	/* 256KiB, 0x40000 */
1538bc4ee9eSMinkyu Kang #define CONFIG_ENV_OFFSET		(256 << 10)	/* 256KiB, 0x40000 */
1548bc4ee9eSMinkyu Kang 
1558bc4ee9eSMinkyu Kang #define CONFIG_USE_ONENAND_BOARD_INIT
1568bc4ee9eSMinkyu Kang #define CONFIG_SAMSUNG_ONENAND		1
1578bc4ee9eSMinkyu Kang #define CONFIG_SYS_ONENAND_BASE		0xE7100000
1588bc4ee9eSMinkyu Kang 
15998877c3cSMinkyu Kang #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR - 0x1000000)
16098877c3cSMinkyu Kang 
1612528dc52SNaveen Krishna CH /*
1622528dc52SNaveen Krishna CH  * Ethernet Contoller driver
1632528dc52SNaveen Krishna CH  */
1642528dc52SNaveen Krishna CH #ifdef CONFIG_CMD_NET
1652528dc52SNaveen Krishna CH #define CONFIG_SMC911X         1       /* we have a SMC9115 on-board   */
1662528dc52SNaveen Krishna CH #define CONFIG_SMC911X_16_BIT  1       /* SMC911X_16_BIT Mode          */
1672528dc52SNaveen Krishna CH #define CONFIG_SMC911X_BASE    0x98800300      /* SMC911X Drive Base   */
1682528dc52SNaveen Krishna CH #define CONFIG_ENV_SROM_BANK   3       /* Select SROM Bank-3 for Ethernet*/
1692528dc52SNaveen Krishna CH #endif /* CONFIG_CMD_NET */
1702528dc52SNaveen Krishna CH 
1718bc4ee9eSMinkyu Kang #endif	/* __CONFIG_H */
172