xref: /rk3399_rockchip-uboot/include/configs/smartweb.h (revision 2cce6f5430c3ca3b2b9eafaed874ff104f26b660)
1 /*
2  * (C) Copyright 2007-2008
3  * Stelian Pop <stelian@popies.net>
4  * Lead Tech Design <www.leadtechdesign.com>
5  *
6  * (C) Copyright 2010
7  * Achim Ehrlich <aehrlich@taskit.de>
8  * taskit GmbH <www.taskit.de>
9  *
10  * (C) Copyright 2012
11  * Markus Hubig <mhubig@imko.de>
12  * IMKO GmbH <www.imko.de>
13  *
14  * (C) Copyright 2014
15  * Heiko Schocher <hs@denx.de>
16  * DENX Software Engineering GmbH
17  *
18  * Configuation settings for the smartweb.
19  *
20  * SPDX-License-Identifier:	GPL-2.0+
21  */
22 
23 #ifndef __CONFIG_H
24 #define __CONFIG_H
25 
26 /*
27  * SoC must be defined first, before hardware.h is included.
28  * In this case SoC is defined in boards.cfg.
29  */
30 #include <asm/hardware.h>
31 #include <linux/sizes.h>
32 
33 /*
34  * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
35  * program. Since the linker has to swallow that define, we must use a pure
36  * hex number here!
37  */
38 #define CONFIG_SYS_TEXT_BASE		0x23000000
39 
40 /* ARM asynchronous clock */
41 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
42 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432MHz crystal */
43 
44 /* misc settings */
45 #define CONFIG_CMDLINE_TAG		/* pass commandline to Kernel */
46 #define CONFIG_SETUP_MEMORY_TAGS	/* pass memory defs to kernel */
47 #define CONFIG_INITRD_TAG		/* pass initrd param to kernel */
48 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY	/* U-Boot is loaded by a bootloader */
49 
50 /* We set the max number of command args high to avoid HUSH bugs. */
51 #define CONFIG_SYS_MAXARGS    32
52 
53 /* setting board specific options */
54 #define CONFIG_MACH_TYPE		MACH_TYPE_SMARTWEB
55 #define CONFIG_AUTO_COMPLETE
56 #define CONFIG_ENV_OVERWRITE    1 /* Overwrite ethaddr / serial# */
57 #define CONFIG_AUTO_COMPLETE
58 #define CONFIG_SYS_AUTOLOAD "yes"
59 #define CONFIG_RESET_TO_RETRY
60 
61 /* The LED PINs */
62 #define CONFIG_RED_LED			AT91_PIN_PA9
63 #define CONFIG_GREEN_LED		AT91_PIN_PA6
64 
65 /*
66  * SDRAM: 1 bank, 64 MB, base address 0x20000000
67  * Already initialized before u-boot gets started.
68  */
69 #define CONFIG_NR_DRAM_BANKS		1
70 #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
71 #define CONFIG_SYS_SDRAM_SIZE		(64 * SZ_1M)
72 
73 /*
74  * Perform a SDRAM Memtest from the start of SDRAM
75  * till the beginning of the U-Boot position in RAM.
76  */
77 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
78 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - 0x100000)
79 
80 /* Size of malloc() pool */
81 #define CONFIG_SYS_MALLOC_LEN \
82 	ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
83 
84 /* NAND flash settings */
85 #define CONFIG_SYS_MAX_NAND_DEVICE	1
86 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
87 #define CONFIG_SYS_NAND_DBW_8
88 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
89 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
90 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
91 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
92 
93 #define CONFIG_MTD_DEVICE
94 #define MTDIDS_NAME_STR		"atmel_nand"
95 #define MTDIDS_DEFAULT		"nand0=" MTDIDS_NAME_STR
96 #define MTDPARTS_DEFAULT	"mtdparts=" MTDIDS_NAME_STR ":" \
97 					"128k(Bootstrap),"		\
98 					"896k(U-Boot),"	\
99 					"512k(ENV0),"	\
100 					"512k(ENV1),"	\
101 					"4M(Linux),"	\
102 					"-(Root-FS)"
103 
104 /* general purpose I/O */
105 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
106 #define CONFIG_AT91_GPIO		/* enable the GPIO features */
107 #define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
108 
109 /* serial console */
110 #define CONFIG_ATMEL_USART
111 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
112 #define CONFIG_USART_ID			ATMEL_ID_SYS
113 
114 /*
115  * Ethernet configuration
116  *
117  */
118 #define CONFIG_MACB
119 #define CONFIG_RMII			/* use reduced MII inteface */
120 #define CONFIG_NET_RETRY_COUNT	20      /* # of DHCP/BOOTP retries */
121 #define CONFIG_AT91_WANTS_COMMON_PHY
122 
123 /* BOOTP and DHCP options */
124 #define CONFIG_BOOTP_BOOTFILESIZE
125 #define CONFIG_BOOTP_BOOTPATH
126 #define CONFIG_BOOTP_GATEWAY
127 #define CONFIG_BOOTP_HOSTNAME
128 #define CONFIG_NFSBOOTCOMMAND						\
129 	"setenv autoload yes; setenv autoboot yes; "			\
130 	"setenv bootargs ${basicargs} ${mtdparts} "			\
131 	"root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; "	\
132 	"dhcp"
133 
134 /* Enable the watchdog */
135 #define CONFIG_AT91SAM9_WATCHDOG
136 #if !defined(CONFIG_SPL_BUILD)
137 #define CONFIG_HW_WATCHDOG
138 #endif
139 #define CONFIG_AT91_HW_WDT_TIMEOUT	15
140 
141 #if !defined(CONFIG_SPL_BUILD)
142 /* USB configuration */
143 #define CONFIG_USB_ATMEL
144 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
145 #define CONFIG_USB_OHCI_NEW
146 #define CONFIG_SYS_USB_OHCI_CPU_INIT
147 #define CONFIG_SYS_USB_OHCI_REGS_BASE	ATMEL_UHP_BASE
148 #define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9260"
149 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
150 
151 /* USB DFU support */
152 #define CONFIG_MTD_DEVICE
153 #define CONFIG_MTD_PARTITIONS
154 
155 #define CONFIG_USB_GADGET_AT91
156 
157 /* DFU class support */
158 #define CONFIG_SYS_DFU_DATA_BUF_SIZE	SZ_1M
159 #define DFU_MANIFEST_POLL_TIMEOUT	25000
160 #endif
161 
162 /* General Boot Parameter */
163 #define CONFIG_BOOTCOMMAND		"run flashboot"
164 #define CONFIG_SYS_CBSIZE		512
165 #define CONFIG_SYS_LONGHELP
166 #define CONFIG_CMDLINE_EDITING
167 
168 /*
169  * RAM Memory address where to put the
170  * Linux Kernel befor starting.
171  */
172 #define CONFIG_SYS_LOAD_ADDR		0x22000000
173 
174 /*
175  * The NAND Flash partitions:
176  */
177 #define CONFIG_ENV_OFFSET		(0x100000)
178 #define CONFIG_ENV_OFFSET_REDUND	(0x180000)
179 #define CONFIG_ENV_RANGE		(SZ_512K)
180 #define CONFIG_ENV_SIZE			(SZ_128K)
181 
182 /*
183  * Predefined environment variables.
184  * Usefull to define some easy to use boot commands.
185  */
186 #define	CONFIG_EXTRA_ENV_SETTINGS					\
187 									\
188 	"basicargs=console=ttyS0,115200\0"				\
189 									\
190 	"mtdparts="MTDPARTS_DEFAULT"\0"
191 
192 #ifdef CONFIG_SPL_BUILD
193 #define CONFIG_SYS_INIT_SP_ADDR		0x301000
194 #define CONFIG_SPL_STACK_R
195 #define CONFIG_SPL_STACK_R_ADDR		CONFIG_SYS_TEXT_BASE
196 #else
197 /*
198  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
199  * leaving the correct space for initial global data structure above that
200  * address while providing maximum stack area below.
201  */
202 #define CONFIG_SYS_INIT_SP_ADDR \
203 	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
204 #endif
205 
206 /* Defines for SPL */
207 #define CONFIG_SPL_FRAMEWORK
208 #define CONFIG_SPL_TEXT_BASE		0x0
209 #define CONFIG_SPL_MAX_SIZE		(SZ_4K)
210 
211 #define CONFIG_SPL_BSS_START_ADDR	CONFIG_SYS_SDRAM_BASE
212 #define CONFIG_SPL_BSS_MAX_SIZE		(SZ_16K)
213 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
214 					CONFIG_SPL_BSS_MAX_SIZE)
215 #define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
216 
217 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL	(2*32 + 14)
218 #define CONFIG_SYS_USE_NANDFLASH	1
219 #define CONFIG_SPL_NAND_DRIVERS
220 #define CONFIG_SPL_NAND_BASE
221 #define CONFIG_SPL_NAND_ECC
222 #define CONFIG_SPL_NAND_RAW_ONLY
223 #define CONFIG_SPL_NAND_SOFTECC
224 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x20000
225 #define CONFIG_SYS_NAND_U_BOOT_SIZE	SZ_512K
226 #define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
227 #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
228 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
229 
230 #define CONFIG_SYS_NAND_SIZE		(SZ_256M)
231 #define CONFIG_SYS_NAND_PAGE_SIZE	SZ_2K
232 #define CONFIG_SYS_NAND_BLOCK_SIZE	(SZ_128K)
233 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
234 					 CONFIG_SYS_NAND_PAGE_SIZE)
235 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
236 #define CONFIG_SYS_NAND_ECCSIZE		256
237 #define CONFIG_SYS_NAND_ECCBYTES	3
238 #define CONFIG_SYS_NAND_OOBSIZE		64
239 #define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
240 					  48, 49, 50, 51, 52, 53, 54, 55, \
241 					  56, 57, 58, 59, 60, 61, 62, 63, }
242 
243 #define CONFIG_SPL_ATMEL_SIZE
244 #define CONFIG_SYS_MASTER_CLOCK		(198656000/2)
245 #define AT91_PLL_LOCK_TIMEOUT		1000000
246 #define CONFIG_SYS_AT91_PLLA		0x2060bf09
247 #define CONFIG_SYS_MCKR			0x100
248 #define CONFIG_SYS_MCKR_CSS		(0x02 | CONFIG_SYS_MCKR)
249 #define CONFIG_SYS_AT91_PLLB		0x10483f0e
250 
251 #if defined(CONFIG_SPL_BUILD)
252 #define CONFIG_SYS_ICACHE_OFF
253 #define CONFIG_SYS_DCACHE_OFF
254 #endif
255 #endif /* __CONFIG_H */
256