xref: /rk3399_rockchip-uboot/include/configs/smartweb.h (revision aca5d0830aab91680c2ef44e9cb2999cbea19f2f)
13b5df50eSHeiko Schocher /*
23b5df50eSHeiko Schocher  * (C) Copyright 2007-2008
33b5df50eSHeiko Schocher  * Stelian Pop <stelian@popies.net>
43b5df50eSHeiko Schocher  * Lead Tech Design <www.leadtechdesign.com>
53b5df50eSHeiko Schocher  *
63b5df50eSHeiko Schocher  * (C) Copyright 2010
73b5df50eSHeiko Schocher  * Achim Ehrlich <aehrlich@taskit.de>
83b5df50eSHeiko Schocher  * taskit GmbH <www.taskit.de>
93b5df50eSHeiko Schocher  *
103b5df50eSHeiko Schocher  * (C) Copyright 2012
113b5df50eSHeiko Schocher  * Markus Hubig <mhubig@imko.de>
123b5df50eSHeiko Schocher  * IMKO GmbH <www.imko.de>
133b5df50eSHeiko Schocher  *
143b5df50eSHeiko Schocher  * (C) Copyright 2014
153b5df50eSHeiko Schocher  * Heiko Schocher <hs@denx.de>
163b5df50eSHeiko Schocher  * DENX Software Engineering GmbH
173b5df50eSHeiko Schocher  *
183b5df50eSHeiko Schocher  * Configuation settings for the smartweb.
193b5df50eSHeiko Schocher  *
203b5df50eSHeiko Schocher  * SPDX-License-Identifier:	GPL-2.0+
213b5df50eSHeiko Schocher  */
223b5df50eSHeiko Schocher 
233b5df50eSHeiko Schocher #ifndef __CONFIG_H
243b5df50eSHeiko Schocher #define __CONFIG_H
253b5df50eSHeiko Schocher 
263b5df50eSHeiko Schocher /*
273b5df50eSHeiko Schocher  * SoC must be defined first, before hardware.h is included.
283b5df50eSHeiko Schocher  * In this case SoC is defined in boards.cfg.
293b5df50eSHeiko Schocher  */
303b5df50eSHeiko Schocher #include <asm/hardware.h>
31e8b81eefSHeiko Schocher #include <linux/sizes.h>
323b5df50eSHeiko Schocher 
333b5df50eSHeiko Schocher /*
343b5df50eSHeiko Schocher  * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
353b5df50eSHeiko Schocher  * program. Since the linker has to swallow that define, we must use a pure
363b5df50eSHeiko Schocher  * hex number here!
373b5df50eSHeiko Schocher  */
383b5df50eSHeiko Schocher #define CONFIG_SYS_TEXT_BASE		0x23000000
393b5df50eSHeiko Schocher 
403b5df50eSHeiko Schocher /* ARM asynchronous clock */
413b5df50eSHeiko Schocher #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
423b5df50eSHeiko Schocher #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432MHz crystal */
433b5df50eSHeiko Schocher 
443b5df50eSHeiko Schocher /* misc settings */
453b5df50eSHeiko Schocher #define CONFIG_CMDLINE_TAG		/* pass commandline to Kernel */
463b5df50eSHeiko Schocher #define CONFIG_SETUP_MEMORY_TAGS	/* pass memory defs to kernel */
473b5df50eSHeiko Schocher #define CONFIG_INITRD_TAG		/* pass initrd param to kernel */
483b5df50eSHeiko Schocher #define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is loaded by a bootloader */
493b5df50eSHeiko Schocher #define CONFIG_BOARD_EARLY_INIT_F	/* call board_early_init_f() */
503b5df50eSHeiko Schocher #define CONFIG_DISPLAY_CPUINFO		/* display CPU Info at startup */
513b5df50eSHeiko Schocher 
523b5df50eSHeiko Schocher /* setting board specific options */
533b5df50eSHeiko Schocher # define CONFIG_MACH_TYPE		MACH_TYPE_SMARTWEB
543b5df50eSHeiko Schocher #define CONFIG_SYS_GENERIC_BOARD
553b5df50eSHeiko Schocher #define CONFIG_CMDLINE_EDITING
563b5df50eSHeiko Schocher #define CONFIG_AUTO_COMPLETE
573b5df50eSHeiko Schocher 
583b5df50eSHeiko Schocher /* The LED PINs */
593b5df50eSHeiko Schocher #define CONFIG_RED_LED			AT91_PIN_PA9
603b5df50eSHeiko Schocher #define CONFIG_GREEN_LED		AT91_PIN_PA6
613b5df50eSHeiko Schocher 
623b5df50eSHeiko Schocher /*
633b5df50eSHeiko Schocher  * SDRAM: 1 bank, 64 MB, base address 0x20000000
643b5df50eSHeiko Schocher  * Already initialized before u-boot gets started.
653b5df50eSHeiko Schocher  */
663b5df50eSHeiko Schocher #define CONFIG_NR_DRAM_BANKS		1
673b5df50eSHeiko Schocher #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
68e8b81eefSHeiko Schocher #define CONFIG_SYS_SDRAM_SIZE		(64 * SZ_1M)
693b5df50eSHeiko Schocher 
703b5df50eSHeiko Schocher /*
713b5df50eSHeiko Schocher  * Perform a SDRAM Memtest from the start of SDRAM
723b5df50eSHeiko Schocher  * till the beginning of the U-Boot position in RAM.
733b5df50eSHeiko Schocher  */
743b5df50eSHeiko Schocher #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
753b5df50eSHeiko Schocher #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - 0x100000)
763b5df50eSHeiko Schocher 
773b5df50eSHeiko Schocher /* Size of malloc() pool */
783b5df50eSHeiko Schocher #define CONFIG_SYS_MALLOC_LEN \
79e8b81eefSHeiko Schocher 	ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
803b5df50eSHeiko Schocher 
813b5df50eSHeiko Schocher /* NAND flash settings */
823b5df50eSHeiko Schocher #define CONFIG_NAND_ATMEL
833b5df50eSHeiko Schocher #define CONFIG_SYS_NO_FLASH
843b5df50eSHeiko Schocher #define CONFIG_SYS_MAX_NAND_DEVICE	1
853b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
863b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_DBW_8
873b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
883b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
893b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
903b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC13
913b5df50eSHeiko Schocher 
923b5df50eSHeiko Schocher #define CONFIG_CMD_MTDPARTS
933b5df50eSHeiko Schocher #define CONFIG_MTD_DEVICE
943b5df50eSHeiko Schocher #define MTDIDS_NAME_STR		"atmel_nand"
953b5df50eSHeiko Schocher #define MTDIDS_DEFAULT		"nand0=" MTDIDS_NAME_STR
963b5df50eSHeiko Schocher #define MTDPARTS_DEFAULT	"mtdparts=" MTDIDS_NAME_STR ":" \
973b5df50eSHeiko Schocher 					"128k(Bootstrap),"		\
983b5df50eSHeiko Schocher 					"896k(U-Boot),"	\
993b5df50eSHeiko Schocher 					"512k(ENV0),"	\
1003b5df50eSHeiko Schocher 					"512k(ENV1),"	\
1013b5df50eSHeiko Schocher 					"4M(Linux),"	\
1023b5df50eSHeiko Schocher 					"-(Root-FS)"
1033b5df50eSHeiko Schocher 
1043b5df50eSHeiko Schocher /* general purpose I/O */
1053b5df50eSHeiko Schocher #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
1063b5df50eSHeiko Schocher #define CONFIG_AT91_GPIO		/* enable the GPIO features */
1073b5df50eSHeiko Schocher #define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
1083b5df50eSHeiko Schocher 
1093b5df50eSHeiko Schocher /* serial console */
1103b5df50eSHeiko Schocher #define CONFIG_ATMEL_USART
1113b5df50eSHeiko Schocher #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
1123b5df50eSHeiko Schocher #define CONFIG_USART_ID			ATMEL_ID_SYS
1133b5df50eSHeiko Schocher #define CONFIG_BAUDRATE			115200
1143b5df50eSHeiko Schocher 
1153b5df50eSHeiko Schocher /*
1163b5df50eSHeiko Schocher  * Ethernet configuration
1173b5df50eSHeiko Schocher  *
1183b5df50eSHeiko Schocher  */
1193b5df50eSHeiko Schocher #define CONFIG_MACB
120*aca5d083SHeiko Schocher #define CONFIG_USB_HOST_ETHER
121*aca5d083SHeiko Schocher #define CONFIG_USB_ETHER_ASIX
122*aca5d083SHeiko Schocher #define CONFIG_USB_ETHER_MCS7830
1233b5df50eSHeiko Schocher #define CONFIG_RMII			/* use reduced MII inteface */
1243b5df50eSHeiko Schocher #define CONFIG_NET_RETRY_COUNT	20      /* # of DHCP/BOOTP retries */
1253b5df50eSHeiko Schocher #define CONFIG_AT91_WANTS_COMMON_PHY
1263b5df50eSHeiko Schocher 
1273b5df50eSHeiko Schocher /* BOOTP and DHCP options */
1283b5df50eSHeiko Schocher #define CONFIG_BOOTP_BOOTFILESIZE
1293b5df50eSHeiko Schocher #define CONFIG_BOOTP_BOOTPATH
1303b5df50eSHeiko Schocher #define CONFIG_BOOTP_GATEWAY
1313b5df50eSHeiko Schocher #define CONFIG_BOOTP_HOSTNAME
1323b5df50eSHeiko Schocher #define CONFIG_NFSBOOTCOMMAND						\
1333b5df50eSHeiko Schocher 	"setenv autoload yes; setenv autoboot yes; "			\
1343b5df50eSHeiko Schocher 	"setenv bootargs ${basicargs} ${mtdparts} "			\
1353b5df50eSHeiko Schocher 	"root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; "	\
1363b5df50eSHeiko Schocher 	"dhcp"
1373b5df50eSHeiko Schocher 
1383b5df50eSHeiko Schocher /* Enable the watchdog */
1393b5df50eSHeiko Schocher #define CONFIG_AT91SAM9_WATCHDOG
1403b5df50eSHeiko Schocher #if !defined(CONFIG_SPL_BUILD)
1413b5df50eSHeiko Schocher #define CONFIG_HW_WATCHDOG
1423b5df50eSHeiko Schocher #endif
1433b5df50eSHeiko Schocher #define CONFIG_AT91_HW_WDT_TIMEOUT	15
1443b5df50eSHeiko Schocher 
1453b5df50eSHeiko Schocher #if !defined(CONFIG_SPL_BUILD)
1463b5df50eSHeiko Schocher /* USB configuration */
147e8b81eefSHeiko Schocher #define CONFIG_CMD_USB
1483b5df50eSHeiko Schocher #define CONFIG_USB_ATMEL
1493b5df50eSHeiko Schocher #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
1503b5df50eSHeiko Schocher #define CONFIG_USB_OHCI_NEW
1513b5df50eSHeiko Schocher #define CONFIG_SYS_USB_OHCI_CPU_INIT
1523b5df50eSHeiko Schocher #define CONFIG_SYS_USB_OHCI_REGS_BASE	ATMEL_UHP_BASE
1533b5df50eSHeiko Schocher #define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9260"
1543b5df50eSHeiko Schocher #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
155e8b81eefSHeiko Schocher 
156e8b81eefSHeiko Schocher #define CONFIG_USB_HOST_ETHER
157e8b81eefSHeiko Schocher #define CONFIG_USB_ETHER_ASIX
158e8b81eefSHeiko Schocher #define CONFIG_USB_ETHER_MCS7830
159e8b81eefSHeiko Schocher 
160e8b81eefSHeiko Schocher /* USB DFU support */
161e8b81eefSHeiko Schocher #define CONFIG_CMD_MTDPARTS
162e8b81eefSHeiko Schocher #define CONFIG_MTD_DEVICE
163e8b81eefSHeiko Schocher #define CONFIG_MTD_PARTITIONS
164e8b81eefSHeiko Schocher 
165e8b81eefSHeiko Schocher #define CONFIG_USB_GADGET
166e8b81eefSHeiko Schocher #define CONFIG_USB_GADGET_AT91
167e8b81eefSHeiko Schocher 
168e8b81eefSHeiko Schocher /* DFU class support */
169e8b81eefSHeiko Schocher #define CONFIG_CMD_DFU
170e8b81eefSHeiko Schocher #define CONFIG_USB_FUNCTION_DFU
171e8b81eefSHeiko Schocher #define CONFIG_DFU_NAND
172e8b81eefSHeiko Schocher #define CONFIG_USB_GADGET_DOWNLOAD
173e8b81eefSHeiko Schocher #define CONFIG_USB_GADGET_VBUS_DRAW	2
174e8b81eefSHeiko Schocher #define CONFIG_SYS_DFU_DATA_BUF_SIZE	SZ_1M
175e8b81eefSHeiko Schocher #define DFU_MANIFEST_POLL_TIMEOUT	25000
176e8b81eefSHeiko Schocher 
177e8b81eefSHeiko Schocher /* USB DFU IDs */
178e8b81eefSHeiko Schocher #define CONFIG_G_DNL_VENDOR_NUM 0x0908
179e8b81eefSHeiko Schocher #define CONFIG_G_DNL_PRODUCT_NUM 0x02d2
180e8b81eefSHeiko Schocher #define CONFIG_G_DNL_MANUFACTURER "Siemens AG"
181e8b81eefSHeiko Schocher 
182e8b81eefSHeiko Schocher #define CONFIG_SYS_CACHELINE_SIZE	0x2000
1833b5df50eSHeiko Schocher #endif
1843b5df50eSHeiko Schocher 
1853b5df50eSHeiko Schocher /* General Boot Parameter */
1863b5df50eSHeiko Schocher #define CONFIG_BOOTDELAY		3
1873b5df50eSHeiko Schocher #define CONFIG_BOOTCOMMAND		"run flashboot"
188*aca5d083SHeiko Schocher #define CONFIG_BOOT_RETRY_TIME          30
1893b5df50eSHeiko Schocher #define CONFIG_SYS_CBSIZE		512
1903b5df50eSHeiko Schocher #define CONFIG_SYS_MAXARGS		16
1913b5df50eSHeiko Schocher #define CONFIG_SYS_PBSIZE \
1923b5df50eSHeiko Schocher 	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
1933b5df50eSHeiko Schocher #define CONFIG_SYS_LONGHELP
1943b5df50eSHeiko Schocher #define CONFIG_CMDLINE_EDITING
1953b5df50eSHeiko Schocher 
1963b5df50eSHeiko Schocher /*
1973b5df50eSHeiko Schocher  * RAM Memory address where to put the
1983b5df50eSHeiko Schocher  * Linux Kernel befor starting.
1993b5df50eSHeiko Schocher  */
2003b5df50eSHeiko Schocher #define CONFIG_SYS_LOAD_ADDR		0x22000000
2013b5df50eSHeiko Schocher 
2023b5df50eSHeiko Schocher /*
2033b5df50eSHeiko Schocher  * The NAND Flash partitions:
2043b5df50eSHeiko Schocher  */
2053b5df50eSHeiko Schocher #define CONFIG_ENV_IS_IN_NAND
2063b5df50eSHeiko Schocher #define CONFIG_ENV_OFFSET		(0x100000)
2073b5df50eSHeiko Schocher #define CONFIG_ENV_OFFSET_REDUND	(0x180000)
208e8b81eefSHeiko Schocher #define CONFIG_ENV_RANGE		(SZ_512K)
209e8b81eefSHeiko Schocher #define CONFIG_ENV_SIZE			(SZ_128K)
2103b5df50eSHeiko Schocher 
2113b5df50eSHeiko Schocher /*
2123b5df50eSHeiko Schocher  * Predefined environment variables.
2133b5df50eSHeiko Schocher  * Usefull to define some easy to use boot commands.
2143b5df50eSHeiko Schocher  */
2153b5df50eSHeiko Schocher #define	CONFIG_EXTRA_ENV_SETTINGS					\
2163b5df50eSHeiko Schocher 									\
2173b5df50eSHeiko Schocher 	"basicargs=console=ttyS0,115200\0"				\
2183b5df50eSHeiko Schocher 									\
2193b5df50eSHeiko Schocher 	"mtdparts="MTDPARTS_DEFAULT"\0"
2203b5df50eSHeiko Schocher 
2213b5df50eSHeiko Schocher /* Command line & features configuration */
2223b5df50eSHeiko Schocher #undef CONFIG_CMD_FPGA
2233b5df50eSHeiko Schocher #undef CONFIG_CMD_IMI
2243b5df50eSHeiko Schocher #undef CONFIG_CMD_IMLS
2253b5df50eSHeiko Schocher #undef CONFIG_CMD_LOADS
2263b5df50eSHeiko Schocher 
2273b5df50eSHeiko Schocher #define CONFIG_CMD_NAND
2283b5df50eSHeiko Schocher #define CONFIG_CMD_FAT
2293b5df50eSHeiko Schocher 
2303b5df50eSHeiko Schocher #ifdef CONFIG_MACB
2313b5df50eSHeiko Schocher # define CONFIG_CMD_PING
2323b5df50eSHeiko Schocher # define CONFIG_CMD_DHCP
2333b5df50eSHeiko Schocher #else
2343b5df50eSHeiko Schocher # undef CONFIG_CMD_BOOTD
2353b5df50eSHeiko Schocher # undef CONFIG_CMD_NET
2363b5df50eSHeiko Schocher # undef CONFIG_CMD_NFS
2373b5df50eSHeiko Schocher #endif /* CONFIG_MACB */
2383b5df50eSHeiko Schocher 
2393b5df50eSHeiko Schocher #if !defined(CONFIG_SPL_BUILD)
2403b5df50eSHeiko Schocher /* Enable Device-Tree (FDT) support */
2413b5df50eSHeiko Schocher #define CONFIG_OF_LIBFDT
2423b5df50eSHeiko Schocher #define CONFIG_CMD_FDT
2433b5df50eSHeiko Schocher #define CONFIG_FIT
2443b5df50eSHeiko Schocher #endif
2453b5df50eSHeiko Schocher 
2463b5df50eSHeiko Schocher #ifdef CONFIG_SPL_BUILD
2473b5df50eSHeiko Schocher #define CONFIG_SYS_INIT_SP_ADDR		0x301000
2483b5df50eSHeiko Schocher #define CONFIG_SPL_STACK_R
2493b5df50eSHeiko Schocher #define CONFIG_SPL_STACK_R_ADDR		CONFIG_SYS_TEXT_BASE
2503b5df50eSHeiko Schocher #else
2513b5df50eSHeiko Schocher /*
2523b5df50eSHeiko Schocher  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
2533b5df50eSHeiko Schocher  * leaving the correct space for initial global data structure above that
2543b5df50eSHeiko Schocher  * address while providing maximum stack area below.
2553b5df50eSHeiko Schocher  */
2563b5df50eSHeiko Schocher #define CONFIG_SYS_INIT_SP_ADDR \
2573b5df50eSHeiko Schocher 	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
2583b5df50eSHeiko Schocher #endif
2593b5df50eSHeiko Schocher 
2603b5df50eSHeiko Schocher 
2613b5df50eSHeiko Schocher /* Defines for SPL */
2623b5df50eSHeiko Schocher #define CONFIG_SPL_FRAMEWORK
2633b5df50eSHeiko Schocher #define CONFIG_SPL_TEXT_BASE		0x0
264e8b81eefSHeiko Schocher #define CONFIG_SPL_MAX_SIZE		(SZ_4K)
2653b5df50eSHeiko Schocher 
2663b5df50eSHeiko Schocher #define CONFIG_SPL_BSS_START_ADDR	CONFIG_SYS_SDRAM_BASE
267e8b81eefSHeiko Schocher #define CONFIG_SPL_BSS_MAX_SIZE		(SZ_16K)
2683b5df50eSHeiko Schocher #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
2693b5df50eSHeiko Schocher 					CONFIG_SPL_BSS_MAX_SIZE)
2703b5df50eSHeiko Schocher #define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
2713b5df50eSHeiko Schocher #define CONFIG_SPL_LDSCRIPT	arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
2723b5df50eSHeiko Schocher 
2733b5df50eSHeiko Schocher #define CONFIG_SPL_LIBCOMMON_SUPPORT
2743b5df50eSHeiko Schocher #define CONFIG_SPL_LIBGENERIC_SUPPORT
2753b5df50eSHeiko Schocher 
2763b5df50eSHeiko Schocher #define CONFIG_SPL_BOARD_INIT
2773b5df50eSHeiko Schocher #define CONFIG_SPL_GPIO_SUPPORT
2783b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_ENABLE_PIN_SPL	(2*32 + 14)
2793b5df50eSHeiko Schocher #define CONFIG_SPL_NAND_SUPPORT
2803b5df50eSHeiko Schocher #define CONFIG_SYS_USE_NANDFLASH	1
2813b5df50eSHeiko Schocher #define CONFIG_SPL_NAND_DRIVERS
2823b5df50eSHeiko Schocher #define CONFIG_SPL_NAND_BASE
2833b5df50eSHeiko Schocher #define CONFIG_SPL_NAND_ECC
2843b5df50eSHeiko Schocher #define CONFIG_SPL_NAND_RAW_ONLY
2853b5df50eSHeiko Schocher #define CONFIG_SPL_NAND_SOFTECC
2863b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x20000
287e8b81eefSHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_SIZE	SZ_512K
2883b5df50eSHeiko Schocher #define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
2893b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
2903b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_5_ADDR_CYCLE
2913b5df50eSHeiko Schocher 
292e8b81eefSHeiko Schocher #define CONFIG_SYS_NAND_SIZE		(SZ_256M)
293e8b81eefSHeiko Schocher #define CONFIG_SYS_NAND_PAGE_SIZE	SZ_2K
294e8b81eefSHeiko Schocher #define CONFIG_SYS_NAND_BLOCK_SIZE	(SZ_128K)
2953b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
2963b5df50eSHeiko Schocher 					 CONFIG_SYS_NAND_PAGE_SIZE)
2973b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
2983b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_ECCSIZE		256
2993b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_ECCBYTES	3
3003b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_OOBSIZE		64
3013b5df50eSHeiko Schocher #define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
3023b5df50eSHeiko Schocher 					  48, 49, 50, 51, 52, 53, 54, 55, \
3033b5df50eSHeiko Schocher 					  56, 57, 58, 59, 60, 61, 62, 63, }
3043b5df50eSHeiko Schocher 
3053b5df50eSHeiko Schocher #define CONFIG_SPL_ATMEL_SIZE
3063b5df50eSHeiko Schocher #define CONFIG_SYS_MASTER_CLOCK		(198656000/2)
3073b5df50eSHeiko Schocher #define AT91_PLL_LOCK_TIMEOUT		1000000
3083b5df50eSHeiko Schocher #define CONFIG_SYS_AT91_PLLA		0x2060bf09
3093b5df50eSHeiko Schocher #define CONFIG_SYS_MCKR			0x100
3103b5df50eSHeiko Schocher #define CONFIG_SYS_MCKR_CSS		(0x02 | CONFIG_SYS_MCKR)
3113b5df50eSHeiko Schocher #define CONFIG_SYS_AT91_PLLB		0x10483f0e
3123b5df50eSHeiko Schocher 
3133b5df50eSHeiko Schocher #if defined(CONFIG_SPL_BUILD)
3143b5df50eSHeiko Schocher #define CONFIG_SYS_THUMB_BUILD
3153b5df50eSHeiko Schocher #define CONFIG_SYS_ICACHE_OFF
3163b5df50eSHeiko Schocher #define CONFIG_SYS_DCACHE_OFF
3173b5df50eSHeiko Schocher #undef CONFIG_SPL_OS_BOOT		/* Not supported by existing map */
3183b5df50eSHeiko Schocher #endif
3193b5df50eSHeiko Schocher #endif /* __CONFIG_H */
320