1*3b7f0e10SVladimir Barinov /* 2*3b7f0e10SVladimir Barinov * include/configs/silk.h 3*3b7f0e10SVladimir Barinov * This file is silk board configuration. 4*3b7f0e10SVladimir Barinov * 5*3b7f0e10SVladimir Barinov * Copyright (C) 2015 Renesas Electronics Corporation 6*3b7f0e10SVladimir Barinov * Copyright (C) 2015 Cogent Embedded, Inc. 7*3b7f0e10SVladimir Barinov * 8*3b7f0e10SVladimir Barinov * SPDX-License-Identifier: GPL-2.0 9*3b7f0e10SVladimir Barinov */ 10*3b7f0e10SVladimir Barinov 11*3b7f0e10SVladimir Barinov #ifndef __SILK_H 12*3b7f0e10SVladimir Barinov #define __SILK_H 13*3b7f0e10SVladimir Barinov 14*3b7f0e10SVladimir Barinov #undef DEBUG 15*3b7f0e10SVladimir Barinov #define CONFIG_R8A7794 16*3b7f0e10SVladimir Barinov #define CONFIG_RMOBILE_BOARD_STRING "Silk" 17*3b7f0e10SVladimir Barinov 18*3b7f0e10SVladimir Barinov #include "rcar-gen2-common.h" 19*3b7f0e10SVladimir Barinov 20*3b7f0e10SVladimir Barinov #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 21*3b7f0e10SVladimir Barinov #define CONFIG_SYS_TEXT_BASE 0x70000000 22*3b7f0e10SVladimir Barinov #else 23*3b7f0e10SVladimir Barinov #define CONFIG_SYS_TEXT_BASE 0xE6304000 24*3b7f0e10SVladimir Barinov #endif 25*3b7f0e10SVladimir Barinov 26*3b7f0e10SVladimir Barinov #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 27*3b7f0e10SVladimir Barinov #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC 28*3b7f0e10SVladimir Barinov #else 29*3b7f0e10SVladimir Barinov #define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC 30*3b7f0e10SVladimir Barinov #endif 31*3b7f0e10SVladimir Barinov #define STACK_AREA_SIZE 0xC000 32*3b7f0e10SVladimir Barinov #define LOW_LEVEL_MERAM_STACK \ 33*3b7f0e10SVladimir Barinov (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 34*3b7f0e10SVladimir Barinov 35*3b7f0e10SVladimir Barinov /* MEMORY */ 36*3b7f0e10SVladimir Barinov #define RCAR_GEN2_SDRAM_BASE 0x40000000 37*3b7f0e10SVladimir Barinov #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) 38*3b7f0e10SVladimir Barinov #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 39*3b7f0e10SVladimir Barinov 40*3b7f0e10SVladimir Barinov /* SCIF */ 41*3b7f0e10SVladimir Barinov #define CONFIG_SCIF_CONSOLE 42*3b7f0e10SVladimir Barinov #define CONFIG_CONS_SCIF2 43*3b7f0e10SVladimir Barinov #define CONFIG_SCIF_USE_EXT_CLK 44*3b7f0e10SVladimir Barinov 45*3b7f0e10SVladimir Barinov /* FLASH */ 46*3b7f0e10SVladimir Barinov #define CONFIG_SPI 47*3b7f0e10SVladimir Barinov #define CONFIG_SPI_FLASH_BAR 48*3b7f0e10SVladimir Barinov #define CONFIG_SH_QSPI 49*3b7f0e10SVladimir Barinov #define CONFIG_SPI_FLASH 50*3b7f0e10SVladimir Barinov #define CONFIG_SPI_FLASH_SPANSION 51*3b7f0e10SVladimir Barinov #define CONFIG_SPI_FLASH_QUAD 52*3b7f0e10SVladimir Barinov #define CONFIG_SYS_NO_FLASH 53*3b7f0e10SVladimir Barinov 54*3b7f0e10SVladimir Barinov /* SH Ether */ 55*3b7f0e10SVladimir Barinov #define CONFIG_NET_MULTI 56*3b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER 57*3b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER_USE_PORT 0 58*3b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER_PHY_ADDR 0x1 59*3b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 60*3b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER_CACHE_WRITEBACK 61*3b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER_CACHE_INVALIDATE 62*3b7f0e10SVladimir Barinov #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 63*3b7f0e10SVladimir Barinov #define CONFIG_PHYLIB 64*3b7f0e10SVladimir Barinov #define CONFIG_PHY_MICREL 65*3b7f0e10SVladimir Barinov #define CONFIG_BITBANGMII 66*3b7f0e10SVladimir Barinov #define CONFIG_BITBANGMII_MULTI 67*3b7f0e10SVladimir Barinov 68*3b7f0e10SVladimir Barinov /* Board Clock */ 69*3b7f0e10SVladimir Barinov #define RMOBILE_XTAL_CLK 20000000u 70*3b7f0e10SVladimir Barinov #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 71*3b7f0e10SVladimir Barinov #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 72*3b7f0e10SVladimir Barinov #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 73*3b7f0e10SVladimir Barinov #define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24) 74*3b7f0e10SVladimir Barinov #define CONFIG_SH_SCIF_CLK_FREQ 14745600 /* External Clock */ 75*3b7f0e10SVladimir Barinov 76*3b7f0e10SVladimir Barinov #define CONFIG_SYS_TMU_CLK_DIV 4 77*3b7f0e10SVladimir Barinov 78*3b7f0e10SVladimir Barinov /* i2c */ 79*3b7f0e10SVladimir Barinov #define CONFIG_CMD_I2C 80*3b7f0e10SVladimir Barinov #define CONFIG_SYS_I2C 81*3b7f0e10SVladimir Barinov #define CONFIG_SYS_I2C_SH 82*3b7f0e10SVladimir Barinov #define CONFIG_SYS_I2C_SLAVE 0x7F 83*3b7f0e10SVladimir Barinov #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 84*3b7f0e10SVladimir Barinov #define CONFIG_SYS_I2C_SH_SPEED0 400000 85*3b7f0e10SVladimir Barinov #define CONFIG_SYS_I2C_SH_SPEED1 400000 86*3b7f0e10SVladimir Barinov #define CONFIG_SYS_I2C_SH_SPEED2 400000 87*3b7f0e10SVladimir Barinov #define CONFIG_SH_I2C_DATA_HIGH 4 88*3b7f0e10SVladimir Barinov #define CONFIG_SH_I2C_DATA_LOW 5 89*3b7f0e10SVladimir Barinov #define CONFIG_SH_I2C_CLOCK 10000000 90*3b7f0e10SVladimir Barinov 91*3b7f0e10SVladimir Barinov #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 92*3b7f0e10SVladimir Barinov 93*3b7f0e10SVladimir Barinov /* USB */ 94*3b7f0e10SVladimir Barinov #define CONFIG_USB_STORAGE 95*3b7f0e10SVladimir Barinov #define CONFIG_USB_EHCI 96*3b7f0e10SVladimir Barinov #define CONFIG_USB_EHCI_RMOBILE 97*3b7f0e10SVladimir Barinov #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 98*3b7f0e10SVladimir Barinov 99*3b7f0e10SVladimir Barinov /* MMCIF */ 100*3b7f0e10SVladimir Barinov #define CONFIG_MMC 101*3b7f0e10SVladimir Barinov #define CONFIG_GENERIC_MMC 102*3b7f0e10SVladimir Barinov #define CONFIG_CMD_MMC 103*3b7f0e10SVladimir Barinov #define CONFIG_SH_MMCIF 104*3b7f0e10SVladimir Barinov #define CONFIG_SH_MMCIF_ADDR 0xee200000 105*3b7f0e10SVladimir Barinov #define CONFIG_SH_MMCIF_CLK 48000000 106*3b7f0e10SVladimir Barinov 107*3b7f0e10SVladimir Barinov /* Module stop status bits */ 108*3b7f0e10SVladimir Barinov /* INTC-RT */ 109*3b7f0e10SVladimir Barinov #define CONFIG_SMSTP0_ENA 0x00400000 110*3b7f0e10SVladimir Barinov /* MSIF */ 111*3b7f0e10SVladimir Barinov #define CONFIG_SMSTP2_ENA 0x00002000 112*3b7f0e10SVladimir Barinov /* INTC-SYS, IRQC */ 113*3b7f0e10SVladimir Barinov #define CONFIG_SMSTP4_ENA 0x00000180 114*3b7f0e10SVladimir Barinov /* SCIF2 */ 115*3b7f0e10SVladimir Barinov #define CONFIG_SMSTP7_ENA 0x00080000 116*3b7f0e10SVladimir Barinov 117*3b7f0e10SVladimir Barinov #endif /* __SILK_H */ 118