xref: /rk3399_rockchip-uboot/include/configs/shmin.h (revision 1f20fc53b382ece8da7440f354b219deb7ed19df)
1 /*
2  * Configuation settings for shmin (T-SH7706LAN, T-SH7706LSR)
3  *
4  * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __SHMIN_H
10 #define __SHMIN_H
11 
12 #define CONFIG_CPU_SH7706	1
13 /* T-SH7706LAN */
14 #define CONFIG_SHMIN		1
15 /* T-SH7706LSR*/
16 /* #define CONFIG_T_SH7706LSR	1 */
17 
18 /*
19  * This board has original boot loader. If you write u-boot to 0x0,
20  * you should set undef.
21  */
22 #undef  CONFIG_SHOW_BOOT_PROGRESS
23 #define CONFIG_DISPLAY_BOARDINFO
24 
25 /* system */
26 #define SHMIN_SDRAM_BASE		(0x8C000000)
27 #define SHMIN_FLASH_BASE_1		(0xA0000000)
28 
29 #define CONFIG_SYS_TEXT_BASE	0x8DFB0000
30 #define CONFIG_SYS_LONGHELP		/* undef to save memory	*/
31 #define CONFIG_SYS_PBSIZE	256	/* Buffer size for Console output */
32 /* Buffer size for Boot Arguments passed to kernel */
33 #define CONFIG_SYS_BARGSIZE	512
34 /* List of legal baudrate settings for this board */
35 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600,14400,19200,38400,57600,115200 }
36 
37 /* SCIF */
38 #define CONFIG_CONS_SCIF0	1
39 
40 /* memory */
41 #define CONFIG_SYS_SDRAM_BASE		SHMIN_SDRAM_BASE
42 #define CONFIG_SYS_SDRAM_SIZE		(32 * 1024 * 1024)
43 #define CONFIG_SYS_MEMTEST_START	SHMIN_SDRAM_BASE
44 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - (256 * 1024))
45 
46 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 1 * 1024 * 1024)
47 #define CONFIG_SYS_MONITOR_BASE		(SHMIN_FLASH_BASE_1 + CONFIG_ENV_SECT_SIZE)
48 #define CONFIG_SYS_MONITOR_LEN		(128 * 1024)
49 #define CONFIG_SYS_MALLOC_LEN		(256 * 1024)
50 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
51 
52 /* FLASH */
53 #define CONFIG_SYS_FLASH_CFI
54 #define CONFIG_FLASH_CFI_DRIVER
55 #undef  CONFIG_SYS_FLASH_QUIET_TEST
56 #define CONFIG_SYS_FLASH_EMPTY_INFO	/* print 'E' for empty sector on flinfo */
57 #define CONFIG_SYS_FLASH_BASE		SHMIN_FLASH_BASE_1
58 #define CONFIG_SYS_MAX_FLASH_SECT 11
59 #define CONFIG_SYS_MAX_FLASH_BANKS	1
60 
61 #define CONFIG_FLASH_CFI_LEGACY
62 #define CONFIG_SYS_ATMEL_BASE		CONFIG_SYS_FLASH_BASE
63 #define CONFIG_SYS_ATMEL_TOTALSECT	CONFIG_SYS_MAX_FLASH_SECT
64 #define CONFIG_SYS_ATMEL_REGION		4
65 #define CONFIG_SYS_ATMEL_SECT		{1, 2, 1, 7}
66 #define CONFIG_SYS_ATMEL_SECTSZ		{0x4000, 0x2000, 0x8000, 0x10000}
67 
68 #define CONFIG_ENV_SECT_SIZE	(64 * 1024)
69 #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
70 
71 #ifdef CONFIG_T_SH7706LSR
72 #define CONFIG_ENV_ADDR		(SHMIN_FLASH_BASE_1 + 70000)
73 #else
74 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
75 #endif
76 
77 #define CONFIG_SYS_FLASH_ERASE_TOUT	120000
78 #define CONFIG_SYS_FLASH_WRITE_TOUT	500
79 
80 /* Board Clock */
81 #ifdef CONFIG_T_SH7706LSR
82 #define CONFIG_SYS_CLK_FREQ 40000000
83 #else
84 #define CONFIG_SYS_CLK_FREQ 33333333
85 #endif /* CONFIG_T_SH7706LSR */
86 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
87 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
88 #define CONFIG_SYS_TMU_CLK_DIV	4
89 
90 /* Network device */
91 #define CONFIG_DRIVER_NE2000
92 #define CONFIG_DRIVER_NE2000_BASE   (0xb0000300)
93 
94 #endif	/* __SHMIN_H */
95