xref: /rk3399_rockchip-uboot/include/configs/shmin.h (revision 684a501e8e94115b591bfb3c8f047ccaada4ac26)
16b7c0f5eSNobuhiro Iwamatsu /*
2a972089aSNobuhiro Iwamatsu  * Configuation settings for shmin (T-SH7706LAN, T-SH7706LSR)
36b7c0f5eSNobuhiro Iwamatsu  *
4a972089aSNobuhiro Iwamatsu  * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
56b7c0f5eSNobuhiro Iwamatsu  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
76b7c0f5eSNobuhiro Iwamatsu  */
86b7c0f5eSNobuhiro Iwamatsu 
96b7c0f5eSNobuhiro Iwamatsu #ifndef __SHMIN_H
106b7c0f5eSNobuhiro Iwamatsu #define __SHMIN_H
116b7c0f5eSNobuhiro Iwamatsu 
126b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SH		1
136b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SH3		1
146b7c0f5eSNobuhiro Iwamatsu #define CONFIG_CPU_SH7706	1
15a972089aSNobuhiro Iwamatsu /* T-SH7706LAN */
166b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SHMIN		1
17a972089aSNobuhiro Iwamatsu /* T-SH7706LSR*/
18a972089aSNobuhiro Iwamatsu /* #define CONFIG_T_SH7706LSR	1 */
196b7c0f5eSNobuhiro Iwamatsu 
206b7c0f5eSNobuhiro Iwamatsu #define CONFIG_CMD_FLASH
216b7c0f5eSNobuhiro Iwamatsu #define CONFIG_CMD_MEMORY
226b7c0f5eSNobuhiro Iwamatsu #define CONFIG_CMD_SDRAM
236b7c0f5eSNobuhiro Iwamatsu #define CONFIG_CMD_NET
246b7c0f5eSNobuhiro Iwamatsu #define CONFIG_CMD_PING
256b7c0f5eSNobuhiro Iwamatsu #define CONFIG_CMD_NFS
266b7c0f5eSNobuhiro Iwamatsu #define CONFIG_CMD_ENV
276b7c0f5eSNobuhiro Iwamatsu #define CONFIG_CMD_SAVEENV
286b7c0f5eSNobuhiro Iwamatsu 
296b7c0f5eSNobuhiro Iwamatsu #define CONFIG_BAUDRATE		115200
306b7c0f5eSNobuhiro Iwamatsu #define CONFIG_BOOTARGS		"console=ttySC0,115200"
316b7c0f5eSNobuhiro Iwamatsu 
326b7c0f5eSNobuhiro Iwamatsu /*
336b7c0f5eSNobuhiro Iwamatsu  * This board has original boot loader. If you write u-boot to 0x0,
346b7c0f5eSNobuhiro Iwamatsu  * you should set undef.
356b7c0f5eSNobuhiro Iwamatsu  */
366b7c0f5eSNobuhiro Iwamatsu #define CONFIG_VERSION_VARIABLE
376b7c0f5eSNobuhiro Iwamatsu #undef  CONFIG_SHOW_BOOT_PROGRESS
386b7c0f5eSNobuhiro Iwamatsu 
396b7c0f5eSNobuhiro Iwamatsu /* system */
406b7c0f5eSNobuhiro Iwamatsu #define SHMIN_SDRAM_BASE		(0x8C000000)
416b7c0f5eSNobuhiro Iwamatsu #define SHMIN_FLASH_BASE_1		(0xA0000000)
426b7c0f5eSNobuhiro Iwamatsu 
43a8d954baSNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE	0x8DFB0000
446b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_LONGHELP		/* undef to save memory	*/
456b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_PROMPT	"=> "	/* Monitor Command Prompt */
466b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_CBSIZE	256	/* Buffer size for input from the Console */
476b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_PBSIZE	256	/* Buffer size for Console output */
486b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MAXARGS	16	/* max args accepted for monitor commands */
496b7c0f5eSNobuhiro Iwamatsu /* Buffer size for Boot Arguments passed to kernel */
506b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_BARGSIZE	512
516b7c0f5eSNobuhiro Iwamatsu /* List of legal baudrate settings for this board */
52a972089aSNobuhiro Iwamatsu #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600,14400,19200,38400,57600,115200 }
536b7c0f5eSNobuhiro Iwamatsu 
546b7c0f5eSNobuhiro Iwamatsu /* SCIF */
556b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SCIF_CONSOLE	1
566b7c0f5eSNobuhiro Iwamatsu #define CONFIG_CONS_SCIF0	1
576b7c0f5eSNobuhiro Iwamatsu 
586b7c0f5eSNobuhiro Iwamatsu /* memory */
596b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_SDRAM_BASE		SHMIN_SDRAM_BASE
606b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_SDRAM_SIZE		(32 * 1024 * 1024)
616b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MEMTEST_START	SHMIN_SDRAM_BASE
626b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - (256 * 1024))
636b7c0f5eSNobuhiro Iwamatsu 
646b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 1 * 1024 * 1024)
656b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MONITOR_BASE		(SHMIN_FLASH_BASE_1 + CONFIG_ENV_SECT_SIZE)
666b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MONITOR_LEN		(128 * 1024)
676b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MALLOC_LEN		(256 * 1024)
686b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_GBL_DATA_SIZE	256
696b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
706b7c0f5eSNobuhiro Iwamatsu 
716b7c0f5eSNobuhiro Iwamatsu /* FLASH */
726b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_CFI
736b7c0f5eSNobuhiro Iwamatsu #define CONFIG_FLASH_CFI_DRIVER
746b7c0f5eSNobuhiro Iwamatsu #undef  CONFIG_SYS_FLASH_QUIET_TEST
756b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_EMPTY_INFO	/* print 'E' for empty sector on flinfo */
766b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_BASE		SHMIN_FLASH_BASE_1
776b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MAX_FLASH_SECT 11
786b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MAX_FLASH_BANKS	1
796b7c0f5eSNobuhiro Iwamatsu 
806b7c0f5eSNobuhiro Iwamatsu #define CONFIG_FLASH_CFI_LEGACY
816b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_ATMEL_BASE		CONFIG_SYS_FLASH_BASE
826b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_ATMEL_TOTALSECT	CONFIG_SYS_MAX_FLASH_SECT
836b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_ATMEL_REGION		4
846b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_ATMEL_SECT		{1, 2, 1, 7}
856b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_ATMEL_SECTSZ		{0x4000, 0x2000, 0x8000, 0x10000}
866b7c0f5eSNobuhiro Iwamatsu 
876b7c0f5eSNobuhiro Iwamatsu #define CONFIG_ENV_IS_IN_FLASH
886b7c0f5eSNobuhiro Iwamatsu #define CONFIG_ENV_SECT_SIZE	(64 * 1024)
896b7c0f5eSNobuhiro Iwamatsu #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
90a972089aSNobuhiro Iwamatsu 
91a972089aSNobuhiro Iwamatsu #ifdef CONFIG_T_SH7706LSR
92a972089aSNobuhiro Iwamatsu #define CONFIG_ENV_ADDR		(SHMIN_FLASH_BASE_1 + 70000)
93a972089aSNobuhiro Iwamatsu #else
946b7c0f5eSNobuhiro Iwamatsu #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
95a972089aSNobuhiro Iwamatsu #endif
96a972089aSNobuhiro Iwamatsu 
976b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_ERASE_TOUT	120000
986b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_WRITE_TOUT	500
996b7c0f5eSNobuhiro Iwamatsu 
1006b7c0f5eSNobuhiro Iwamatsu /* Board Clock */
101a972089aSNobuhiro Iwamatsu #ifdef CONFIG_T_SH7706LSR
102a972089aSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ 40000000
103a972089aSNobuhiro Iwamatsu #else
1046b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ 33333333
105a972089aSNobuhiro Iwamatsu #endif /* CONFIG_T_SH7706LSR */
106*684a501eSNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
107*684a501eSNobuhiro Iwamatsu #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
1086b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_TMU_CLK_DIV	4
1096b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_HZ	1000
1106b7c0f5eSNobuhiro Iwamatsu 
1116b7c0f5eSNobuhiro Iwamatsu /* Network device */
1126b7c0f5eSNobuhiro Iwamatsu #define CONFIG_DRIVER_NE2000
1136b7c0f5eSNobuhiro Iwamatsu #define CONFIG_DRIVER_NE2000_BASE   (0xb0000300)
1146b7c0f5eSNobuhiro Iwamatsu 
1156b7c0f5eSNobuhiro Iwamatsu #endif	/* __SHMIN_H */
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