16b7c0f5eSNobuhiro Iwamatsu /* 2a972089aSNobuhiro Iwamatsu * Configuation settings for shmin (T-SH7706LAN, T-SH7706LSR) 36b7c0f5eSNobuhiro Iwamatsu * 4a972089aSNobuhiro Iwamatsu * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 56b7c0f5eSNobuhiro Iwamatsu * 61a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 76b7c0f5eSNobuhiro Iwamatsu */ 86b7c0f5eSNobuhiro Iwamatsu 96b7c0f5eSNobuhiro Iwamatsu #ifndef __SHMIN_H 106b7c0f5eSNobuhiro Iwamatsu #define __SHMIN_H 116b7c0f5eSNobuhiro Iwamatsu 126b7c0f5eSNobuhiro Iwamatsu #define CONFIG_CPU_SH7706 1 13a972089aSNobuhiro Iwamatsu /* T-SH7706LAN */ 146b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SHMIN 1 15a972089aSNobuhiro Iwamatsu /* T-SH7706LSR*/ 16a972089aSNobuhiro Iwamatsu /* #define CONFIG_T_SH7706LSR 1 */ 176b7c0f5eSNobuhiro Iwamatsu 186b7c0f5eSNobuhiro Iwamatsu /* 196b7c0f5eSNobuhiro Iwamatsu * This board has original boot loader. If you write u-boot to 0x0, 206b7c0f5eSNobuhiro Iwamatsu * you should set undef. 216b7c0f5eSNobuhiro Iwamatsu */ 226b7c0f5eSNobuhiro Iwamatsu #undef CONFIG_SHOW_BOOT_PROGRESS 23*18a40e84SVladimir Zapolskiy #define CONFIG_DISPLAY_BOARDINFO 246b7c0f5eSNobuhiro Iwamatsu 256b7c0f5eSNobuhiro Iwamatsu /* system */ 266b7c0f5eSNobuhiro Iwamatsu #define SHMIN_SDRAM_BASE (0x8C000000) 276b7c0f5eSNobuhiro Iwamatsu #define SHMIN_FLASH_BASE_1 (0xA0000000) 286b7c0f5eSNobuhiro Iwamatsu 29a8d954baSNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE 0x8DFB0000 306b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_LONGHELP /* undef to save memory */ 316b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 326b7c0f5eSNobuhiro Iwamatsu /* List of legal baudrate settings for this board */ 33a972089aSNobuhiro Iwamatsu #define CONFIG_SYS_BAUDRATE_TABLE { 9600,14400,19200,38400,57600,115200 } 346b7c0f5eSNobuhiro Iwamatsu 356b7c0f5eSNobuhiro Iwamatsu /* SCIF */ 366b7c0f5eSNobuhiro Iwamatsu #define CONFIG_CONS_SCIF0 1 376b7c0f5eSNobuhiro Iwamatsu 386b7c0f5eSNobuhiro Iwamatsu /* memory */ 396b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_SDRAM_BASE SHMIN_SDRAM_BASE 406b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) 416b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MEMTEST_START SHMIN_SDRAM_BASE 426b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - (256 * 1024)) 436b7c0f5eSNobuhiro Iwamatsu 446b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1 * 1024 * 1024) 456b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MONITOR_BASE (SHMIN_FLASH_BASE_1 + CONFIG_ENV_SECT_SIZE) 466b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 476b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 486b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 496b7c0f5eSNobuhiro Iwamatsu 506b7c0f5eSNobuhiro Iwamatsu /* FLASH */ 516b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_CFI 526b7c0f5eSNobuhiro Iwamatsu #define CONFIG_FLASH_CFI_DRIVER 536b7c0f5eSNobuhiro Iwamatsu #undef CONFIG_SYS_FLASH_QUIET_TEST 546b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 556b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_BASE SHMIN_FLASH_BASE_1 566b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MAX_FLASH_SECT 11 576b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_MAX_FLASH_BANKS 1 586b7c0f5eSNobuhiro Iwamatsu 596b7c0f5eSNobuhiro Iwamatsu #define CONFIG_FLASH_CFI_LEGACY 606b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_ATMEL_BASE CONFIG_SYS_FLASH_BASE 616b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_ATMEL_TOTALSECT CONFIG_SYS_MAX_FLASH_SECT 626b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_ATMEL_REGION 4 636b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_ATMEL_SECT {1, 2, 1, 7} 646b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_ATMEL_SECTSZ {0x4000, 0x2000, 0x8000, 0x10000} 656b7c0f5eSNobuhiro Iwamatsu 666b7c0f5eSNobuhiro Iwamatsu #define CONFIG_ENV_SECT_SIZE (64 * 1024) 676b7c0f5eSNobuhiro Iwamatsu #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 68a972089aSNobuhiro Iwamatsu 69a972089aSNobuhiro Iwamatsu #ifdef CONFIG_T_SH7706LSR 70a972089aSNobuhiro Iwamatsu #define CONFIG_ENV_ADDR (SHMIN_FLASH_BASE_1 + 70000) 71a972089aSNobuhiro Iwamatsu #else 726b7c0f5eSNobuhiro Iwamatsu #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 73a972089aSNobuhiro Iwamatsu #endif 74a972089aSNobuhiro Iwamatsu 756b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 766b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_FLASH_WRITE_TOUT 500 776b7c0f5eSNobuhiro Iwamatsu 786b7c0f5eSNobuhiro Iwamatsu /* Board Clock */ 79a972089aSNobuhiro Iwamatsu #ifdef CONFIG_T_SH7706LSR 80a972089aSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ 40000000 81a972089aSNobuhiro Iwamatsu #else 826b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ 33333333 83a972089aSNobuhiro Iwamatsu #endif /* CONFIG_T_SH7706LSR */ 84684a501eSNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 85684a501eSNobuhiro Iwamatsu #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 866b7c0f5eSNobuhiro Iwamatsu #define CONFIG_SYS_TMU_CLK_DIV 4 876b7c0f5eSNobuhiro Iwamatsu 886b7c0f5eSNobuhiro Iwamatsu /* Network device */ 896b7c0f5eSNobuhiro Iwamatsu #define CONFIG_DRIVER_NE2000 906b7c0f5eSNobuhiro Iwamatsu #define CONFIG_DRIVER_NE2000_BASE (0xb0000300) 916b7c0f5eSNobuhiro Iwamatsu 926b7c0f5eSNobuhiro Iwamatsu #endif /* __SHMIN_H */ 93