17faddaecSNobuhiro Iwamatsu /* 27faddaecSNobuhiro Iwamatsu * Configuation settings for the Renesas SH7763RDP board 37faddaecSNobuhiro Iwamatsu * 47faddaecSNobuhiro Iwamatsu * Copyright (C) 2008 Renesas Solutions Corp. 57faddaecSNobuhiro Iwamatsu * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 67faddaecSNobuhiro Iwamatsu * 77faddaecSNobuhiro Iwamatsu * See file CREDITS for list of people who contributed to this 87faddaecSNobuhiro Iwamatsu * project. 97faddaecSNobuhiro Iwamatsu * 107faddaecSNobuhiro Iwamatsu * This program is free software; you can redistribute it and/or 117faddaecSNobuhiro Iwamatsu * modify it under the terms of the GNU General Public License as 127faddaecSNobuhiro Iwamatsu * published by the Free Software Foundation; either version 2 of 137faddaecSNobuhiro Iwamatsu * the License, or (at your option) any later version. 147faddaecSNobuhiro Iwamatsu * 157faddaecSNobuhiro Iwamatsu * This program is distributed in the hope that it will be useful, 167faddaecSNobuhiro Iwamatsu * but WITHOUT ANY WARRANTY; without even the implied warranty of 177faddaecSNobuhiro Iwamatsu * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 187faddaecSNobuhiro Iwamatsu * GNU General Public License for more details. 197faddaecSNobuhiro Iwamatsu * 207faddaecSNobuhiro Iwamatsu * You should have received a copy of the GNU General Public License 217faddaecSNobuhiro Iwamatsu * along with this program; if not, write to the Free Software 227faddaecSNobuhiro Iwamatsu * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 237faddaecSNobuhiro Iwamatsu * MA 02111-1307 USA 247faddaecSNobuhiro Iwamatsu */ 257faddaecSNobuhiro Iwamatsu 267faddaecSNobuhiro Iwamatsu #ifndef __SH7763RDP_H 277faddaecSNobuhiro Iwamatsu #define __SH7763RDP_H 287faddaecSNobuhiro Iwamatsu 297faddaecSNobuhiro Iwamatsu #define CONFIG_SH 1 307faddaecSNobuhiro Iwamatsu #define CONFIG_SH4 1 317faddaecSNobuhiro Iwamatsu #define CONFIG_CPU_SH7763 1 327faddaecSNobuhiro Iwamatsu #define CONFIG_SH7763RDP 1 337faddaecSNobuhiro Iwamatsu #define __LITTLE_ENDIAN 1 347faddaecSNobuhiro Iwamatsu 357faddaecSNobuhiro Iwamatsu /* 367faddaecSNobuhiro Iwamatsu * Command line configuration. 377faddaecSNobuhiro Iwamatsu */ 387faddaecSNobuhiro Iwamatsu #define CONFIG_CMD_SDRAM 397faddaecSNobuhiro Iwamatsu #define CONFIG_CMD_FLASH 407faddaecSNobuhiro Iwamatsu #define CONFIG_CMD_MEMORY 41ba932445SNobuhiro Iwamatsu #define CONFIG_CMD_NET 42ba932445SNobuhiro Iwamatsu #define CONFIG_CMD_PING 43*bdab39d3SMike Frysinger #define CONFIG_CMD_SAVEENV 44ba932445SNobuhiro Iwamatsu #define CONFIG_CMD_NFS 45ba932445SNobuhiro Iwamatsu #define CONFIG_CMD_JFFS2 467faddaecSNobuhiro Iwamatsu 477faddaecSNobuhiro Iwamatsu #define CONFIG_BOOTDELAY -1 487faddaecSNobuhiro Iwamatsu #define CONFIG_BOOTARGS "console=ttySC2,115200 root=1f01" 497faddaecSNobuhiro Iwamatsu #define CONFIG_ENV_OVERWRITE 1 507faddaecSNobuhiro Iwamatsu 517faddaecSNobuhiro Iwamatsu #define CONFIG_VERSION_VARIABLE 527faddaecSNobuhiro Iwamatsu #undef CONFIG_SHOW_BOOT_PROGRESS 537faddaecSNobuhiro Iwamatsu 547faddaecSNobuhiro Iwamatsu /* SCIF */ 556c58a030SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SCIF_CONSOLE 1 567faddaecSNobuhiro Iwamatsu #define CONFIG_BAUDRATE 115200 577faddaecSNobuhiro Iwamatsu #define CONFIG_CONS_SCIF2 1 587faddaecSNobuhiro Iwamatsu 596d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LONGHELP /* undef to save memory */ 606d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 616d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ 626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 636d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ 646d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments 657faddaecSNobuhiro Iwamatsu passed to kernel */ 666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate 677faddaecSNobuhiro Iwamatsu settings for this board */ 687faddaecSNobuhiro Iwamatsu 697faddaecSNobuhiro Iwamatsu /* SDRAM */ 706d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_BASE (0x8C000000) 716d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 726d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 736d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 747faddaecSNobuhiro Iwamatsu 757faddaecSNobuhiro Iwamatsu /* Flash(NOR) */ 766d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_BASE (0xA0000000) 776d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) 786d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_BANKS (1) 796d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_FLASH_SECT (520) 807faddaecSNobuhiro Iwamatsu 817faddaecSNobuhiro Iwamatsu /* U-boot setting */ 826d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) 836d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 846d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 857faddaecSNobuhiro Iwamatsu /* Size of DRAM reserved for malloc() use */ 866d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) 877faddaecSNobuhiro Iwamatsu /* size in bytes reserved for initial data */ 886d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_GBL_DATA_SIZE (256) 896d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 907faddaecSNobuhiro Iwamatsu 916d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_CFI 9200b1883aSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_FLASH_CFI_DRIVER 936d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_FLASH_QUIET_TEST 946d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 957faddaecSNobuhiro Iwamatsu /* Timeout for Flash erase operations (in ms) */ 966d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 977faddaecSNobuhiro Iwamatsu /* Timeout for Flash write operations (in ms) */ 986d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 997faddaecSNobuhiro Iwamatsu /* Timeout for Flash set sector lock bit operations (in ms) */ 1006d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 1017faddaecSNobuhiro Iwamatsu /* Timeout for Flash clear lock bit operations (in ms) */ 1026d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 1037faddaecSNobuhiro Iwamatsu /* Use hardware flash sectors protection instead of U-Boot software protection */ 1046d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_FLASH_PROTECTION 1056d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #undef CONFIG_SYS_DIRECT_FLASH_TFTP 1065a1aceb0SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_IS_IN_FLASH 1070e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SECT_SIZE (128 * 1024) 1080e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 1096d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE)) 1106d0f6bcfSJean-Christophe PLAGNIOL-VILLARD /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 1116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 1120e8d1586SJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 1136d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 1147faddaecSNobuhiro Iwamatsu 1157faddaecSNobuhiro Iwamatsu /* Clock */ 1167faddaecSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ 66666666 1177faddaecSNobuhiro Iwamatsu #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ 1186d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) 1197faddaecSNobuhiro Iwamatsu 120ba932445SNobuhiro Iwamatsu /* Ether */ 12171a040f4SNobuhiro Iwamatsu #define CONFIG_NET_MULTI 1 122ba932445SNobuhiro Iwamatsu #define CONFIG_SH_ETHER 1 123ba932445SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT (1) 124ba932445SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR (0x01) 125ba932445SNobuhiro Iwamatsu 1267faddaecSNobuhiro Iwamatsu #endif /* __SH7763RDP_H */ 127