1*7faddaecSNobuhiro Iwamatsu /* 2*7faddaecSNobuhiro Iwamatsu * Configuation settings for the Renesas SH7763RDP board 3*7faddaecSNobuhiro Iwamatsu * 4*7faddaecSNobuhiro Iwamatsu * Copyright (C) 2008 Renesas Solutions Corp. 5*7faddaecSNobuhiro Iwamatsu * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 6*7faddaecSNobuhiro Iwamatsu * 7*7faddaecSNobuhiro Iwamatsu * See file CREDITS for list of people who contributed to this 8*7faddaecSNobuhiro Iwamatsu * project. 9*7faddaecSNobuhiro Iwamatsu * 10*7faddaecSNobuhiro Iwamatsu * This program is free software; you can redistribute it and/or 11*7faddaecSNobuhiro Iwamatsu * modify it under the terms of the GNU General Public License as 12*7faddaecSNobuhiro Iwamatsu * published by the Free Software Foundation; either version 2 of 13*7faddaecSNobuhiro Iwamatsu * the License, or (at your option) any later version. 14*7faddaecSNobuhiro Iwamatsu * 15*7faddaecSNobuhiro Iwamatsu * This program is distributed in the hope that it will be useful, 16*7faddaecSNobuhiro Iwamatsu * but WITHOUT ANY WARRANTY; without even the implied warranty of 17*7faddaecSNobuhiro Iwamatsu * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18*7faddaecSNobuhiro Iwamatsu * GNU General Public License for more details. 19*7faddaecSNobuhiro Iwamatsu * 20*7faddaecSNobuhiro Iwamatsu * You should have received a copy of the GNU General Public License 21*7faddaecSNobuhiro Iwamatsu * along with this program; if not, write to the Free Software 22*7faddaecSNobuhiro Iwamatsu * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23*7faddaecSNobuhiro Iwamatsu * MA 02111-1307 USA 24*7faddaecSNobuhiro Iwamatsu */ 25*7faddaecSNobuhiro Iwamatsu 26*7faddaecSNobuhiro Iwamatsu #ifndef __SH7763RDP_H 27*7faddaecSNobuhiro Iwamatsu #define __SH7763RDP_H 28*7faddaecSNobuhiro Iwamatsu 29*7faddaecSNobuhiro Iwamatsu #define CONFIG_SH 1 30*7faddaecSNobuhiro Iwamatsu #define CONFIG_SH4 1 31*7faddaecSNobuhiro Iwamatsu #define CONFIG_CPU_SH7763 1 32*7faddaecSNobuhiro Iwamatsu #define CONFIG_SH7763RDP 1 33*7faddaecSNobuhiro Iwamatsu #define __LITTLE_ENDIAN 1 34*7faddaecSNobuhiro Iwamatsu 35*7faddaecSNobuhiro Iwamatsu /* 36*7faddaecSNobuhiro Iwamatsu * Command line configuration. 37*7faddaecSNobuhiro Iwamatsu */ 38*7faddaecSNobuhiro Iwamatsu #define CONFIG_CMD_SDRAM 39*7faddaecSNobuhiro Iwamatsu #define CONFIG_CMD_FLASH 40*7faddaecSNobuhiro Iwamatsu #define CONFIG_CMD_MEMORY 41*7faddaecSNobuhiro Iwamatsu #define CONFIG_CMD_NET 42*7faddaecSNobuhiro Iwamatsu #define CONFIG_CMD_PING 43*7faddaecSNobuhiro Iwamatsu #define CONFIG_CMD_ENV 44*7faddaecSNobuhiro Iwamatsu #define CONFIG_CMD_NFS 45*7faddaecSNobuhiro Iwamatsu #define CONFIG_CMD_JFFS2 46*7faddaecSNobuhiro Iwamatsu 47*7faddaecSNobuhiro Iwamatsu #define CONFIG_BOOTDELAY -1 48*7faddaecSNobuhiro Iwamatsu #define CONFIG_BOOTARGS "console=ttySC2,115200 root=1f01" 49*7faddaecSNobuhiro Iwamatsu #define CONFIG_ENV_OVERWRITE 1 50*7faddaecSNobuhiro Iwamatsu 51*7faddaecSNobuhiro Iwamatsu #define CONFIG_VERSION_VARIABLE 52*7faddaecSNobuhiro Iwamatsu #undef CONFIG_SHOW_BOOT_PROGRESS 53*7faddaecSNobuhiro Iwamatsu 54*7faddaecSNobuhiro Iwamatsu /* SCIF */ 55*7faddaecSNobuhiro Iwamatsu #define CFG_SCIF_CONSOLE 1 56*7faddaecSNobuhiro Iwamatsu #define CONFIG_BAUDRATE 115200 57*7faddaecSNobuhiro Iwamatsu #define CONFIG_CONS_SCIF2 1 58*7faddaecSNobuhiro Iwamatsu 59*7faddaecSNobuhiro Iwamatsu #define CFG_LONGHELP /* undef to save memory */ 60*7faddaecSNobuhiro Iwamatsu #define CFG_PROMPT "=> " /* Monitor Command Prompt */ 61*7faddaecSNobuhiro Iwamatsu #define CFG_CBSIZE 256 /* Buffer size for input from the Console */ 62*7faddaecSNobuhiro Iwamatsu #define CFG_PBSIZE 256 /* Buffer size for Console output */ 63*7faddaecSNobuhiro Iwamatsu #define CFG_MAXARGS 16 /* max args accepted for monitor commands */ 64*7faddaecSNobuhiro Iwamatsu #define CFG_BARGSIZE 512 /* Buffer size for Boot Arguments 65*7faddaecSNobuhiro Iwamatsu passed to kernel */ 66*7faddaecSNobuhiro Iwamatsu #define CFG_BAUDRATE_TABLE { 115200 } /* List of legal baudrate 67*7faddaecSNobuhiro Iwamatsu settings for this board */ 68*7faddaecSNobuhiro Iwamatsu 69*7faddaecSNobuhiro Iwamatsu /* Ethernet */ 70*7faddaecSNobuhiro Iwamatsu #define CONFIG_SH_ETHER 1 71*7faddaecSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT (1) 72*7faddaecSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR (0x01) 73*7faddaecSNobuhiro Iwamatsu #define CFG_RX_ETH_BUFFER (8) 74*7faddaecSNobuhiro Iwamatsu 75*7faddaecSNobuhiro Iwamatsu /* SDRAM */ 76*7faddaecSNobuhiro Iwamatsu #define CFG_SDRAM_BASE (0x8C000000) 77*7faddaecSNobuhiro Iwamatsu #define CFG_SDRAM_SIZE (64 * 1024 * 1024) 78*7faddaecSNobuhiro Iwamatsu #define CFG_MEMTEST_START (CFG_SDRAM_BASE) 79*7faddaecSNobuhiro Iwamatsu #define CFG_MEMTEST_END (CFG_MEMTEST_START + (60 * 1024 * 1024)) 80*7faddaecSNobuhiro Iwamatsu 81*7faddaecSNobuhiro Iwamatsu /* Flash(NOR) */ 82*7faddaecSNobuhiro Iwamatsu #define CFG_FLASH_BASE (0xA0000000) 83*7faddaecSNobuhiro Iwamatsu #define CFG_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) 84*7faddaecSNobuhiro Iwamatsu #define CFG_MAX_FLASH_BANKS (1) 85*7faddaecSNobuhiro Iwamatsu #define CFG_MAX_FLASH_SECT (520) 86*7faddaecSNobuhiro Iwamatsu 87*7faddaecSNobuhiro Iwamatsu /* U-boot setting */ 88*7faddaecSNobuhiro Iwamatsu #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 4 * 1024 * 1024) 89*7faddaecSNobuhiro Iwamatsu #define CFG_MONITOR_BASE (CFG_FLASH_BASE) 90*7faddaecSNobuhiro Iwamatsu #define CFG_MONITOR_LEN (128 * 1024) 91*7faddaecSNobuhiro Iwamatsu /* Size of DRAM reserved for malloc() use */ 92*7faddaecSNobuhiro Iwamatsu #define CFG_MALLOC_LEN (1024 * 1024) 93*7faddaecSNobuhiro Iwamatsu /* size in bytes reserved for initial data */ 94*7faddaecSNobuhiro Iwamatsu #define CFG_GBL_DATA_SIZE (256) 95*7faddaecSNobuhiro Iwamatsu #define CFG_BOOTMAPSZ (8 * 1024 * 1024) 96*7faddaecSNobuhiro Iwamatsu 97*7faddaecSNobuhiro Iwamatsu #define CFG_FLASH_CFI 98*7faddaecSNobuhiro Iwamatsu #define CFG_FLASH_CFI_DRIVER 99*7faddaecSNobuhiro Iwamatsu #undef CFG_FLASH_QUIET_TEST 100*7faddaecSNobuhiro Iwamatsu #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 101*7faddaecSNobuhiro Iwamatsu /* Timeout for Flash erase operations (in ms) */ 102*7faddaecSNobuhiro Iwamatsu #define CFG_FLASH_ERASE_TOUT (3 * 1000) 103*7faddaecSNobuhiro Iwamatsu /* Timeout for Flash write operations (in ms) */ 104*7faddaecSNobuhiro Iwamatsu #define CFG_FLASH_WRITE_TOUT (3 * 1000) 105*7faddaecSNobuhiro Iwamatsu /* Timeout for Flash set sector lock bit operations (in ms) */ 106*7faddaecSNobuhiro Iwamatsu #define CFG_FLASH_LOCK_TOUT (3 * 1000) 107*7faddaecSNobuhiro Iwamatsu /* Timeout for Flash clear lock bit operations (in ms) */ 108*7faddaecSNobuhiro Iwamatsu #define CFG_FLASH_UNLOCK_TOUT (3 * 1000) 109*7faddaecSNobuhiro Iwamatsu /* Use hardware flash sectors protection instead of U-Boot software protection */ 110*7faddaecSNobuhiro Iwamatsu #undef CFG_FLASH_PROTECTION 111*7faddaecSNobuhiro Iwamatsu #undef CFG_DIRECT_FLASH_TFTP 112*7faddaecSNobuhiro Iwamatsu #define CFG_ENV_IS_IN_FLASH 113*7faddaecSNobuhiro Iwamatsu #define CFG_ENV_SECT_SIZE (128 * 1024) 114*7faddaecSNobuhiro Iwamatsu #define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE) 115*7faddaecSNobuhiro Iwamatsu #define CFG_ENV_ADDR (CFG_FLASH_BASE + (1 * CFG_ENV_SECT_SIZE)) 116*7faddaecSNobuhiro Iwamatsu /* Offset of env Flash sector relative to CFG_FLASH_BASE */ 117*7faddaecSNobuhiro Iwamatsu #define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE) 118*7faddaecSNobuhiro Iwamatsu #define CFG_ENV_SIZE_REDUND (CFG_ENV_SECT_SIZE) 119*7faddaecSNobuhiro Iwamatsu #define CFG_ENV_ADDR_REDUND (CFG_FLASH_BASE + (2 * CFG_ENV_SECT_SIZE)) 120*7faddaecSNobuhiro Iwamatsu 121*7faddaecSNobuhiro Iwamatsu /* Clock */ 122*7faddaecSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ 66666666 123*7faddaecSNobuhiro Iwamatsu #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ 124*7faddaecSNobuhiro Iwamatsu #define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) 125*7faddaecSNobuhiro Iwamatsu 126*7faddaecSNobuhiro Iwamatsu #endif /* __SH7763RDP_H */ 127