1 /* 2 * Configuation settings for the sh7757lcr board 3 * 4 * Copyright (C) 2011 Renesas Solutions Corp. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __SH7757LCR_H 10 #define __SH7757LCR_H 11 12 #undef DEBUG 13 #define CONFIG_SH4A 1 14 #define CONFIG_SH_32BIT 1 15 #define CONFIG_CPU_SH7757 1 16 #define CONFIG_SH7757LCR 1 17 #define CONFIG_SH7757LCR_DDR_ECC 1 18 19 #define CONFIG_SYS_TEXT_BASE 0x8ef80000 20 #define CONFIG_SYS_LDSCRIPT "board/renesas/sh7757lcr/u-boot.lds" 21 22 #define CONFIG_CMD_MEMORY 23 #define CONFIG_CMD_NET 24 #define CONFIG_CMD_MII 25 #define CONFIG_CMD_PING 26 #define CONFIG_CMD_NFS 27 #define CONFIG_CMD_SDRAM 28 #define CONFIG_CMD_SF 29 #define CONFIG_CMD_RUN 30 #define CONFIG_CMD_SAVEENV 31 #define CONFIG_CMD_MD5SUM 32 #define CONFIG_MD5 33 #define CONFIG_CMD_LOADS 34 #define CONFIG_CMD_MMC 35 #define CONFIG_CMD_EXT2 36 #define CONFIG_DOS_PARTITION 37 #define CONFIG_MAC_PARTITION 38 39 #define CONFIG_BAUDRATE 115200 40 #define CONFIG_BOOTDELAY 3 41 #define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp" 42 43 #define CONFIG_VERSION_VARIABLE 44 #undef CONFIG_SHOW_BOOT_PROGRESS 45 46 /* MEMORY */ 47 #define SH7757LCR_SDRAM_BASE (0x80000000) 48 #define SH7757LCR_SDRAM_SIZE (240 * 1024 * 1024) 49 #define SH7757LCR_SDRAM_ECC_SETTING 0x0f000000 /* 240MByte */ 50 #define SH7757LCR_SDRAM_DVC_SIZE (16 * 1024 * 1024) 51 52 #define CONFIG_SYS_LONGHELP 53 #define CONFIG_SYS_CBSIZE 256 54 #define CONFIG_SYS_PBSIZE 256 55 #define CONFIG_SYS_MAXARGS 16 56 #define CONFIG_SYS_BARGSIZE 512 57 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 58 59 /* SCIF */ 60 #define CONFIG_SCIF_CONSOLE 1 61 #define CONFIG_CONS_SCIF2 1 62 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 63 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 64 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 65 66 #define CONFIG_SYS_MEMTEST_START (SH7757LCR_SDRAM_BASE) 67 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 68 224 * 1024 * 1024) 69 #undef CONFIG_SYS_ALT_MEMTEST 70 #undef CONFIG_SYS_MEMTEST_SCRATCH 71 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 72 73 #define CONFIG_SYS_SDRAM_BASE (SH7757LCR_SDRAM_BASE) 74 #define CONFIG_SYS_SDRAM_SIZE (SH7757LCR_SDRAM_SIZE) 75 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ 76 (128 + 16) * 1024 * 1024) 77 78 #define CONFIG_SYS_MONITOR_BASE 0x00000000 79 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 80 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 81 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 82 83 /* FLASH */ 84 #define CONFIG_SYS_NO_FLASH 85 86 /* Ether */ 87 #define CONFIG_SH_ETHER 1 88 #define CONFIG_SH_ETHER_USE_PORT 0 89 #define CONFIG_SH_ETHER_PHY_ADDR 1 90 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 91 #define CONFIG_PHYLIB 92 #define CONFIG_BITBANGMII 93 #define CONFIG_BITBANGMII_MULTI 94 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 95 96 #define SH7757LCR_ETHERNET_MAC_BASE_SPI 0x000b0000 97 #define SH7757LCR_SPI_SECTOR_SIZE (64 * 1024) 98 #define SH7757LCR_ETHERNET_MAC_BASE SH7757LCR_ETHERNET_MAC_BASE_SPI 99 #define SH7757LCR_ETHERNET_MAC_SIZE 17 100 #define SH7757LCR_ETHERNET_NUM_CH 2 101 #define CONFIG_BOARD_LATE_INIT 102 103 /* Gigabit Ether */ 104 #define SH7757LCR_GIGA_ETHERNET_NUM_CH 2 105 106 /* SPI */ 107 #define CONFIG_SH_SPI 1 108 #define CONFIG_SH_SPI_BASE 0xfe002000 109 #define CONFIG_SPI_FLASH 110 #define CONFIG_SPI_FLASH_STMICRO 1 111 112 /* MMCIF */ 113 #define CONFIG_MMC 1 114 #define CONFIG_GENERIC_MMC 1 115 #define CONFIG_SH_MMCIF 1 116 #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 117 #define CONFIG_SH_MMCIF_CLK 48000000 118 119 /* SH7757 board */ 120 #define SH7757LCR_SDRAM_PHYS_TOP 0x40000000 121 #define SH7757LCR_GRA_OFFSET 0x1f000000 122 #define SH7757LCR_PCIEBRG_ADDR_B0 0x000a0000 123 #define SH7757LCR_PCIEBRG_SIZE_B0 (64 * 1024) 124 #define SH7757LCR_PCIEBRG_ADDR 0x00090000 125 #define SH7757LCR_PCIEBRG_SIZE (96 * 1024) 126 127 /* ENV setting */ 128 #define CONFIG_ENV_IS_EMBEDDED 129 #define CONFIG_ENV_IS_IN_SPI_FLASH 130 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 131 #define CONFIG_ENV_ADDR (0x00080000) 132 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 133 #define CONFIG_ENV_OVERWRITE 1 134 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 135 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 136 #define CONFIG_EXTRA_ENV_SETTINGS \ 137 "netboot=bootp; bootm\0" 138 139 /* Board Clock */ 140 #define CONFIG_SYS_CLK_FREQ 48000000 141 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 142 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 143 #define CONFIG_SYS_TMU_CLK_DIV 4 144 #endif /* __SH7757LCR_H */ 145