xref: /rk3399_rockchip-uboot/include/configs/sh7752evb.h (revision 78d1e1d0a157c8b48ea19be6170b992745d30f38)
1 /*
2  * Configuation settings for the sh7752evb board
3  *
4  * Copyright (C) 2012 Renesas Solutions Corp.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __SH7752EVB_H
10 #define __SH7752EVB_H
11 
12 #undef DEBUG
13 #define CONFIG_CPU_SH7752	1
14 #define CONFIG_SH7752EVB	1
15 
16 #define CONFIG_SYS_TEXT_BASE	0x5ff80000
17 #define CONFIG_SYS_LDSCRIPT	"board/renesas/sh7752evb/u-boot.lds"
18 
19 #define CONFIG_CMD_MII
20 #define CONFIG_CMD_DFL
21 #define CONFIG_CMD_SDRAM
22 #define CONFIG_CMD_MD5SUM
23 #define CONFIG_MD5
24 #define CONFIG_CMD_MMC
25 #define CONFIG_CMD_EXT2
26 #define CONFIG_DOS_PARTITION
27 #define CONFIG_MAC_PARTITION
28 
29 #define CONFIG_BAUDRATE		115200
30 #define CONFIG_BOOTDELAY	3
31 #define CONFIG_BOOTARGS		"console=ttySC2,115200 root=/dev/nfs ip=dhcp"
32 
33 #define CONFIG_VERSION_VARIABLE
34 #undef	CONFIG_SHOW_BOOT_PROGRESS
35 #define CONFIG_CMDLINE_EDITING
36 #define CONFIG_AUTO_COMPLETE
37 
38 /* MEMORY */
39 #define SH7752EVB_SDRAM_BASE		(0x40000000)
40 #define SH7752EVB_SDRAM_SIZE		(512 * 1024 * 1024)
41 
42 #define CONFIG_SYS_LONGHELP
43 #define CONFIG_SYS_CBSIZE		256
44 #define CONFIG_SYS_PBSIZE		256
45 #define CONFIG_SYS_MAXARGS		16
46 #define CONFIG_SYS_BARGSIZE		512
47 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
48 
49 /* SCIF */
50 #define CONFIG_SCIF_CONSOLE	1
51 #define CONFIG_CONS_SCIF2	1
52 #undef	CONFIG_SYS_CONSOLE_INFO_QUIET
53 #undef	CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
54 #undef	CONFIG_SYS_CONSOLE_ENV_OVERWRITE
55 
56 #define CONFIG_SYS_MEMTEST_START	(SH7752EVB_SDRAM_BASE)
57 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
58 					 480 * 1024 * 1024)
59 #undef	CONFIG_SYS_ALT_MEMTEST
60 #undef	CONFIG_SYS_MEMTEST_SCRATCH
61 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
62 
63 #define CONFIG_SYS_SDRAM_BASE		(SH7752EVB_SDRAM_BASE)
64 #define CONFIG_SYS_SDRAM_SIZE		(SH7752EVB_SDRAM_SIZE)
65 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + \
66 					 128 * 1024 * 1024)
67 
68 #define CONFIG_SYS_MONITOR_BASE		0x00000000
69 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
70 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
71 #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
72 
73 /* FLASH */
74 #define CONFIG_SYS_NO_FLASH
75 
76 /* Ether */
77 #define CONFIG_SH_ETHER			1
78 #define CONFIG_SH_ETHER_USE_PORT	0
79 #define CONFIG_SH_ETHER_PHY_ADDR	18
80 #define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
81 #define CONFIG_SH_ETHER_USE_GETHER	1
82 #define CONFIG_PHYLIB
83 #define CONFIG_BITBANGMII
84 #define CONFIG_BITBANGMII_MULTI
85 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
86 #define CONFIG_PHY_VITESSE
87 
88 #define SH7752EVB_ETHERNET_MAC_BASE_SPI	0x00090000
89 #define SH7752EVB_SPI_SECTOR_SIZE	(64 * 1024)
90 #define SH7752EVB_ETHERNET_MAC_BASE	SH7752EVB_ETHERNET_MAC_BASE_SPI
91 #define SH7752EVB_ETHERNET_MAC_SIZE	17
92 #define SH7752EVB_ETHERNET_NUM_CH	2
93 #define CONFIG_BOARD_LATE_INIT
94 
95 /* SPI */
96 #define CONFIG_SH_SPI			1
97 #define CONFIG_SH_SPI_BASE		0xfe002000
98 
99 /* MMCIF */
100 #define CONFIG_MMC			1
101 #define CONFIG_GENERIC_MMC		1
102 #define CONFIG_SH_MMCIF			1
103 #define CONFIG_SH_MMCIF_ADDR		0xffcb0000
104 #define CONFIG_SH_MMCIF_CLK		48000000
105 
106 /* ENV setting */
107 #define CONFIG_ENV_IS_EMBEDDED
108 #define CONFIG_ENV_IS_IN_SPI_FLASH
109 #define CONFIG_ENV_SECT_SIZE	(64 * 1024)
110 #define CONFIG_ENV_ADDR		(0x00080000)
111 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
112 #define CONFIG_ENV_OVERWRITE	1
113 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
114 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
115 #define CONFIG_EXTRA_ENV_SETTINGS				\
116 		"netboot=bootp; bootm\0"
117 
118 /* Board Clock */
119 #define CONFIG_SYS_CLK_FREQ	48000000
120 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
121 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
122 #define CONFIG_SYS_TMU_CLK_DIV	4
123 #endif	/* __SH7752EVB_H */
124