xref: /rk3399_rockchip-uboot/include/configs/secomx6quq7.h (revision 058d23168752c2a2ec0a6c3b50296cb5b91ec6d0)
1*058d2316SBoris BREZILLON /*
2*058d2316SBoris BREZILLON  * Copyright (C) 2013 Seco S.r.l
3*058d2316SBoris BREZILLON  *
4*058d2316SBoris BREZILLON  * Configuration settings for the Seco Boards.
5*058d2316SBoris BREZILLON  *
6*058d2316SBoris BREZILLON  * SPDX-License-Identifier:	GPL-2.0+
7*058d2316SBoris BREZILLON  */
8*058d2316SBoris BREZILLON 
9*058d2316SBoris BREZILLON #ifndef __CONFIG_H
10*058d2316SBoris BREZILLON #define __CONFIG_H
11*058d2316SBoris BREZILLON 
12*058d2316SBoris BREZILLON #include "mx6_common.h"
13*058d2316SBoris BREZILLON #include <asm/arch/imx-regs.h>
14*058d2316SBoris BREZILLON #include <asm/imx-common/gpio.h>
15*058d2316SBoris BREZILLON #include <linux/sizes.h>
16*058d2316SBoris BREZILLON 
17*058d2316SBoris BREZILLON #define CONFIG_SYS_GENERIC_BOARD
18*058d2316SBoris BREZILLON #define CONFIG_DISPLAY_CPUINFO
19*058d2316SBoris BREZILLON #define CONFIG_DISPLAY_BOARDINFO
20*058d2316SBoris BREZILLON 
21*058d2316SBoris BREZILLON #define CONFIG_CMDLINE_TAG
22*058d2316SBoris BREZILLON #define CONFIG_SETUP_MEMORY_TAGS
23*058d2316SBoris BREZILLON #define CONFIG_INITRD_TAG
24*058d2316SBoris BREZILLON #define CONFIG_REVISION_TAG
25*058d2316SBoris BREZILLON #define CONFIG_BOARD_REVISION_TAG
26*058d2316SBoris BREZILLON 
27*058d2316SBoris BREZILLON /* Size of malloc() pool */
28*058d2316SBoris BREZILLON #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
29*058d2316SBoris BREZILLON 
30*058d2316SBoris BREZILLON #define CONFIG_BOARD_EARLY_INIT_F
31*058d2316SBoris BREZILLON #define CONFIG_MXC_GPIO
32*058d2316SBoris BREZILLON 
33*058d2316SBoris BREZILLON #define CONFIG_MXC_UART
34*058d2316SBoris BREZILLON #define CONFIG_MXC_UART_BASE		UART2_BASE
35*058d2316SBoris BREZILLON 
36*058d2316SBoris BREZILLON /* allow to overwrite serial and ethaddr */
37*058d2316SBoris BREZILLON #define CONFIG_ENV_OVERWRITE
38*058d2316SBoris BREZILLON #define CONFIG_CONS_INDEX		1
39*058d2316SBoris BREZILLON #define CONFIG_BAUDRATE			115200
40*058d2316SBoris BREZILLON 
41*058d2316SBoris BREZILLON /* Command definition */
42*058d2316SBoris BREZILLON #include <config_cmd_default.h>
43*058d2316SBoris BREZILLON 
44*058d2316SBoris BREZILLON #undef CONFIG_CMD_IMLS
45*058d2316SBoris BREZILLON 
46*058d2316SBoris BREZILLON #define CONFIG_CMD_BMODE
47*058d2316SBoris BREZILLON #define CONFIG_CMD_SETEXPR
48*058d2316SBoris BREZILLON 
49*058d2316SBoris BREZILLON #define CONFIG_BOOTDELAY		3
50*058d2316SBoris BREZILLON 
51*058d2316SBoris BREZILLON #define CONFIG_SYS_MEMTEST_START	0x10000000
52*058d2316SBoris BREZILLON #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
53*058d2316SBoris BREZILLON #define CONFIG_LOADADDR			0x12000000
54*058d2316SBoris BREZILLON #define CONFIG_SYS_TEXT_BASE		0x17800000
55*058d2316SBoris BREZILLON 
56*058d2316SBoris BREZILLON /* MMC Configuration */
57*058d2316SBoris BREZILLON #define CONFIG_FSL_ESDHC
58*058d2316SBoris BREZILLON #define CONFIG_FSL_USDHC
59*058d2316SBoris BREZILLON #define CONFIG_SYS_FSL_USDHC_NUM        2
60*058d2316SBoris BREZILLON #define CONFIG_SYS_FSL_ESDHC_ADDR	0
61*058d2316SBoris BREZILLON 
62*058d2316SBoris BREZILLON #define CONFIG_MMC
63*058d2316SBoris BREZILLON #define CONFIG_CMD_MMC
64*058d2316SBoris BREZILLON #define CONFIG_GENERIC_MMC
65*058d2316SBoris BREZILLON #define CONFIG_BOUNCE_BUFFER
66*058d2316SBoris BREZILLON #define CONFIG_CMD_EXT2
67*058d2316SBoris BREZILLON #define CONFIG_CMD_FAT
68*058d2316SBoris BREZILLON #define CONFIG_DOS_PARTITION
69*058d2316SBoris BREZILLON 
70*058d2316SBoris BREZILLON /* Ethernet Configuration */
71*058d2316SBoris BREZILLON #define CONFIG_CMD_PING
72*058d2316SBoris BREZILLON #define CONFIG_CMD_DHCP
73*058d2316SBoris BREZILLON #define CONFIG_CMD_MII
74*058d2316SBoris BREZILLON #define CONFIG_CMD_NET
75*058d2316SBoris BREZILLON #define CONFIG_FEC_MXC
76*058d2316SBoris BREZILLON #define CONFIG_MII
77*058d2316SBoris BREZILLON #define IMX_FEC_BASE			ENET_BASE_ADDR
78*058d2316SBoris BREZILLON #define CONFIG_FEC_XCV_TYPE		RGMII
79*058d2316SBoris BREZILLON #define CONFIG_ETHPRIME			"FEC"
80*058d2316SBoris BREZILLON #define CONFIG_FEC_MXC_PHYADDR		6
81*058d2316SBoris BREZILLON #define CONFIG_PHYLIB
82*058d2316SBoris BREZILLON #define CONFIG_PHY_MICREL
83*058d2316SBoris BREZILLON 
84*058d2316SBoris BREZILLON #define CONFIG_EXTRA_ENV_SETTINGS					\
85*058d2316SBoris BREZILLON 	"netdev=eth0\0"							\
86*058d2316SBoris BREZILLON 	"ethprime=FEC0\0"						\
87*058d2316SBoris BREZILLON 	"netdev=eth0\0"							\
88*058d2316SBoris BREZILLON 	"ethprime=FEC0\0"						\
89*058d2316SBoris BREZILLON 	"uboot=u-boot.bin\0"						\
90*058d2316SBoris BREZILLON 	"kernel=uImage\0"						\
91*058d2316SBoris BREZILLON 	"nfsroot=/opt/eldk/arm\0"					\
92*058d2316SBoris BREZILLON 	"ip_local=10.0.0.5::10.0.0.1:255.255.255.0::eth0:off\0"		\
93*058d2316SBoris BREZILLON 	"ip_server=10.0.0.1\0"						\
94*058d2316SBoris BREZILLON 	"nfs_path=/targetfs \0"						\
95*058d2316SBoris BREZILLON 	"memory=mem=1024M\0"						\
96*058d2316SBoris BREZILLON 	"bootdev=mmc dev 0; ext2load mmc 0:1\0"				\
97*058d2316SBoris BREZILLON 	"root=root=/dev/mmcblk0p1\0"					\
98*058d2316SBoris BREZILLON 	"option=rootwait rw fixrtc rootflags=barrier=1\0"		\
99*058d2316SBoris BREZILLON 	"cpu_freq=arm_freq=996\0"					\
100*058d2316SBoris BREZILLON 	"setbootargs=setenv bootargs console=ttymxc1,115200 ${root}"	\
101*058d2316SBoris BREZILLON 		" ${option} ${memory} ${cpu_freq}\0"			\
102*058d2316SBoris BREZILLON 	"setbootargs_nfs=setenv bootargs console=ttymxc1,115200"	\
103*058d2316SBoris BREZILLON 		" root=/dev/nfs  nfsroot=${ip_server}:${nfs_path}"	\
104*058d2316SBoris BREZILLON 		" nolock,wsize=4096,rsize=4096  ip=:::::eth0:dhcp"	\
105*058d2316SBoris BREZILLON 		" ${memory} ${cpu_freq}\0"				\
106*058d2316SBoris BREZILLON 	"setbootdev=setenv boot_dev ${bootdev} 10800000 /boot/uImage\0"	\
107*058d2316SBoris BREZILLON 	"bootcmd=run setbootargs; run setbootdev; run boot_dev;"	\
108*058d2316SBoris BREZILLON 		" bootm 0x10800000\0"					\
109*058d2316SBoris BREZILLON 	"stdin=serial\0"						\
110*058d2316SBoris BREZILLON 	"stdout=serial\0"						\
111*058d2316SBoris BREZILLON 	"stderr=serial\0"
112*058d2316SBoris BREZILLON 
113*058d2316SBoris BREZILLON 
114*058d2316SBoris BREZILLON /* Miscellaneous configurable options */
115*058d2316SBoris BREZILLON #define CONFIG_SYS_LONGHELP
116*058d2316SBoris BREZILLON #define CONFIG_SYS_HUSH_PARSER
117*058d2316SBoris BREZILLON #define CONFIG_SYS_PROMPT		"SECO MX6Q uQ7 U-Boot > "
118*058d2316SBoris BREZILLON 
119*058d2316SBoris BREZILLON #define CONFIG_AUTO_COMPLETE
120*058d2316SBoris BREZILLON #define CONFIG_SYS_CBSIZE		256
121*058d2316SBoris BREZILLON 
122*058d2316SBoris BREZILLON /* Print Buffer Size */
123*058d2316SBoris BREZILLON #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE +		\
124*058d2316SBoris BREZILLON 					 sizeof(CONFIG_SYS_PROMPT) + 16)
125*058d2316SBoris BREZILLON #define CONFIG_SYS_MAXARGS		16
126*058d2316SBoris BREZILLON #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
127*058d2316SBoris BREZILLON 
128*058d2316SBoris BREZILLON #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
129*058d2316SBoris BREZILLON #define CONFIG_SYS_HZ			1000
130*058d2316SBoris BREZILLON 
131*058d2316SBoris BREZILLON #define CONFIG_CMDLINE_EDITING
132*058d2316SBoris BREZILLON 
133*058d2316SBoris BREZILLON 
134*058d2316SBoris BREZILLON /* Physical Memory Map */
135*058d2316SBoris BREZILLON #define CONFIG_NR_DRAM_BANKS		1
136*058d2316SBoris BREZILLON #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
137*058d2316SBoris BREZILLON #define PHYS_SDRAM_SIZE			(2u * 1024 * 1024 * 1024)
138*058d2316SBoris BREZILLON 
139*058d2316SBoris BREZILLON #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
140*058d2316SBoris BREZILLON #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
141*058d2316SBoris BREZILLON #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
142*058d2316SBoris BREZILLON 
143*058d2316SBoris BREZILLON #define CONFIG_SYS_INIT_SP_OFFSET	\
144*058d2316SBoris BREZILLON 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
145*058d2316SBoris BREZILLON #define CONFIG_SYS_INIT_SP_ADDR		\
146*058d2316SBoris BREZILLON 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
147*058d2316SBoris BREZILLON 
148*058d2316SBoris BREZILLON /* FLASH and environment organization */
149*058d2316SBoris BREZILLON #define CONFIG_SYS_NO_FLASH
150*058d2316SBoris BREZILLON 
151*058d2316SBoris BREZILLON #define CONFIG_ENV_SIZE			(8 * 1024)
152*058d2316SBoris BREZILLON 
153*058d2316SBoris BREZILLON #if defined(CONFIG_ENV_IS_IN_MMC)
154*058d2316SBoris BREZILLON 	#define CONFIG_ENV_OFFSET		(6 * 128 * 1024)
155*058d2316SBoris BREZILLON 	#define CONFIG_SYS_MMC_ENV_DEV		0
156*058d2316SBoris BREZILLON 	#define CONFIG_DYNAMIC_MMC_DEVNO
157*058d2316SBoris BREZILLON #endif
158*058d2316SBoris BREZILLON 
159*058d2316SBoris BREZILLON #define CONFIG_OF_LIBFDT
160*058d2316SBoris BREZILLON #define CONFIG_CMD_BOOTZ
161*058d2316SBoris BREZILLON 
162*058d2316SBoris BREZILLON #ifndef CONFIG_SYS_DCACHE_OFF
163*058d2316SBoris BREZILLON #define CONFIG_CMD_CACHE
164*058d2316SBoris BREZILLON #endif
165*058d2316SBoris BREZILLON 
166*058d2316SBoris BREZILLON #endif /* __CONFIG_H */
167