1ee4bbbcbSTom Warren /* 2ee4bbbcbSTom Warren * (C) Copyright 2010,2011 3ee4bbbcbSTom Warren * NVIDIA Corporation <www.nvidia.com> 4ee4bbbcbSTom Warren * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6ee4bbbcbSTom Warren */ 7ee4bbbcbSTom Warren 8ee4bbbcbSTom Warren #ifndef __CONFIG_H 9ee4bbbcbSTom Warren #define __CONFIG_H 10ee4bbbcbSTom Warren 11*1ace4022SAlexey Brodkin #include <linux/sizes.h> 12649d0ffbSSimon Glass 13649d0ffbSSimon Glass /* LP0 suspend / resume */ 1429f3e3f2STom Warren #define CONFIG_TEGRA_LP0 15649d0ffbSSimon Glass #define CONFIG_TEGRA_PMU 16649d0ffbSSimon Glass #define CONFIG_TPS6586X_POWER 17649d0ffbSSimon Glass #define CONFIG_TEGRA_CLOCK_SCALING 18649d0ffbSSimon Glass 1900a2749dSAllen Martin #include "tegra20-common.h" 20ee4bbbcbSTom Warren 21ee4bbbcbSTom Warren /* High-level configuration options */ 2229f3e3f2STom Warren #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard" 23ee4bbbcbSTom Warren 24ee4bbbcbSTom Warren /* Board-specific serial config */ 2529f3e3f2STom Warren #define CONFIG_TEGRA_ENABLE_UARTD 26ee4bbbcbSTom Warren #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE 27ee4bbbcbSTom Warren 2805858736STom Warren #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD 29ee4bbbcbSTom Warren 30905fe99bSSimon Glass /* I2C */ 311f2ba722SSimon Glass #define CONFIG_SYS_I2C_TEGRA 32905fe99bSSimon Glass 33f9f2f12eSStephen Warren /* Environment in eMMC, at the end of 2nd "boot sector" */ 3491171091SStephen Warren #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) 35f9f2f12eSStephen Warren #define CONFIG_SYS_MMC_ENV_DEV 0 36573668a2SStephen Warren #define CONFIG_SYS_MMC_ENV_PART 2 37db44ebdbSSimon Glass 38db44ebdbSSimon Glass /* USB Host support */ 39db44ebdbSSimon Glass #define CONFIG_USB_EHCI_TEGRA 40db44ebdbSSimon Glass 41defd5e49SStephen Warren /* USB networking support */ 42defd5e49SStephen Warren 432cacf516SSimon Glass /* Enable keyboard */ 4429f3e3f2STom Warren #define CONFIG_TEGRA_KEYBOARD 452cacf516SSimon Glass #define CONFIG_KEYBOARD 462cacf516SSimon Glass 470dd84084SSimon Glass /* NAND support */ 480dd84084SSimon Glass #define CONFIG_TEGRA_NAND 490dd84084SSimon Glass 500dd84084SSimon Glass /* Max number of NAND devices */ 510dd84084SSimon Glass #define CONFIG_SYS_MAX_NAND_DEVICE 1 52ef24c38aSSimon Glass 53ef24c38aSSimon Glass #include "tegra-common-post.h" 54ef24c38aSSimon Glass 55ee4bbbcbSTom Warren #endif /* __CONFIG_H */ 56