1927b901bSBo Shen /* 2927b901bSBo Shen * Configuration settings for the SAMA5D4EK board. 3927b901bSBo Shen * 4927b901bSBo Shen * Copyright (C) 2014 Atmel 5927b901bSBo Shen * Bo Shen <voice.shen@atmel.com> 6927b901bSBo Shen * 7927b901bSBo Shen * SPDX-License-Identifier: GPL-2.0+ 8927b901bSBo Shen */ 9927b901bSBo Shen 10927b901bSBo Shen #ifndef __CONFIG_H 11927b901bSBo Shen #define __CONFIG_H 12927b901bSBo Shen 13927b901bSBo Shen #include <asm/hardware.h> 14927b901bSBo Shen 15927b901bSBo Shen #define CONFIG_SYS_TEXT_BASE 0x26f00000 16927b901bSBo Shen 17927b901bSBo Shen /* ARM asynchronous clock */ 18927b901bSBo Shen #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 19927b901bSBo Shen #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 20927b901bSBo Shen 21927b901bSBo Shen #define CONFIG_ARCH_CPU_INIT 22927b901bSBo Shen 23*5a4c9c22SBo Shen #ifndef CONFIG_SPL_BUILD 24927b901bSBo Shen #define CONFIG_SKIP_LOWLEVEL_INIT 25*5a4c9c22SBo Shen #endif 26927b901bSBo Shen #define CONFIG_BOARD_EARLY_INIT_F 27927b901bSBo Shen #define CONFIG_DISPLAY_CPUINFO 28927b901bSBo Shen 29927b901bSBo Shen #define CONFIG_CMD_BOOTZ 30927b901bSBo Shen #define CONFIG_OF_LIBFDT /* Device Tree support */ 31927b901bSBo Shen 32927b901bSBo Shen #define CONFIG_SYS_GENERIC_BOARD 33927b901bSBo Shen 34927b901bSBo Shen /* general purpose I/O */ 35927b901bSBo Shen #define CONFIG_AT91_GPIO 36927b901bSBo Shen 37927b901bSBo Shen /* serial console */ 38927b901bSBo Shen #define CONFIG_ATMEL_USART 39927b901bSBo Shen #define CONFIG_USART_BASE ATMEL_BASE_USART3 40927b901bSBo Shen #define CONFIG_USART_ID ATMEL_ID_USART3 41927b901bSBo Shen 42927b901bSBo Shen #define CONFIG_BOOTDELAY 3 43927b901bSBo Shen 44927b901bSBo Shen /* 45927b901bSBo Shen * BOOTP options 46927b901bSBo Shen */ 47927b901bSBo Shen #define CONFIG_BOOTP_BOOTFILESIZE 48927b901bSBo Shen #define CONFIG_BOOTP_BOOTPATH 49927b901bSBo Shen #define CONFIG_BOOTP_GATEWAY 50927b901bSBo Shen #define CONFIG_BOOTP_HOSTNAME 51927b901bSBo Shen 52927b901bSBo Shen /* No NOR flash */ 53927b901bSBo Shen #define CONFIG_SYS_NO_FLASH 54927b901bSBo Shen 55927b901bSBo Shen /* 56927b901bSBo Shen * Command line configuration. 57927b901bSBo Shen */ 58927b901bSBo Shen #include <config_cmd_default.h> 59927b901bSBo Shen #undef CONFIG_CMD_FPGA 60927b901bSBo Shen #undef CONFIG_CMD_IMI 61927b901bSBo Shen #undef CONFIG_CMD_LOADS 62927b901bSBo Shen #define CONFIG_CMD_PING 63927b901bSBo Shen #define CONFIG_CMD_DHCP 64927b901bSBo Shen #define CONFIG_CMD_SETEXPR 65927b901bSBo Shen 66927b901bSBo Shen /* SDRAM */ 67927b901bSBo Shen #define CONFIG_NR_DRAM_BANKS 1 68927b901bSBo Shen #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS 69927b901bSBo Shen #define CONFIG_SYS_SDRAM_SIZE 0x20000000 70927b901bSBo Shen 71*5a4c9c22SBo Shen #ifdef CONFIG_SPL_BUILD 72*5a4c9c22SBo Shen #define CONFIG_SYS_INIT_SP_ADDR 0x210000 73*5a4c9c22SBo Shen #else 74927b901bSBo Shen #define CONFIG_SYS_INIT_SP_ADDR \ 75927b901bSBo Shen (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 76*5a4c9c22SBo Shen #endif 77927b901bSBo Shen 78927b901bSBo Shen #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 79927b901bSBo Shen 80927b901bSBo Shen /* SerialFlash */ 81927b901bSBo Shen #define CONFIG_CMD_SF 82927b901bSBo Shen 83927b901bSBo Shen #ifdef CONFIG_CMD_SF 84927b901bSBo Shen #define CONFIG_ATMEL_SPI 85927b901bSBo Shen #define CONFIG_ATMEL_SPI0 86927b901bSBo Shen #define CONFIG_SPI_FLASH 87927b901bSBo Shen #define CONFIG_SPI_FLASH_ATMEL 88927b901bSBo Shen #define CONFIG_SF_DEFAULT_BUS 0 89927b901bSBo Shen #define CONFIG_SF_DEFAULT_CS 0 90927b901bSBo Shen #define CONFIG_SF_DEFAULT_SPEED 30000000 91927b901bSBo Shen #endif 92927b901bSBo Shen 93927b901bSBo Shen /* NAND flash */ 94927b901bSBo Shen #define CONFIG_CMD_NAND 95927b901bSBo Shen 96927b901bSBo Shen #ifdef CONFIG_CMD_NAND 97927b901bSBo Shen #define CONFIG_NAND_ATMEL 98927b901bSBo Shen #define CONFIG_SYS_MAX_NAND_DEVICE 1 99927b901bSBo Shen #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 100927b901bSBo Shen /* our ALE is AD21 */ 101927b901bSBo Shen #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 102927b901bSBo Shen /* our CLE is AD22 */ 103927b901bSBo Shen #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 104927b901bSBo Shen #define CONFIG_SYS_NAND_ONFI_DETECTION 105927b901bSBo Shen /* PMECC & PMERRLOC */ 106927b901bSBo Shen #define CONFIG_ATMEL_NAND_HWECC 107927b901bSBo Shen #define CONFIG_ATMEL_NAND_HW_PMECC 108927b901bSBo Shen #endif 109927b901bSBo Shen 110927b901bSBo Shen /* MMC */ 111927b901bSBo Shen #define CONFIG_CMD_MMC 112927b901bSBo Shen 113927b901bSBo Shen #ifdef CONFIG_CMD_MMC 114927b901bSBo Shen #define CONFIG_MMC 115927b901bSBo Shen #define CONFIG_GENERIC_MMC 116927b901bSBo Shen #define CONFIG_GENERIC_ATMEL_MCI 117927b901bSBo Shen #define ATMEL_BASE_MMCI ATMEL_BASE_MCI1 118927b901bSBo Shen #endif 119927b901bSBo Shen 120927b901bSBo Shen /* USB */ 121927b901bSBo Shen #define CONFIG_CMD_USB 122927b901bSBo Shen 123927b901bSBo Shen #ifdef CONFIG_CMD_USB 124927b901bSBo Shen #define CONFIG_USB_EHCI 125927b901bSBo Shen #define CONFIG_USB_EHCI_ATMEL 126927b901bSBo Shen #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 127927b901bSBo Shen #define CONFIG_USB_STORAGE 128927b901bSBo Shen #endif 129927b901bSBo Shen 130cd5ca303SBo Shen /* USB device */ 131cd5ca303SBo Shen #define CONFIG_USB_GADGET 132cd5ca303SBo Shen #define CONFIG_USB_GADGET_DUALSPEED 133cd5ca303SBo Shen #define CONFIG_USB_GADGET_ATMEL_USBA 134cd5ca303SBo Shen #define CONFIG_USB_ETHER 135cd5ca303SBo Shen #define CONFIG_USB_ETH_RNDIS 136cd5ca303SBo Shen #define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D4EK" 137cd5ca303SBo Shen 138927b901bSBo Shen #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 139927b901bSBo Shen #define CONFIG_CMD_FAT 140927b901bSBo Shen #define CONFIG_DOS_PARTITION 141927b901bSBo Shen #endif 142927b901bSBo Shen 143927b901bSBo Shen /* Ethernet Hardware */ 144927b901bSBo Shen #define CONFIG_MACB 145927b901bSBo Shen #define CONFIG_RMII 146927b901bSBo Shen #define CONFIG_NET_RETRY_COUNT 20 147927b901bSBo Shen #define CONFIG_MACB_SEARCH_PHY 148927b901bSBo Shen 149927b901bSBo Shen /* LCD */ 150927b901bSBo Shen #define CONFIG_LCD 151927b901bSBo Shen #define LCD_BPP LCD_COLOR16 152927b901bSBo Shen #define LCD_OUTPUT_BPP 18 153927b901bSBo Shen #define CONFIG_LCD_LOGO 154927b901bSBo Shen #define CONFIG_LCD_INFO 155927b901bSBo Shen #define CONFIG_LCD_INFO_BELOW_LOGO 156927b901bSBo Shen #define CONFIG_SYS_WHITE_ON_BLACK 157927b901bSBo Shen #define CONFIG_ATMEL_HLCD 158927b901bSBo Shen #define CONFIG_ATMEL_LCD_RGB565 159927b901bSBo Shen #define CONFIG_SYS_CONSOLE_IS_IN_ENV 160927b901bSBo Shen 161927b901bSBo Shen #ifdef CONFIG_SYS_USE_SERIALFLASH 162927b901bSBo Shen /* bootstrap + u-boot + env + linux in serial flash */ 163927b901bSBo Shen #define CONFIG_ENV_IS_IN_SPI_FLASH 164927b901bSBo Shen #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 165927b901bSBo Shen #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 166927b901bSBo Shen #define CONFIG_ENV_OFFSET 0x10000 167927b901bSBo Shen #define CONFIG_ENV_SIZE 0x10000 168927b901bSBo Shen #define CONFIG_ENV_SECT_SIZE 0x1000 169927b901bSBo Shen #define CONFIG_BOOTCOMMAND "sf probe 0; " \ 170927b901bSBo Shen "sf read 0x21000000 0xa0000 0x60000; " \ 171927b901bSBo Shen "sf read 0x22000000 0x100000 0x300000; " \ 172927b901bSBo Shen "bootz 0x22000000 - 0x21000000" 173927b901bSBo Shen #elif CONFIG_SYS_USE_NANDFLASH 174927b901bSBo Shen /* bootstrap + u-boot + env in nandflash */ 175927b901bSBo Shen #define CONFIG_ENV_IS_IN_NAND 176927b901bSBo Shen #define CONFIG_ENV_OFFSET 0xc0000 177927b901bSBo Shen #define CONFIG_ENV_OFFSET_REDUND 0x100000 178927b901bSBo Shen #define CONFIG_ENV_SIZE 0x20000 179927b901bSBo Shen #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \ 180927b901bSBo Shen "nand read 0x22000000 0x200000 0x600000;" \ 181927b901bSBo Shen "bootz 0x22000000 - 0x21000000" 182927b901bSBo Shen #elif CONFIG_SYS_USE_MMC 183927b901bSBo Shen /* bootstrap + u-boot + env in sd card */ 184927b901bSBo Shen #define CONFIG_ENV_IS_IN_FAT 185927b901bSBo Shen #define CONFIG_FAT_WRITE 186927b901bSBo Shen #define FAT_ENV_INTERFACE "mmc" 187927b901bSBo Shen /* 188927b901bSBo Shen * We don't specify the part number, if device 0 has partition table, it means 189927b901bSBo Shen * the first partition; it no partition table, then take whole device as a 190927b901bSBo Shen * FAT file system. 191927b901bSBo Shen */ 192927b901bSBo Shen #define FAT_ENV_DEVICE_AND_PART "0" 193927b901bSBo Shen #define FAT_ENV_FILE "uboot.env" 194927b901bSBo Shen #define CONFIG_ENV_SIZE 0x4000 195927b901bSBo Shen #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 sama5d4ek.dtb; " \ 196927b901bSBo Shen "fatload mmc 0:1 0x22000000 zImage; " \ 197927b901bSBo Shen "bootz 0x22000000 - 0x21000000" 198927b901bSBo Shen #endif 199927b901bSBo Shen 200927b901bSBo Shen #ifdef CONFIG_SYS_USE_MMC 201927b901bSBo Shen #define CONFIG_BOOTARGS \ 202927b901bSBo Shen "console=ttyS0,115200 earlyprintk " \ 203927b901bSBo Shen "root=/dev/mmcblk0p2 rw rootwait" 204927b901bSBo Shen #else 205927b901bSBo Shen #define CONFIG_BOOTARGS \ 206927b901bSBo Shen "console=ttyS0,115200 earlyprintk " \ 207927b901bSBo Shen "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ 208927b901bSBo Shen "256K(env),256k(evn_redundent),256k(spare)," \ 209927b901bSBo Shen "512k(dtb),6M(kernel)ro,-(rootfs) " \ 210927b901bSBo Shen "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs" 211927b901bSBo Shen #endif 212927b901bSBo Shen 213927b901bSBo Shen #define CONFIG_BAUDRATE 115200 214927b901bSBo Shen 215927b901bSBo Shen #define CONFIG_SYS_PROMPT "U-Boot> " 216927b901bSBo Shen #define CONFIG_SYS_CBSIZE 256 217927b901bSBo Shen #define CONFIG_SYS_MAXARGS 16 218927b901bSBo Shen #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 219927b901bSBo Shen sizeof(CONFIG_SYS_PROMPT) + 16) 220927b901bSBo Shen #define CONFIG_SYS_LONGHELP 221927b901bSBo Shen #define CONFIG_CMDLINE_EDITING 222927b901bSBo Shen #define CONFIG_AUTO_COMPLETE 223927b901bSBo Shen #define CONFIG_SYS_HUSH_PARSER 224927b901bSBo Shen 225927b901bSBo Shen /* Size of malloc() pool */ 226927b901bSBo Shen #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 227927b901bSBo Shen 228*5a4c9c22SBo Shen 229*5a4c9c22SBo Shen /* SPL */ 230*5a4c9c22SBo Shen #define CONFIG_SPL_FRAMEWORK 231*5a4c9c22SBo Shen #define CONFIG_SPL_TEXT_BASE 0x200000 232*5a4c9c22SBo Shen #define CONFIG_SPL_MAX_SIZE 0x10000 233*5a4c9c22SBo Shen #define CONFIG_SPL_BSS_START_ADDR 0x20000000 234*5a4c9c22SBo Shen #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 235*5a4c9c22SBo Shen #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 236*5a4c9c22SBo Shen #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 237*5a4c9c22SBo Shen 238*5a4c9c22SBo Shen #define CONFIG_SPL_LIBCOMMON_SUPPORT 239*5a4c9c22SBo Shen #define CONFIG_SPL_LIBGENERIC_SUPPORT 240*5a4c9c22SBo Shen #define CONFIG_SPL_GPIO_SUPPORT 241*5a4c9c22SBo Shen #define CONFIG_SPL_SERIAL_SUPPORT 242*5a4c9c22SBo Shen 243*5a4c9c22SBo Shen #define CONFIG_SPL_BOARD_INIT 244*5a4c9c22SBo Shen #define CONFIG_SYS_MONITOR_LEN (512 << 10) 245*5a4c9c22SBo Shen 246*5a4c9c22SBo Shen #ifdef CONFIG_SYS_USE_MMC 247*5a4c9c22SBo Shen #define CONFIG_SPL_LDSCRIPT arch/arm/cpu/at91-common/u-boot-spl.lds 248*5a4c9c22SBo Shen #define CONFIG_SPL_MMC_SUPPORT 249*5a4c9c22SBo Shen #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 250*5a4c9c22SBo Shen #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 251*5a4c9c22SBo Shen #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 252*5a4c9c22SBo Shen #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 253*5a4c9c22SBo Shen #define CONFIG_SPL_FAT_SUPPORT 254*5a4c9c22SBo Shen #define CONFIG_SPL_LIBDISK_SUPPORT 255*5a4c9c22SBo Shen 256*5a4c9c22SBo Shen #elif CONFIG_SYS_USE_NANDFLASH 257*5a4c9c22SBo Shen #define CONFIG_SPL_NAND_SUPPORT 258*5a4c9c22SBo Shen #define CONFIG_SPL_NAND_DRIVERS 259*5a4c9c22SBo Shen #define CONFIG_SPL_NAND_BASE 260*5a4c9c22SBo Shen #define CONFIG_PMECC_CAP 8 261*5a4c9c22SBo Shen #define CONFIG_PMECC_SECTOR_SIZE 512 262*5a4c9c22SBo Shen #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 263*5a4c9c22SBo Shen #define CONFIG_SYS_NAND_5_ADDR_CYCLE 264*5a4c9c22SBo Shen #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 265*5a4c9c22SBo Shen #define CONFIG_SYS_NAND_PAGE_COUNT 64 266*5a4c9c22SBo Shen #define CONFIG_SYS_NAND_OOBSIZE 224 267*5a4c9c22SBo Shen #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 268*5a4c9c22SBo Shen #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 269*5a4c9c22SBo Shen #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER 270*5a4c9c22SBo Shen 271*5a4c9c22SBo Shen #elif CONFIG_SYS_USE_SERIALFLASH 272*5a4c9c22SBo Shen #define CONFIG_SPL_SPI_SUPPORT 273*5a4c9c22SBo Shen #define CONFIG_SPL_SPI_FLASH_SUPPORT 274*5a4c9c22SBo Shen #define CONFIG_SPL_SPI_LOAD 275*5a4c9c22SBo Shen #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 276*5a4c9c22SBo Shen 277*5a4c9c22SBo Shen #endif 278927b901bSBo Shen #endif 279