xref: /rk3399_rockchip-uboot/include/configs/sama5d4_xplained.h (revision cfcc706c901d603707657919484e4f65467be9ff)
1 /*
2  * Configuration settings for the SAMA5D4 Xplained ultra board.
3  *
4  * Copyright (C) 2014 Atmel
5  *		      Bo Shen <voice.shen@atmel.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #include "at91-sama5_common.h"
14 
15 /* SDRAM */
16 #define CONFIG_NR_DRAM_BANKS		1
17 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
18 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
19 
20 #ifdef CONFIG_SPL_BUILD
21 #define CONFIG_SYS_INIT_SP_ADDR		0x218000
22 #else
23 #define CONFIG_SYS_INIT_SP_ADDR \
24 	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
25 #endif
26 
27 #define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */
28 
29 #ifdef CONFIG_CMD_SF
30 #define CONFIG_SF_DEFAULT_SPEED		30000000
31 #endif
32 
33 /* NAND flash */
34 #ifdef CONFIG_CMD_NAND
35 #define CONFIG_SYS_MAX_NAND_DEVICE	1
36 #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
37 /* our ALE is AD21 */
38 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
39 /* our CLE is AD22 */
40 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
41 #define CONFIG_SYS_NAND_ONFI_DETECTION
42 /* PMECC & PMERRLOC */
43 #define CONFIG_ATMEL_NAND_HWECC
44 #define CONFIG_ATMEL_NAND_HW_PMECC
45 #endif
46 
47 /* LCD */
48 #ifdef CONFIG_LCD
49 #define LCD_BPP				LCD_COLOR16
50 #define LCD_OUTPUT_BPP                  24
51 #define CONFIG_LCD_LOGO
52 #define CONFIG_LCD_INFO
53 #define CONFIG_LCD_INFO_BELOW_LOGO
54 #define CONFIG_ATMEL_HLCD
55 #define CONFIG_ATMEL_LCD_RGB565
56 #endif
57 
58 #ifdef CONFIG_SYS_USE_SERIALFLASH
59 /* override the bootcmd, bootargs and other configuration for spi flash env */
60 #elif CONFIG_SYS_USE_NANDFLASH
61 /* override the bootcmd, bootargs and other configuration for nandflash env */
62 #elif CONFIG_SYS_USE_MMC
63 /* override the bootcmd, bootargs and other configuration for sd/mmc env */
64 #endif
65 
66 /* SPL */
67 #define CONFIG_SPL_FRAMEWORK
68 #define CONFIG_SPL_TEXT_BASE		0x200000
69 #define CONFIG_SPL_MAX_SIZE		0x18000
70 #define CONFIG_SPL_BSS_START_ADDR	0x20000000
71 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
72 #define CONFIG_SYS_SPL_MALLOC_START	0x20080000
73 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
74 
75 #define CONFIG_SYS_MONITOR_LEN		(512 << 10)
76 
77 #ifdef CONFIG_SYS_USE_MMC
78 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
79 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
80 
81 #elif CONFIG_SYS_USE_NANDFLASH
82 #define CONFIG_SPL_NAND_DRIVERS
83 #define CONFIG_SPL_NAND_BASE
84 #define CONFIG_PMECC_CAP		8
85 #define CONFIG_PMECC_SECTOR_SIZE	512
86 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
87 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
88 #define CONFIG_SYS_NAND_PAGE_SIZE	0x1000
89 #define CONFIG_SYS_NAND_PAGE_COUNT	64
90 #define CONFIG_SYS_NAND_OOBSIZE		224
91 #define CONFIG_SYS_NAND_BLOCK_SIZE	0x40000
92 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
93 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
94 
95 #elif CONFIG_SYS_USE_SERIALFLASH
96 #define CONFIG_SPL_SPI_LOAD
97 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x10000
98 
99 #endif
100 #endif
101